2018-04-25 12:01:01 -04:00
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///////////////////////////////////////////////////////////////////////////////////
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// Copyright (C) 2018 Edouard Griffiths, F4EXB //
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// //
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// This program is free software; you can redistribute it and/or modify //
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// it under the terms of the GNU General Public License as published by //
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// the Free Software Foundation as version 3 of the License, or //
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// //
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// This program is distributed in the hope that it will be useful, //
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// but WITHOUT ANY WARRANTY; without even the implied warranty of //
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the //
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// GNU General Public License V3 for more details. //
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// //
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// You should have received a copy of the GNU General Public License //
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// along with this program. If not, see <http://www.gnu.org/licenses/>. //
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///////////////////////////////////////////////////////////////////////////////////
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#ifndef SDRBASE_DSP_DECIMATORSFF_H_
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#define SDRBASE_DSP_DECIMATORSFF_H_
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2018-04-30 05:08:08 -04:00
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#include "dsp/inthalfbandfiltereof.h"
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2018-04-25 12:01:01 -04:00
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#include "export.h"
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#define DECIMATORSFF_HB_FILTER_ORDER 64
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/** Decimators with float input and float output */
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class SDRBASE_API DecimatorsFF
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{
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public:
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void decimate1(FSampleVector::iterator* it, const float* buf, qint32 nbIAndQ);
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void decimate2_inf(FSampleVector::iterator* it, const float* buf, qint32 nbIAndQ);
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void decimate2_sup(FSampleVector::iterator* it, const float* buf, qint32 nbIAndQ);
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void decimate2_cen(FSampleVector::iterator* it, const float* buf, qint32 nbIAndQ);
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void decimate4_inf(FSampleVector::iterator* it, const float* buf, qint32 nbIAndQ);
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void decimate4_sup(FSampleVector::iterator* it, const float* buf, qint32 nbIAndQ);
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void decimate4_cen(FSampleVector::iterator* it, const float* buf, qint32 nbIAndQ);
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void decimate8_inf(FSampleVector::iterator* it, const float* buf, qint32 nbIAndQ);
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void decimate8_sup(FSampleVector::iterator* it, const float* buf, qint32 nbIAndQ);
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void decimate8_cen(FSampleVector::iterator* it, const float* buf, qint32 nbIAndQ);
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void decimate16_inf(FSampleVector::iterator* it, const float* buf, qint32 nbIAndQ);
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void decimate16_sup(FSampleVector::iterator* it, const float* buf, qint32 nbIAndQ);
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void decimate16_cen(FSampleVector::iterator* it, const float* buf, qint32 nbIAndQ);
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void decimate32_inf(FSampleVector::iterator* it, const float* buf, qint32 nbIAndQ);
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void decimate32_sup(FSampleVector::iterator* it, const float* buf, qint32 nbIAndQ);
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void decimate32_cen(FSampleVector::iterator* it, const float* buf, qint32 nbIAndQ);
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void decimate64_inf(FSampleVector::iterator* it, const float* buf, qint32 nbIAndQ);
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void decimate64_sup(FSampleVector::iterator* it, const float* buf, qint32 nbIAndQ);
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void decimate64_cen(FSampleVector::iterator* it, const float* buf, qint32 nbIAndQ);
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2018-04-30 05:08:08 -04:00
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IntHalfbandFilterEOF<DECIMATORSFF_HB_FILTER_ORDER> m_decimator2; // 1st stages
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IntHalfbandFilterEOF<DECIMATORSFF_HB_FILTER_ORDER> m_decimator4; // 2nd stages
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IntHalfbandFilterEOF<DECIMATORSFF_HB_FILTER_ORDER> m_decimator8; // 3rd stages
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IntHalfbandFilterEOF<DECIMATORSFF_HB_FILTER_ORDER> m_decimator16; // 4th stages
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IntHalfbandFilterEOF<DECIMATORSFF_HB_FILTER_ORDER> m_decimator32; // 5th stages
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IntHalfbandFilterEOF<DECIMATORSFF_HB_FILTER_ORDER> m_decimator64; // 6th stages
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2018-04-25 12:01:01 -04:00
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};
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#endif /* SDRBASE_DSP_DECIMATORSFF_H_ */
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