2015-12-10 02:54:57 -05:00
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///////////////////////////////////////////////////////////////////////////////////
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// Copyright (C) 2015 F4EXB //
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// written by Edouard Griffiths //
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// //
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// This program is free software; you can redistribute it and/or modify //
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// it under the terms of the GNU General Public License as published by //
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// the Free Software Foundation as version 3 of the License, or //
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// //
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// This program is distributed in the hope that it will be useful, //
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// but WITHOUT ANY WARRANTY; without even the implied warranty of //
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the //
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// GNU General Public License V3 for more details. //
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// //
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// You should have received a copy of the GNU General Public License //
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// along with this program. If not, see <http://www.gnu.org/licenses/>. //
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///////////////////////////////////////////////////////////////////////////////////
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2015-12-10 09:02:16 -05:00
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#include <QDebug>
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2015-12-10 02:54:57 -05:00
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#include <math.h>
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2015-12-10 07:39:15 -05:00
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#include <stdio.h>
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#include <stdlib.h>
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2015-12-10 02:54:57 -05:00
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#include "rdsdemod.h"
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2015-12-10 21:57:17 -05:00
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const Real RDSDemod::m_pllBeta = 50;
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2015-12-10 02:54:57 -05:00
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RDSDemod::RDSDemod()
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{
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m_srate = 250000;
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m_fsc = 57000.0;
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m_subcarrPhi = 0;
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m_dPhiSc = 0;
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m_subcarrBB_1 = 0.0;
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2015-12-10 02:54:57 -05:00
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m_rdsClockPhase = 0.0;
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m_rdsClockOffset = 0.0;
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m_rdsClockLO = 0.0;
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2015-12-10 07:39:15 -05:00
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m_rdsClockLO_1 = 0.0;
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m_numSamples = 0;
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m_acc = 0.0;
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m_acc_1 = 0.0;
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m_counter = 0;
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m_readingFrame = 0;
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m_totErrors[0] = 0;
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m_totErrors[1] = 0;
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m_dbit = 0;
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2015-12-10 02:54:57 -05:00
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}
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RDSDemod::~RDSDemod()
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{
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}
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2015-12-10 21:57:17 -05:00
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void RDSDemod::setSampleRate(int srate)
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{
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m_srate = srate;
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m_fsc = 57000.0;
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}
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void RDSDemod::process(Real demod, Real pilotPhaseSample)
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{
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/*
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// Subcarrier downmix & phase recovery
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m_subcarrPhi += 2 * M_PI * m_fsc * (1.0 / m_srate);
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m_subcarrBB[0] = filter_lp_2400_iq(demod * cos(m_subcarrPhi), 0);
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m_subcarrBB[1] = filter_lp_2400_iq(demod * sin(m_subcarrPhi), 1);
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m_dPhiSc = 2 * filter_lp_pll(m_subcarrBB[1] * m_subcarrBB[0]);
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m_subcarrPhi -= m_pllBeta * m_dPhiSc; //prev_loop;
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m_fsc -= .5 * m_pllBeta * m_dPhiSc; //prev_loop;
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// 1187.5 Hz clock
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m_rdsClockPhase = m_subcarrPhi / 48.0 + m_rdsClockOffset;
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m_rdsClockLO = (fmod(m_rdsClockPhase, 2 * M_PI) < M_PI ? 1 : -1);
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// Clock phase recovery
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if (sign(m_subcarrBB_1) != sign(m_subcarrBB[0]))
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{
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Real d_cphi = fmod(m_rdsClockPhase, M_PI);
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if (d_cphi >= M_PI_2)
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{
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d_cphi -= M_PI;
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}
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m_rdsClockOffset -= 0.005 * d_cphi;
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}
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// Decimate band-limited signal
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if (m_numSamples % 8 == 0)
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{
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// biphase symbol integrate & dump
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m_acc += m_subcarrBB[0] * m_rdsClockLO;
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if (sign(m_rdsClockLO) != sign(m_rdsClockLO_1))
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{
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biphase(m_acc, m_fsc);
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m_acc = 0;
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}
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m_rdsClockLO_1 = m_rdsClockLO;
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}
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m_subcarrBB_1 = m_subcarrBB[0];
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*/
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m_subcarrBB[0] = filter_lp_2400_iq(demod, 0); // working on real part only
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2015-12-10 08:15:44 -05:00
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// 1187.5 Hz clock from 19 kHz pilot
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m_rdsClockPhase = (pilotPhaseSample / 16.0) + m_rdsClockOffset;
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m_rdsClockLO = (m_rdsClockPhase > 0.0 ? 1.0 : -1.0);
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// Clock phase recovery
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if (sign(m_subcarrBB_1) != sign(m_subcarrBB[0]))
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{
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Real d_cphi = fmod(m_rdsClockPhase, M_PI);
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if (d_cphi >= M_PI_2)
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{
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d_cphi -= M_PI;
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}
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m_rdsClockOffset -= 0.005 * d_cphi;
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}
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// Decimate band-limited signal
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if (m_numSamples % 8 == 0)
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{
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// biphase symbol integrate & dump
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m_acc += m_subcarrBB[0] * m_rdsClockLO;
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if (sign(m_rdsClockLO) != sign(m_rdsClockLO_1))
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{
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biphase(m_acc, 57000.0);
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m_acc = 0;
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}
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m_rdsClockLO_1 = m_rdsClockLO;
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}
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m_numSamples++;
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}
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Real RDSDemod::filter_lp_2400_iq(Real input, int iqIndex)
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{
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/* Digital filter designed by mkfilter/mkshape/gencode A.J. Fisher
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Command line: /www/usr/fisher/helpers/mkfilter -Bu -Lp -o 10
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-a 4.8000000000e-03 0.0000000000e+00 -l */
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m_xv[iqIndex][0] = m_xv[iqIndex][1]; m_xv[iqIndex][1] = m_xv[iqIndex][2];
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m_xv[iqIndex][2] = input / 4.491730007e+03;
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m_yv[iqIndex][0] = m_yv[iqIndex][1]; m_yv[iqIndex][1] = m_yv[iqIndex][2];
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m_yv[iqIndex][2] = (m_xv[iqIndex][0] + m_xv[iqIndex][2]) + 2 * m_xv[iqIndex][1]
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+ ( -0.9582451124 * m_yv[iqIndex][0]) + ( 1.9573545869 * m_yv[iqIndex][1]);
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return m_yv[iqIndex][2];
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}
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2015-12-10 21:57:17 -05:00
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Real RDSDemod::filter_lp_pll(Real input)
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{
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m_xw[0] = m_xw[1];
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m_xw[1] = input / 3.716236217e+01;
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m_yw[0] = m_yw[1];
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m_yw[1] = (m_xw[0] + m_xw[1])
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+ ( 0.9461821078 * m_yw[0]);
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return m_yw[1];
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}
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2015-12-10 07:39:15 -05:00
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int RDSDemod::sign(Real a)
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{
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return (a >= 0 ? 1 : 0);
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}
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2015-12-10 21:57:17 -05:00
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void RDSDemod::biphase(Real acc, Real fsc)
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{
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if (sign(acc) != sign(m_acc_1)) // two successive of different sign: error detected
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{
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m_totErrors[m_counter % 2]++;
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}
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if (m_counter % 2 == m_readingFrame) // two successive of the same sign: OK
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{
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print_delta(sign(acc + m_acc_1));
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}
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if (m_counter == 0)
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{
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if (m_totErrors[1 - m_readingFrame] < m_totErrors[m_readingFrame])
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{
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m_readingFrame = 1 - m_readingFrame;
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double qua = (1.0 * abs(m_totErrors[0] - m_totErrors[1]) / (m_totErrors[0] + m_totErrors[1])) * 100;
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qDebug("RDSDemod::biphase: frame: %d errs: %3d %3d qual: %3.0f%% pll: %.1f (%.1f ppm)",
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m_readingFrame,
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m_totErrors[0],
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m_totErrors[1],
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qua,
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fsc,
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(57000.0-fsc)/57000.0*1000000);
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}
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m_totErrors[0] = 0;
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m_totErrors[1] = 0;
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}
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m_acc_1 = acc; // memorize (z^-1)
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m_counter = (m_counter + 1) % 800;
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}
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void RDSDemod::print_delta(char b)
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{
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output_bit(b ^ m_dbit);
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m_dbit = b;
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}
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void RDSDemod::output_bit(char b)
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{
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// TODO: return value instead of spitting out
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//printf("%d", b);
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}
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