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			71 lines
		
	
	
		
			2.9 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
		
		
			
		
	
	
			71 lines
		
	
	
		
			2.9 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
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								///////////////////////////////////////////////////////////////////////////////////
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								// Copyright (C) 2018 F4EXB                                                      //
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								// written by Edouard Griffiths                                                  //
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								//                                                                               //
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								// See: http://liquidsdr.org/blog/pll-howto/                                     //
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								// Fixes filter registers saturation                                             //
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								//                                                                               //
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								// This program is free software; you can redistribute it and/or modify          //
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								// it under the terms of the GNU General Public License as published by          //
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								// the Free Software Foundation as version 3 of the License, or                  //
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								//                                                                               //
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								// This program is distributed in the hope that it will be useful,               //
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								// but WITHOUT ANY WARRANTY; without even the implied warranty of                //
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								// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the                  //
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								// GNU General Public License V3 for more details.                               //
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								//                                                                               //
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								// You should have received a copy of the GNU General Public License             //
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								// along with this program. If not, see <http://www.gnu.org/licenses/>.          //
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								///////////////////////////////////////////////////////////////////////////////////
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								#ifndef SDRBASE_DSP_PHASELOCKCOMPLEX_H_
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								#define SDRBASE_DSP_PHASELOCKCOMPLEX_H_
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								#include "dsp/dsptypes.h"
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								#include "export.h"
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								/** General purpose Phase-locked loop using complex analytic signal input. */
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								class SDRBASE_API PhaseLockComplex
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								{
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								public:
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								    PhaseLockComplex();
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								    /** Compute loop filter parameters (active PI design)
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								     * \param wn   PLL bandwidth relative to Nyquist frequency
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								     * \param zeta PLL damping factor
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								     * \param K    PLL loop gain
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								     * */
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								    void computeCoefficients(Real wn, Real zeta, Real K);
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								    void reset();
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								    void feed(float re, float im);
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								    const std::complex<float>& getComplex() const { return m_y; }
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								    float getReal() const { return m_yRe; }
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								    float getImag() const { return m_yIm; }
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								    bool locked() const { return (m_deltaPhi > -0.1) && (m_deltaPhi < 0.1); }
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								    float getFrequency() const { return m_freq; }
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								    float getDeltaPhi() const { return m_deltaPhi; }
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								    float getPhiHat() const { return m_phiHat; }
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								private:
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								    // a0 = 1 is implied
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								    float m_a1;
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								    float m_a2;
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								    float m_b0;
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								    float m_b1;
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								    float m_b2;
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								    float m_v0;
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								    float m_v1;
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								    float m_v2;
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								    float m_deltaPhi;
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								    float m_phiHatLast;
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								    float m_phiHat;
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								    std::complex<float> m_y;
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								    float m_yRe;
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								    float m_yIm;
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								    float m_freq;
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								};
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								#endif /* SDRBASE_DSP_PHASELOCKCOMPLEX_H_ */
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