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Rewrite of decimator ifdefs

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f4exb 2018-04-28 03:04:34 +02:00
parent 33e171bd9b
commit 27623709f0
1 changed files with 39 additions and 16 deletions
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55
sdrbase/dsp/decimators.h
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@ -18,15 +18,20 @@
#define INCLUDE_GPL_DSP_DECIMATORS_H_
#include "dsp/dsptypes.h"
#if defined(SDR_RX_SAMPLE_24BIT) || defined(NO_SIMD_DSP)
#ifdef NO_DSP_SIMD
#include "dsp/inthalfbandfilterdb.h"
#else
#else // NO_DSP_SIMD
#ifdef SDR_RX_SAMPLE_24BIT
#include "dsp/inthalfbandfilterdb.h"
#else // SDR_RX_SAMPLE_24BIT
#ifdef USE_SSE4_1
#include "dsp/inthalfbandfiltereo1.h"
#else
#else // USE_SSE4_1
#include "dsp/inthalfbandfilterdb.h"
#endif
#endif
#endif // USE_SSE4_1
#endif // SDR_RX_SAMPLE_24BIT
#endif // NO_DSP_SIMD
#define DECIMATORS_HB_FILTER_ORDER 64
@ -331,14 +336,31 @@ public:
void decimate64_cen(SampleVector::iterator* it, const T* bufI, const T* bufQ, qint32 len);
private:
#if defined(SDR_RX_SAMPLE_24BIT) || defined(NO_SIMD_DSP)
#ifdef NO_DSP_SIMD
#ifdef SDR_RX_SAMPLE_24BIT
IntHalfbandFilterDB<qint64, DECIMATORS_HB_FILTER_ORDER> m_decimator2; // 1st stages
IntHalfbandFilterDB<qint64, DECIMATORS_HB_FILTER_ORDER> m_decimator4; // 2nd stages
IntHalfbandFilterDB<qint64, DECIMATORS_HB_FILTER_ORDER> m_decimator8; // 3rd stages
IntHalfbandFilterDB<qint64, DECIMATORS_HB_FILTER_ORDER> m_decimator16; // 4th stages
IntHalfbandFilterDB<qint64, DECIMATORS_HB_FILTER_ORDER> m_decimator32; // 5th stages
IntHalfbandFilterDB<qint64, DECIMATORS_HB_FILTER_ORDER> m_decimator64; // 6th stages
#else
#else // SDR_RX_SAMPLE_24BIT
IntHalfbandFilterDB<qint32, DECIMATORS_HB_FILTER_ORDER> m_decimator2; // 1st stages
IntHalfbandFilterDB<qint32, DECIMATORS_HB_FILTER_ORDER> m_decimator4; // 2nd stages
IntHalfbandFilterDB<qint32, DECIMATORS_HB_FILTER_ORDER> m_decimator8; // 3rd stages
IntHalfbandFilterDB<qint32, DECIMATORS_HB_FILTER_ORDER> m_decimator16; // 4th stages
IntHalfbandFilterDB<qint32, DECIMATORS_HB_FILTER_ORDER> m_decimator32; // 5th stages
IntHalfbandFilterDB<qint32, DECIMATORS_HB_FILTER_ORDER> m_decimator64; // 6th stages
#endif // SDR_RX_SAMPLE_24BIT
#else // NO_DSP_SIMD
#ifdef SDR_RX_SAMPLE_24BIT
IntHalfbandFilterDB<qint64, DECIMATORS_HB_FILTER_ORDER> m_decimator2; // 1st stages
IntHalfbandFilterDB<qint64, DECIMATORS_HB_FILTER_ORDER> m_decimator4; // 2nd stages
IntHalfbandFilterDB<qint64, DECIMATORS_HB_FILTER_ORDER> m_decimator8; // 3rd stages
IntHalfbandFilterDB<qint64, DECIMATORS_HB_FILTER_ORDER> m_decimator16; // 4th stages
IntHalfbandFilterDB<qint64, DECIMATORS_HB_FILTER_ORDER> m_decimator32; // 5th stages
IntHalfbandFilterDB<qint64, DECIMATORS_HB_FILTER_ORDER> m_decimator64; // 6th stages
#else // SDR_RX_SAMPLE_24BIT
#ifdef USE_SSE4_1
IntHalfbandFilterEO1<DECIMATORS_HB_FILTER_ORDER> m_decimator2; // 1st stages
IntHalfbandFilterEO1<DECIMATORS_HB_FILTER_ORDER> m_decimator4; // 2nd stages
@ -346,15 +368,16 @@ private:
IntHalfbandFilterEO1<DECIMATORS_HB_FILTER_ORDER> m_decimator16; // 4th stages
IntHalfbandFilterEO1<DECIMATORS_HB_FILTER_ORDER> m_decimator32; // 5th stages
IntHalfbandFilterEO1<DECIMATORS_HB_FILTER_ORDER> m_decimator64; // 6th stages
#else
IntHalfbandFilterDB<qint32, DECIMATORS_HB_FILTER_ORDER> m_decimator2; // 1st stages
IntHalfbandFilterDB<qint32, DECIMATORS_HB_FILTER_ORDER> m_decimator4; // 2nd stages
IntHalfbandFilterDB<qint32, DECIMATORS_HB_FILTER_ORDER> m_decimator8; // 3rd stages
IntHalfbandFilterDB<qint32, DECIMATORS_HB_FILTER_ORDER> m_decimator16; // 4th stages
IntHalfbandFilterDB<qint32, DECIMATORS_HB_FILTER_ORDER> m_decimator32; // 5th stages
IntHalfbandFilterDB<qint32, DECIMATORS_HB_FILTER_ORDER> m_decimator64; // 6th stages
#endif
#endif
#else // USE_SSE4_1
IntHalfbandFilterDB<qint32, DECIMATORS_HB_FILTER_ORDER> m_decimator2; // 1st stages
IntHalfbandFilterDB<qint32, DECIMATORS_HB_FILTER_ORDER> m_decimator4; // 2nd stages
IntHalfbandFilterDB<qint32, DECIMATORS_HB_FILTER_ORDER> m_decimator8; // 3rd stages
IntHalfbandFilterDB<qint32, DECIMATORS_HB_FILTER_ORDER> m_decimator16; // 4th stages
IntHalfbandFilterDB<qint32, DECIMATORS_HB_FILTER_ORDER> m_decimator32; // 5th stages
IntHalfbandFilterDB<qint32, DECIMATORS_HB_FILTER_ORDER> m_decimator64; // 6th stages
#endif // USE_SSE4_1
#endif // SDR_RX_SAMPLE_24BIT
#endif // NO_DSP_SIMD
};
template<typename AccuType, typename T, uint SdrBits, uint InputBits>