HackRF output: FcPos parameter in REST API

This commit is contained in:
f4exb 2019-04-02 13:43:47 +02:00
parent b9a06b2966
commit 4e24dd954e
7 changed files with 60 additions and 3 deletions

View File

@ -132,7 +132,10 @@ bool HackRFOutput::start()
// mutexLocker.unlock();
applySettings(m_settings, true);
m_hackRFThread->setLog2Interpolation(m_settings.m_log2Interp);
m_hackRFThread->setSamplerate(m_settings.m_devSampleRate);
m_hackRFThread->setLog2Interpolation(m_settings.m_log2Interp);
m_hackRFThread->setFcPos((int) m_settings.m_fcPos);
m_hackRFThread->startWork();
@ -413,6 +416,9 @@ bool HackRFOutput::applySettings(const HackRFOutputSettings& settings, bool forc
if ((m_settings.m_LOppmTenths != settings.m_LOppmTenths) || force) {
reverseAPIKeys.append("LOppmTenths");
}
if ((m_settings.m_fcPos != settings.m_fcPos) || force) {
reverseAPIKeys.append("fcPos");
}
if ((m_settings.m_centerFrequency != settings.m_centerFrequency) ||
(m_settings.m_devSampleRate != settings.m_devSampleRate) ||
@ -571,6 +577,12 @@ int HackRFOutput::webapiSettingsPutPatch(
if (deviceSettingsKeys.contains("log2Interp")) {
settings.m_log2Interp = response.getHackRfOutputSettings()->getLog2Interp();
}
if (deviceSettingsKeys.contains("fcPos"))
{
int fcPos = response.getHackRfInputSettings()->getFcPos();
fcPos = fcPos < 0 ? 0 : fcPos > 2 ? 2 : fcPos;
settings.m_fcPos = (HackRFOutputSettings::fcPos_t) fcPos;
}
if (deviceSettingsKeys.contains("devSampleRate")) {
settings.m_devSampleRate = response.getHackRfOutputSettings()->getDevSampleRate();
}
@ -613,6 +625,7 @@ void HackRFOutput::webapiFormatDeviceSettings(SWGSDRangel::SWGDeviceSettings& re
response.getHackRfOutputSettings()->setBandwidth(settings.m_bandwidth);
response.getHackRfOutputSettings()->setVgaGain(settings.m_vgaGain);
response.getHackRfOutputSettings()->setLog2Interp(settings.m_log2Interp);
response.getHackRfOutputSettings()->setFcPos(settings.m_fcPos);
response.getHackRfOutputSettings()->setDevSampleRate(settings.m_devSampleRate);
response.getHackRfOutputSettings()->setBiasT(settings.m_biasT ? 1 : 0);
response.getHackRfOutputSettings()->setLnaExt(settings.m_lnaExt ? 1 : 0);
@ -683,6 +696,9 @@ void HackRFOutput::webapiReverseSendSettings(QList<QString>& deviceSettingsKeys,
if (deviceSettingsKeys.contains("log2Interp") || force) {
swgHackRFOutputSettings->setLog2Interp(settings.m_log2Interp);
}
if (deviceSettingsKeys.contains("fcPos") || force) {
swgHackRFOutputSettings->setFcPos((int) settings.m_fcPos);
}
if (deviceSettingsKeys.contains("devSampleRate") || force) {
swgHackRFOutputSettings->setDevSampleRate(settings.m_devSampleRate);
}

View File

@ -2828,6 +2828,10 @@ margin-bottom: 20px;
"log2Interp" : {
"type" : "integer"
},
"fcPos" : {
"type" : "integer",
"description" : "0=Infra 1=Supra 2=Center"
},
"devSampleRate" : {
"type" : "integer"
},
@ -24649,7 +24653,7 @@ except ApiException as e:
</div>
<div id="generator">
<div class="content">
Generated 2019-03-30T20:33:10.840+01:00
Generated 2019-04-02T13:22:46.589+02:00
</div>
</div>
</div>

View File

@ -53,6 +53,9 @@ HackRFOutputSettings:
type: integer
log2Interp:
type: integer
fcPos:
description: 0=Infra 1=Supra 2=Center
type: integer
devSampleRate:
type: integer
biasT:

View File

@ -53,6 +53,9 @@ HackRFOutputSettings:
type: integer
log2Interp:
type: integer
fcPos:
description: 0=Infra 1=Supra 2=Center
type: integer
devSampleRate:
type: integer
biasT:

View File

@ -2828,6 +2828,10 @@ margin-bottom: 20px;
"log2Interp" : {
"type" : "integer"
},
"fcPos" : {
"type" : "integer",
"description" : "0=Infra 1=Supra 2=Center"
},
"devSampleRate" : {
"type" : "integer"
},
@ -24649,7 +24653,7 @@ except ApiException as e:
</div>
<div id="generator">
<div class="content">
Generated 2019-03-30T20:33:10.840+01:00
Generated 2019-04-02T13:22:46.589+02:00
</div>
</div>
</div>

View File

@ -38,6 +38,8 @@ SWGHackRFOutputSettings::SWGHackRFOutputSettings() {
m_vga_gain_isSet = false;
log2_interp = 0;
m_log2_interp_isSet = false;
fc_pos = 0;
m_fc_pos_isSet = false;
dev_sample_rate = 0;
m_dev_sample_rate_isSet = false;
bias_t = 0;
@ -70,6 +72,8 @@ SWGHackRFOutputSettings::init() {
m_vga_gain_isSet = false;
log2_interp = 0;
m_log2_interp_isSet = false;
fc_pos = 0;
m_fc_pos_isSet = false;
dev_sample_rate = 0;
m_dev_sample_rate_isSet = false;
bias_t = 0;
@ -97,6 +101,7 @@ SWGHackRFOutputSettings::cleanup() {
if(reverse_api_address != nullptr) {
delete reverse_api_address;
}
@ -125,6 +130,8 @@ SWGHackRFOutputSettings::fromJsonObject(QJsonObject &pJson) {
::SWGSDRangel::setValue(&log2_interp, pJson["log2Interp"], "qint32", "");
::SWGSDRangel::setValue(&fc_pos, pJson["fcPos"], "qint32", "");
::SWGSDRangel::setValue(&dev_sample_rate, pJson["devSampleRate"], "qint32", "");
::SWGSDRangel::setValue(&bias_t, pJson["biasT"], "qint32", "");
@ -170,6 +177,9 @@ SWGHackRFOutputSettings::asJsonObject() {
if(m_log2_interp_isSet){
obj->insert("log2Interp", QJsonValue(log2_interp));
}
if(m_fc_pos_isSet){
obj->insert("fcPos", QJsonValue(fc_pos));
}
if(m_dev_sample_rate_isSet){
obj->insert("devSampleRate", QJsonValue(dev_sample_rate));
}
@ -245,6 +255,16 @@ SWGHackRFOutputSettings::setLog2Interp(qint32 log2_interp) {
this->m_log2_interp_isSet = true;
}
qint32
SWGHackRFOutputSettings::getFcPos() {
return fc_pos;
}
void
SWGHackRFOutputSettings::setFcPos(qint32 fc_pos) {
this->fc_pos = fc_pos;
this->m_fc_pos_isSet = true;
}
qint32
SWGHackRFOutputSettings::getDevSampleRate() {
return dev_sample_rate;
@ -325,6 +345,7 @@ SWGHackRFOutputSettings::isSet(){
if(m_bandwidth_isSet){ isObjectUpdated = true; break;}
if(m_vga_gain_isSet){ isObjectUpdated = true; break;}
if(m_log2_interp_isSet){ isObjectUpdated = true; break;}
if(m_fc_pos_isSet){ isObjectUpdated = true; break;}
if(m_dev_sample_rate_isSet){ isObjectUpdated = true; break;}
if(m_bias_t_isSet){ isObjectUpdated = true; break;}
if(m_lna_ext_isSet){ isObjectUpdated = true; break;}

View File

@ -57,6 +57,9 @@ public:
qint32 getLog2Interp();
void setLog2Interp(qint32 log2_interp);
qint32 getFcPos();
void setFcPos(qint32 fc_pos);
qint32 getDevSampleRate();
void setDevSampleRate(qint32 dev_sample_rate);
@ -97,6 +100,9 @@ private:
qint32 log2_interp;
bool m_log2_interp_isSet;
qint32 fc_pos;
bool m_fc_pos_isSet;
qint32 dev_sample_rate;
bool m_dev_sample_rate_isSet;