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Unset PLL lock status as soon as condition is lost
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parent
cdf51b99e9
commit
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@ -106,8 +106,6 @@ private:
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Real m_pilot_level;
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int m_lock_delay;
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int m_lock_cnt;
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int m_unlock_cnt;
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int m_unlock_delay;
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int m_pilot_periods;
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quint64 m_pps_cnt;
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quint64 m_sample_cnt;
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@ -41,9 +41,7 @@ PhaseLock::PhaseLock(Real freq, Real bandwidth, Real minsignal)
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// Set valid signal threshold.
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m_minsignal = minsignal;
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m_lock_delay = int(20.0 / bandwidth);
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m_unlock_delay = int(10.0 / bandwidth);
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m_lock_cnt = 0;
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m_unlock_cnt = 0;
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m_pilot_level = 0;
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m_psin = 0.0;
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m_pcos = 1.0;
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@ -105,9 +103,7 @@ void PhaseLock::configure(Real freq, Real bandwidth, Real minsignal)
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// Set valid signal threshold.
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m_minsignal = minsignal;
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m_lock_delay = int(20.0 / bandwidth);
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m_unlock_delay = int(10.0 / bandwidth);
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m_lock_cnt = 0;
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m_unlock_cnt = 0;
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m_pilot_level = 0;
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// Create 2nd order filter for I/Q representation of phase error.
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@ -327,21 +323,10 @@ void PhaseLock::process(const Real& sample_in, Real *samples_out)
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{
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m_lock_cnt += 1; // n
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}
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else
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{
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m_unlock_cnt = 0;
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}
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}
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else
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{
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if (m_unlock_cnt < m_unlock_delay)
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{
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m_unlock_cnt += 1;
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}
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else
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{
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m_lock_cnt = 0;
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}
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m_lock_cnt = 0;
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}
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// Drop PPS events when pilot not locked.
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