VE7UWU/sdrangel
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7,140 Commits 3 Branches 369 Tags 185 MiB
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5 Commits

Author SHA1 Message Date
Christoph Berg
0d6a3a4f47 Fix some typos spotted by lintian 2021-01-19 12:36:56 +01:00
Jon Beniston
8cd3bb9b47 Widen combo box, so TX/RX fits in 2020-10-27 09:57:28 +00:00
Jon Beniston
2400c4643c Add master clock rate display to GUI. 
Calculate full range of sample rates supported, by varying master clock.
Check if requested sample rate can be met.
 2020-10-26 14:39:12 +00:00
Jon Beniston
d8ae6fc765 Import USRP support. 
Add LO offset support.
Only set tx/rx_bandwidth after getting tx stream, to reduce TX LO leakage for <10MHz bandwidths.
Check for reference and LO lock before getting streams.
 2020-10-25 11:57:48 +00:00
Jon Beniston
d4aa5d75b5 Add USRP device support. 2020-10-02 22:45:28 +01:00