VE7UWU/sdrangel
1
0
Fork 0
mirror of https://github.com/f4exb/sdrangel.git synced 2024-11-23 08:28:36 -05:00
Code Issues Projects Releases Wiki Activity
3,574 Commits 3 Branches 369 Tags 185 MiB
24080bafd3
Commit Graph

6 Commits

Author SHA1 Message Date
f4exb
373aa6960f Test Source: add phase imbalance control 2018-01-31 22:34:55 +01:00
f4exb
2ddcb8c358 Differentiate Rx and Tx DSP sample sizes 2018-01-22 08:46:05 +01:00
f4exb
732561152b 24 bit DSP fix 2018-01-22 02:49:06 +01:00
f4exb
bd8c916dd4 TestSource: implemente DC and IQ bias and corrections 2018-01-14 11:58:36 +01:00
f4exb
e3575d5f5f TestSource: fixes 2018-01-14 04:43:24 +01:00
f4exb
34f6b796b7 TestSource: first implementation 2018-01-14 02:25:24 +01:00