VE7UWU/sdrangel
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5,084 Commits 3 Branches 367 Tags 185 MiB
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4 Commits

Author SHA1 Message Date
f4exb
733f3d4ba4 XTRX: make clock gen setting consistent 2019-01-04 04:45:52 +01:00
f4exb
56102acc96 XTRX: set block size back to 8k 2019-01-03 13:05:11 +01:00
f4exb
e2085e8c29 XTRX input: refactoring to prepare MI operation 2018-12-31 01:43:24 +01:00
f4exb
ecaa7f61b0 XTRX input: set global gain (auto) a la LimeSuite 2018-12-30 10:13:17 +01:00