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Commit Graph

506 Commits

Author SHA1 Message Date
f4exb
8d69272a76 Threaded baseband source/sink stop before delete 2018-03-16 10:15:35 +01:00
f4exb
60568de298 Always delete BasebandSampleSink::MsgThreadedSink on return of processing 2018-03-06 08:40:46 +01:00
f4exb
9dacbb6d83 qrtplib: NFM demod implementation. Also solve issue Cannot create children for a parent that is in a different thread on UDP sink used for copy audio to UDP 2018-03-06 02:23:47 +01:00
f4exb
980192548d Adapt to MSVC linker: removed SDRANGEL_API 2018-03-03 21:19:59 +01:00
f4exb
c22d146376 Adapt to MSVC linker 2018-03-03 20:23:38 +01:00
f4exb
2b1d5f0838 Fixed -Woverloaded-virtual warnings 2018-03-03 10:06:47 +01:00
f4exb
34bdfbf495 class vs struct mismatch fixes 2018-03-01 09:14:37 +01:00
f4exb
e53da4e9a8 DATV demod: make sure that when baseband rate changes the channelizer is reconfigured to get all available bandwidth 2018-02-25 03:22:30 +01:00
f4exb
2e5cfcafee PVS-Studio static analysis corrections (3) issue #137 2018-02-24 10:29:27 +01:00
f4exb
2b846f5d28 PVS-Studio static analysis corrections (2) issue #137 2018-02-22 03:04:42 +01:00
f4exb
f01b90094b PVS-Studio static analysis corrections (1) issue #137 2018-02-21 18:54:59 +01:00
f4exb
ffbc08841e Fixed possible memory leak in green FFT (g_fft) 2018-02-18 00:20:37 +01:00
f4exb
31c3b11194 DSP source enging DC and IQ correction: reset averages when changing settings 2018-02-16 01:23:49 +01:00
f4exb
b680b11206 AM demod: fixed volume AGC 2018-02-16 00:43:21 +01:00
f4exb
34081dd50b NCOF: secure possible index overflow by 1 due to float to int conversion 2018-02-15 23:58:01 +01:00
f4exb
c827879613 AF Squelch: removed useless default constructor 2018-02-15 18:47:46 +01:00
f4exb
c632e6e55a DSP moving average: corrected wrong index calculation 2018-02-15 16:35:43 +01:00
f4exb
af5579ad7d Removed useless class PIDController 2018-02-14 20:12:51 +01:00
f4exb
e9c8dad663 Fixed DSP device source/sink run command 2018-02-14 17:33:08 +01:00
f4exb
e8537d6582 Web API and related: fixed memory leaks and some malfunctions 2018-02-14 11:27:57 +01:00
f4exb
4b2dfd488e IQ imbalance fix: the I branch has to remain the reference 2018-02-11 01:42:35 +01:00
f4exb
70ce8f1044 Perseus support (6) 2018-02-07 23:44:20 +01:00
f4exb
6b26543655 Test Source: new combo box for auto correction options (2) 2018-02-04 22:52:31 +01:00
f4exb
1efc509296 DC and IQ correction: added a defiend out integer version (no advantage over floating point) 2018-02-04 18:20:16 +01:00
f4exb
b9b2c41ba2 IQ correction with phase imbalance: floating point implementation 2018-02-04 10:49:13 +01:00
f4exb
24080bafd3 Alpha AGC cleanup 2018-02-03 17:07:37 +01:00
f4exb
a1c84718ef Simple AGC cleanup 2018-02-03 17:06:16 +01:00
f4exb
d43ecaf8f7 AirspyHF (float): working plugin 2018-02-02 02:12:49 +01:00
f4exb
be049374ad Improved DC offset correction 2018-02-01 02:45:55 +01:00
f4exb
373aa6960f Test Source: add phase imbalance control 2018-01-31 22:34:55 +01:00
f4exb
ba4d9ec0ca Airspy HF: added missing files to the libairspyhf built in libary cmake file 2018-01-26 03:00:10 +01:00
f4exb
cc1033b3c5 File Input and record: 16/24 bit DSP compatibility: bug fixes 2018-01-25 23:52:36 +01:00
f4exb
12a97b9644 File Input and record: 16/24 bit DSP compatibility 2018-01-25 18:39:54 +01:00
f4exb
a78997b5e7 24 bit DSP build: corrected IQ imbalance calculation for any sample size 2018-01-25 00:48:11 +01:00
f4exb
3d77c9af9b SDRDaemon input: adaptation for 24 bit Rx DSP 2018-01-24 08:49:18 +01:00
f4exb
61a16eade9 Use always 16 bit DSP on Tx side 2018-01-22 10:46:57 +01:00
f4exb
2ddcb8c358 Differentiate Rx and Tx DSP sample sizes 2018-01-22 08:46:05 +01:00
f4exb
bacc6659b0 24 bit DSP: use a different define for Tx chain so that it can stay on 16 bit DSP 2018-01-22 03:00:08 +01:00
f4exb
732561152b 24 bit DSP fix 2018-01-22 02:49:06 +01:00
f4exb
ad219d50cc Implemented 24 bit internal DSP (with bugs ...) 2018-01-21 21:48:36 +01:00
f4exb
08ce7f423b Templatize the accumulator type of integer half-band filters (non SIMD) 2018-01-21 19:39:51 +01:00
f4exb
8cd462a338 IntHalfbandFilterDB: use specific storeSample method when samples are defined om 32 bit wide fields 2018-01-21 12:12:20 +01:00
f4exb
491b8a6d33 Replaced hardcoded bit scaling literals by defines 2018-01-21 10:57:04 +01:00
f4exb
f34750716a Added define for 32 bit sample compilation 2018-01-21 01:45:58 +01:00
f4exb
5a594629b3 Use FixReal in place of qint16 2018-01-21 01:19:35 +01:00
f4exb
4db248c26a Halfband filters traits: use minimal scaling value so that the smallest coefficient is not zero. Avoids int32 multiplication overflow for large enough decimation factors and sample bit size 2018-01-18 00:21:50 +01:00
f4exb
c7e1526930 Added decimation class with unsigned to signed conversion with shift. Applied to RTL-SDR 2018-01-16 00:01:38 +01:00
f4exb
18fa3b6156 RTL-SDR: corrected bit shifts for 8 bit samples and corrected RTL-SDR unsigned to signed conversion 2018-01-15 23:37:26 +01:00
f4exb
45e04f06ae Compromise on 8 bit decimator pre process shift constants so that it pads to 15 bits instead of 16. Prevents saturation in all cases. 2018-01-14 05:12:24 +01:00
f4exb
176792c0ce Corrected 8 bit decimator pre process shift constants 2018-01-14 04:43:04 +01:00