VE7UWU/sdrangel
1
0
Fork 0
mirror of https://github.com/f4exb/sdrangel.git synced 2024-11-17 22:01:45 -05:00
Code Issues Projects Releases Wiki Activity
8,699 Commits 3 Branches 369 Tags 185 MiB
cd8990907d
Commit Graph

6 Commits

Author SHA1 Message Date
f4exb
d2fbdad736 USRP input: Make settings assignments atomic. Part of #1329 2022-10-29 21:55:52 +02:00
f4exb
249db03cf3 Massive UI revamping (v7): fixed device workspace index save/restore and removed useless geometry blobs. Fixes #1207 2022-04-20 20:08:41 +02:00
f4exb
aad90aeabc Massive UI revamping (v7): devices basic 2022-04-07 16:32:03 +02:00
Jon Beniston
2400c4643c Add master clock rate display to GUI. 
Calculate full range of sample rates supported, by varying master clock.
Check if requested sample rate can be met.
 2020-10-26 14:39:12 +00:00
Jon Beniston
d8ae6fc765 Import USRP support. 
Add LO offset support.
Only set tx/rx_bandwidth after getting tx stream, to reduce TX LO leakage for <10MHz bandwidths.
Check for reference and LO lock before getting streams.
 2020-10-25 11:57:48 +00:00
Jon Beniston
d4aa5d75b5 Add USRP device support. 2020-10-02 22:45:28 +01:00