VE7UWU/sdrangel
1
0
Fork 0
mirror of https://github.com/f4exb/sdrangel.git synced 2024-12-23 18:15:45 -05:00
Code Issues Projects Releases Wiki Activity
8,442 Commits 4 Branches 370 Tags 186 MiB
f034319c22
Commit Graph

2 Commits

Author SHA1 Message Date
Jon Beniston
dfbeffb0a0 Fix gcc warnings 2021-03-05 13:54:06 +00:00
Jon Beniston
5d5b221e83 Add Costas Loop PLL in Channel Analyzer 
Add loop bandwidth and other PLL controls to Channel Analyzer GUI.
Fix bug where PLL lock frequency would be incorrect by the decimation
factor.
 2021-03-05 13:37:49 +00:00