mirror of https://github.com/f4exb/sdrangel.git
368 lines
12 KiB
C++
368 lines
12 KiB
C++
///////////////////////////////////////////////////////////////////////////////////
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// Copyright (C) 2015, 2017-2019 Edouard Griffiths, F4EXB <f4exb06@gmail.com> //
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// Copyright (C) 2016 Ziga S <ziga.svetina@gmail.com> //
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// Copyright (C) 2020 Kacper Michajłow <kasper93@gmail.com> //
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// //
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// This program is free software; you can redistribute it and/or modify //
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// it under the terms of the GNU General Public License as published by //
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// the Free Software Foundation as version 3 of the License, or //
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// (at your option) any later version. //
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// //
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// This program is distributed in the hope that it will be useful, //
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// but WITHOUT ANY WARRANTY; without even the implied warranty of //
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the //
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// GNU General Public License V3 for more details. //
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// //
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// You should have received a copy of the GNU General Public License //
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// along with this program. If not, see <http://www.gnu.org/licenses/>. //
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///////////////////////////////////////////////////////////////////////////////////
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#include <cmath>
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#include "dsp/phaselock.h"
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// Construct phase-locked loop.
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PhaseLock::PhaseLock(Real freq, Real bandwidth, Real minsignal)
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{
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/*
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* This is a type-2, 4th order phase-locked loop.
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*
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* Open-loop transfer function:
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* G(z) = K * (z - q1) / ((z - p1) * (z - p2) * (z - 1) * (z - 1))
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* K = 3.788 * (bandwidth * 2 * Pi)**3
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* q1 = exp(-0.1153 * bandwidth * 2*Pi)
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* p1 = exp(-1.146 * bandwidth * 2*Pi)
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* p2 = exp(-5.331 * bandwidth * 2*Pi)
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*
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* I don't understand what I'm doing; hopefully it will work.
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*/
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// Set min/max locking frequencies.
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m_minfreq = (freq - bandwidth) * 2.0 * M_PI;
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m_maxfreq = (freq + bandwidth) * 2.0 * M_PI;
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// Set valid signal threshold.
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m_minsignal = minsignal;
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m_lock_delay = int(20.0 / bandwidth);
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m_lock_cnt = 0;
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m_pilot_level = 0;
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m_psin = 0.0;
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m_pcos = 1.0;
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// Create 2nd order filter for I/Q representation of phase error.
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// Filter has two poles, unit DC gain.
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double p1 = exp(-1.146 * bandwidth * 2.0 * M_PI);
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double p2 = exp(-5.331 * bandwidth * 2.0 * M_PI);
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m_phasor_a1 = - p1 - p2;
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m_phasor_a2 = p1 * p2;
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m_phasor_b0 = 1 + m_phasor_a1 + m_phasor_a2;
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// Create loop filter to stabilize the loop.
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double q1 = exp(-0.1153 * bandwidth * 2.0 * M_PI);
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m_loopfilter_b0 = 0.62 * bandwidth * 2.0 * M_PI;
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m_loopfilter_b1 = - m_loopfilter_b0 * q1;
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// After the loop filter, the phase error is integrated to produce
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// the frequency. Then the frequency is integrated to produce the phase.
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// These integrators form the two remaining poles, both at z = 1.
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// Initialize frequency and phase.
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m_freq = freq * 2.0 * M_PI;
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m_phase = 0;
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m_phasor_i1 = 0;
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m_phasor_i2 = 0;
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m_phasor_q1 = 0;
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m_phasor_q2 = 0;
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m_loopfilter_x1 = 0;
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// Initialize PPS generator.
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m_pilot_periods = 0;
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m_pps_cnt = 0;
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m_sample_cnt = 0;
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}
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void PhaseLock::configure(Real freq, Real bandwidth, Real minsignal)
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{
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qDebug("PhaseLock::configure: freq: %f bandwidth: %f minsignal: %f", freq, bandwidth, minsignal);
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/*
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* This is a type-2, 4th order phase-locked loop.
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*
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* Open-loop transfer function:
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* G(z) = K * (z - q1) / ((z - p1) * (z - p2) * (z - 1) * (z - 1))
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* K = 3.788 * (bandwidth * 2 * Pi)**3
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* q1 = exp(-0.1153 * bandwidth * 2*Pi)
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* p1 = exp(-1.146 * bandwidth * 2*Pi)
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* p2 = exp(-5.331 * bandwidth * 2*Pi)
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*
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* I don't understand what I'm doing; hopefully it will work.
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*/
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// Set min/max locking frequencies.
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m_minfreq = (freq - bandwidth) * 2.0 * M_PI;
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m_maxfreq = (freq + bandwidth) * 2.0 * M_PI;
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// Set valid signal threshold.
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m_minsignal = minsignal;
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m_lock_delay = int(20.0 / bandwidth);
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m_lock_cnt = 0;
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m_pilot_level = 0;
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// Create 2nd order filter for I/Q representation of phase error.
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// Filter has two poles, unit DC gain.
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double p1 = exp(-1.146 * bandwidth * 2.0 * M_PI);
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double p2 = exp(-5.331 * bandwidth * 2.0 * M_PI);
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m_phasor_a1 = - p1 - p2;
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m_phasor_a2 = p1 * p2;
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m_phasor_b0 = 1 + m_phasor_a1 + m_phasor_a2;
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// Create loop filter to stabilize the loop.
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double q1 = exp(-0.1153 * bandwidth * 2.0 * M_PI);
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m_loopfilter_b0 = 0.62 * bandwidth * 2.0 * M_PI;
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m_loopfilter_b1 = - m_loopfilter_b0 * q1;
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// After the loop filter, the phase error is integrated to produce
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// the frequency. Then the frequency is integrated to produce the phase.
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// These integrators form the two remaining poles, both at z = 1.
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// Initialize frequency and phase.
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m_freq = freq * 2.0 * M_PI;
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m_phase = 0;
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m_phasor_i1 = 0;
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m_phasor_i2 = 0;
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m_phasor_q1 = 0;
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m_phasor_q2 = 0;
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m_loopfilter_x1 = 0;
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// Initialize PPS generator.
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m_pilot_periods = 0;
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m_pps_cnt = 0;
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m_sample_cnt = 0;
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}
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// Process samples. Bufferized version
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void PhaseLock::process(const std::vector<Real>& samples_in, std::vector<Real>& samples_out)
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{
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unsigned int n = samples_in.size();
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samples_out.resize(n);
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bool was_locked = (m_lock_cnt >= m_lock_delay);
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m_pps_events.clear();
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if (n > 0)
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m_pilot_level = 1000.0;
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for (unsigned int i = 0; i < n; i++) {
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// Generate locked pilot tone.
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Real psin = sin(m_phase);
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Real pcos = cos(m_phase);
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// Generate double-frequency output.
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// sin(2*x) = 2 * sin(x) * cos(x)
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samples_out[i] = 2 * psin * pcos;
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// Multiply locked tone with input.
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Real x = samples_in[i];
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Real phasor_i = psin * x;
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Real phasor_q = pcos * x;
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// Run IQ phase error through low-pass filter.
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phasor_i = m_phasor_b0 * phasor_i
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- m_phasor_a1 * m_phasor_i1
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- m_phasor_a2 * m_phasor_i2;
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phasor_q = m_phasor_b0 * phasor_q
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- m_phasor_a1 * m_phasor_q1
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- m_phasor_a2 * m_phasor_q2;
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m_phasor_i2 = m_phasor_i1;
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m_phasor_i1 = phasor_i;
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m_phasor_q2 = m_phasor_q1;
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m_phasor_q1 = phasor_q;
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// Convert I/Q ratio to estimate of phase error.
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Real phase_err;
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if (phasor_i > std::abs(phasor_q)) {
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// We are within +/- 45 degrees from lock.
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// Use simple linear approximation of arctan.
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phase_err = phasor_q / phasor_i;
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} else if (phasor_q > 0) {
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// We are lagging more than 45 degrees behind the input.
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phase_err = 1;
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} else {
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// We are more than 45 degrees ahead of the input.
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phase_err = -1;
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}
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// Detect pilot level (conservative).
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m_pilot_level = std::min(m_pilot_level, phasor_i);
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// Run phase error through loop filter and update frequency estimate.
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m_freq += m_loopfilter_b0 * phase_err
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+ m_loopfilter_b1 * m_loopfilter_x1;
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m_loopfilter_x1 = phase_err;
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// Limit frequency to allowable range.
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m_freq = std::max(m_minfreq, std::min(m_maxfreq, m_freq));
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// Update locked phase.
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m_phase += m_freq;
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if (m_phase > 2.0 * M_PI) {
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m_phase -= 2.0 * M_PI;
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m_pilot_periods++;
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// Generate pulse-per-second.
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if (m_pilot_periods == pilot_frequency) {
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m_pilot_periods = 0;
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if (was_locked) {
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struct PpsEvent ev;
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ev.pps_index = m_pps_cnt;
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ev.sample_index = m_sample_cnt + i;
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ev.block_position = double(i) / double(n);
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m_pps_events.push_back(ev);
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m_pps_cnt++;
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}
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}
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}
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}
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// Update lock status.
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if (2 * m_pilot_level > m_minsignal) {
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if (m_lock_cnt < m_lock_delay)
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m_lock_cnt += n;
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} else {
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m_lock_cnt = 0;
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}
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// Drop PPS events when pilot not locked.
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if (m_lock_cnt < m_lock_delay) {
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m_pilot_periods = 0;
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m_pps_cnt = 0;
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m_pps_events.clear();
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}
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// Update sample counter.
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m_sample_cnt += n;
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}
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// Process samples. Multiple output
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void PhaseLock::process(const Real& sample_in, Real *samples_out)
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{
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m_pps_events.clear();
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// Generate locked pilot tone.
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m_psin = sin(m_phase);
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m_pcos = cos(m_phase);
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// Generate output
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processPhase(samples_out);
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// Multiply locked tone with input.
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Real phasor_i = m_psin * sample_in;
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Real phasor_q = m_pcos * sample_in;
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// Actual PLL
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process_phasor(phasor_i, phasor_q);
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}
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void PhaseLock::process(const Real& real_in, const Real& imag_in, Real *samples_out)
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{
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m_pps_events.clear();
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// Generate locked pilot tone.
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m_psin = sin(m_phase);
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m_pcos = cos(m_phase);
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// Generate output
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processPhase(samples_out);
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// Multiply locked tone with input.
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Real phasor_i = m_psin * real_in - m_pcos * imag_in;
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Real phasor_q = m_pcos * real_in + m_psin * imag_in;
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// Actual PLL
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process_phasor(phasor_i, phasor_q);
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}
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void PhaseLock::process_phasor(Real& phasor_i, Real& phasor_q)
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{
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// Run IQ phase error through low-pass filter.
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phasor_i = m_phasor_b0 * phasor_i
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- m_phasor_a1 * m_phasor_i1
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- m_phasor_a2 * m_phasor_i2;
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phasor_q = m_phasor_b0 * phasor_q
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- m_phasor_a1 * m_phasor_q1
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- m_phasor_a2 * m_phasor_q2;
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m_phasor_i2 = m_phasor_i1;
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m_phasor_i1 = phasor_i;
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m_phasor_q2 = m_phasor_q1;
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m_phasor_q1 = phasor_q;
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// Convert I/Q ratio to estimate of phase error.
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Real phase_err;
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if (phasor_i > std::abs(phasor_q)) {
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// We are within +/- 45 degrees from lock.
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// Use simple linear approximation of arctan.
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phase_err = phasor_q / phasor_i;
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} else if (phasor_q > 0) {
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// We are lagging more than 45 degrees behind the input.
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phase_err = 1;
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} else {
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// We are more than 45 degrees ahead of the input.
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phase_err = -1;
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}
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// Detect pilot level (conservative).
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// m_pilot_level = std::min(m_pilot_level, phasor_i);
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m_pilot_level = phasor_i;
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// Run phase error through loop filter and update frequency estimate.
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m_freq += m_loopfilter_b0 * phase_err
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+ m_loopfilter_b1 * m_loopfilter_x1;
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m_loopfilter_x1 = phase_err;
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// Limit frequency to allowable range.
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m_freq = std::max(m_minfreq, std::min(m_maxfreq, m_freq));
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// Update locked phase.
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m_phase += m_freq;
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if (m_phase > 2.0 * M_PI)
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{
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m_phase -= 2.0 * M_PI;
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m_pilot_periods++;
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// Generate pulse-per-second.
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if (m_pilot_periods == pilot_frequency)
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{
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m_pilot_periods = 0;
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}
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}
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// Update lock status.
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if (2 * m_pilot_level > m_minsignal)
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{
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if (m_lock_cnt < m_lock_delay)
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{
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m_lock_cnt += 1; // n
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}
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}
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else
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{
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m_lock_cnt = 0;
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}
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// Drop PPS events when pilot not locked.
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if (m_lock_cnt < m_lock_delay) {
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m_pilot_periods = 0;
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m_pps_cnt = 0;
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m_pps_events.clear();
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}
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// Update sample counter.
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m_sample_cnt += 1; // n
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}
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