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https://github.com/f4exb/sdrangel.git
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117 lines
4.2 KiB
C++
117 lines
4.2 KiB
C++
/* amd.h
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This file is part of a program that implements a Software-Defined Radio.
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Copyright (C) 2012, 2013 Warren Pratt, NR0V
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Copyright (C) 2024 Edouard Griffiths, F4EXB Adapted to SDRangel
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This program is free software; you can redistribute it and/or
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modify it under the terms of the GNU General Public License
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as published by the Free Software Foundation; either version 2
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of the License, or (at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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The author can be reached by email at
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warren@wpratt.com
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*/
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#ifndef wdsp_amd_hpp
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#define wdsp_amd_hpp
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// ff defines for sbdemod
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#ifndef STAGES
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#define STAGES 7
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#endif
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#ifndef OUT_IDX
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#define OUT_IDX (3 * STAGES)
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#endif
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#include "export.h"
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namespace WDSP {
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class RXA;
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class WDSP_API AMD {
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public:
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int run;
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int buff_size; // buffer size
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float *in_buff; // pointer to input buffer
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float *out_buff; // pointer to output buffer
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int mode; // demodulation mode
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float sample_rate; // sample rate
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float dc; // dc component in demodulated output
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float fmin; // pll - minimum carrier freq to lock
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float fmax; // pll - maximum carrier freq to lock
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float omega_min; // pll - minimum lock check parameter
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float omega_max; // pll - maximum lock check parameter
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float zeta; // pll - damping factor; as coded, must be <=1.0
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float omegaN; // pll - natural frequency
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float phs; // pll - phase accumulator
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float omega; // pll - locked pll frequency
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float fil_out; // pll - filter output
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float g1, g2; // pll - filter gain parameters
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float tauR; // carrier removal time constant
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float tauI; // carrier insertion time constant
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float mtauR; // carrier removal multiplier
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float onem_mtauR; // 1.0 - carrier_removal_multiplier
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float mtauI; // carrier insertion multiplier
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float onem_mtauI; // 1.0 - carrier_insertion_multiplier
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float a[3 * STAGES + 3]; // Filter a variables
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float b[3 * STAGES + 3]; // Filter b variables
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float c[3 * STAGES + 3]; // Filter c variables
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float d[3 * STAGES + 3]; // Filter d variables
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float c0[STAGES]; // Filter coefficients - path 0
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float c1[STAGES]; // Filter coefficients - path 1
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float dsI; // delayed sample, I path
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float dsQ; // delayed sample, Q path
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float dc_insert; // dc component to insert in output
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int sbmode; // sideband mode
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int levelfade; // Fade Leveler switch
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static AMD* create_amd
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(
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int run,
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int buff_size,
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float *in_buff,
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float *out_buff,
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int mode,
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int levelfade,
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int sbmode,
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int sample_rate,
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float fmin,
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float fmax,
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float zeta,
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float omegaN,
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float tauR,
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float tauI
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);
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static void init_amd (AMD *a);
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static void destroy_amd (AMD *a);
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static void flush_amd (AMD *a);
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static void xamd (AMD *a);
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static void setBuffers_amd (AMD *a, float* in, float* out);
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static void setSamplerate_amd (AMD *a, int rate);
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static void setSize_amd (AMD *a, int size);
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// RXA Properties
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static void SetAMDRun(RXA& rxa, int run);
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static void SetAMDSBMode(RXA& rxa, int sbmode);
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static void SetAMDFadeLevel(RXA& rxa, int levelfade);
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};
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} // namespace WDSP
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#endif
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