2005-08-19 13:59:31 -04:00
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/*
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* Copyright (c) 2005 Cisco Systems. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* $Id: mthca_srq.c 3047 2005-08-10 03:59:35Z roland $
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*/
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2005-11-07 03:59:43 -05:00
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#include <linux/slab.h>
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#include <linux/string.h>
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2005-08-19 13:59:31 -04:00
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#include "mthca_dev.h"
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#include "mthca_cmd.h"
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#include "mthca_memfree.h"
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#include "mthca_wqe.h"
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enum {
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MTHCA_MAX_DIRECT_SRQ_SIZE = 4 * PAGE_SIZE
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};
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struct mthca_tavor_srq_context {
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__be64 wqe_base_ds; /* low 6 bits is descriptor size */
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__be32 state_pd;
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__be32 lkey;
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__be32 uar;
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__be32 wqe_cnt;
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u32 reserved[2];
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};
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struct mthca_arbel_srq_context {
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__be32 state_logsize_srqn;
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__be32 lkey;
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__be32 db_index;
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__be32 logstride_usrpage;
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__be64 wqe_base;
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__be32 eq_pd;
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__be16 limit_watermark;
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__be16 wqe_cnt;
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u16 reserved1;
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__be16 wqe_counter;
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u32 reserved2[3];
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};
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static void *get_wqe(struct mthca_srq *srq, int n)
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{
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if (srq->is_direct)
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return srq->queue.direct.buf + (n << srq->wqe_shift);
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else
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return srq->queue.page_list[(n << srq->wqe_shift) >> PAGE_SHIFT].buf +
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((n << srq->wqe_shift) & (PAGE_SIZE - 1));
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}
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/*
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* Return a pointer to the location within a WQE that we're using as a
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2005-10-30 16:07:03 -05:00
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* link when the WQE is in the free list. We use the imm field
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* because in the Tavor case, posting a WQE may overwrite the next
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* segment of the previous WQE, but a receive WQE will never touch the
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* imm field. This avoids corrupting our free list if the previous
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* WQE has already completed and been put on the free list when we
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* post the next WQE.
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2005-08-19 13:59:31 -04:00
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*/
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static inline int *wqe_to_link(void *wqe)
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{
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2005-10-30 16:07:03 -05:00
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return (int *) (wqe + offsetof(struct mthca_next_seg, imm));
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2005-08-19 13:59:31 -04:00
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}
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static void mthca_tavor_init_srq_context(struct mthca_dev *dev,
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struct mthca_pd *pd,
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struct mthca_srq *srq,
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struct mthca_tavor_srq_context *context)
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{
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memset(context, 0, sizeof *context);
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context->wqe_base_ds = cpu_to_be64(1 << (srq->wqe_shift - 4));
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context->state_pd = cpu_to_be32(pd->pd_num);
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context->lkey = cpu_to_be32(srq->mr.ibmr.lkey);
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if (pd->ibpd.uobject)
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context->uar =
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cpu_to_be32(to_mucontext(pd->ibpd.uobject->context)->uar.index);
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else
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context->uar = cpu_to_be32(dev->driver_uar.index);
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}
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static void mthca_arbel_init_srq_context(struct mthca_dev *dev,
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struct mthca_pd *pd,
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struct mthca_srq *srq,
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struct mthca_arbel_srq_context *context)
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{
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int logsize;
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memset(context, 0, sizeof *context);
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logsize = long_log2(srq->max) + srq->wqe_shift;
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context->state_logsize_srqn = cpu_to_be32(logsize << 24 | srq->srqn);
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context->lkey = cpu_to_be32(srq->mr.ibmr.lkey);
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context->db_index = cpu_to_be32(srq->db_index);
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context->logstride_usrpage = cpu_to_be32((srq->wqe_shift - 4) << 29);
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if (pd->ibpd.uobject)
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context->logstride_usrpage |=
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cpu_to_be32(to_mucontext(pd->ibpd.uobject->context)->uar.index);
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else
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context->logstride_usrpage |= cpu_to_be32(dev->driver_uar.index);
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context->eq_pd = cpu_to_be32(MTHCA_EQ_ASYNC << 24 | pd->pd_num);
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}
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static void mthca_free_srq_buf(struct mthca_dev *dev, struct mthca_srq *srq)
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{
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mthca_buf_free(dev, srq->max << srq->wqe_shift, &srq->queue,
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srq->is_direct, &srq->mr);
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kfree(srq->wrid);
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}
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static int mthca_alloc_srq_buf(struct mthca_dev *dev, struct mthca_pd *pd,
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struct mthca_srq *srq)
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{
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struct mthca_data_seg *scatter;
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void *wqe;
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int err;
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int i;
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if (pd->ibpd.uobject)
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return 0;
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srq->wrid = kmalloc(srq->max * sizeof (u64), GFP_KERNEL);
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if (!srq->wrid)
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return -ENOMEM;
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err = mthca_buf_alloc(dev, srq->max << srq->wqe_shift,
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MTHCA_MAX_DIRECT_SRQ_SIZE,
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&srq->queue, &srq->is_direct, pd, 1, &srq->mr);
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if (err) {
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kfree(srq->wrid);
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return err;
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}
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/*
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* Now initialize the SRQ buffer so that all of the WQEs are
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* linked into the list of free WQEs. In addition, set the
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* scatter list L_Keys to the sentry value of 0x100.
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*/
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for (i = 0; i < srq->max; ++i) {
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wqe = get_wqe(srq, i);
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*wqe_to_link(wqe) = i < srq->max - 1 ? i + 1 : -1;
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for (scatter = wqe + sizeof (struct mthca_next_seg);
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(void *) scatter < wqe + (1 << srq->wqe_shift);
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++scatter)
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scatter->lkey = cpu_to_be32(MTHCA_INVAL_LKEY);
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}
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2005-09-19 12:17:56 -04:00
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srq->last = get_wqe(srq, srq->max - 1);
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2005-08-19 13:59:31 -04:00
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return 0;
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}
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int mthca_alloc_srq(struct mthca_dev *dev, struct mthca_pd *pd,
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struct ib_srq_attr *attr, struct mthca_srq *srq)
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{
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struct mthca_mailbox *mailbox;
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u8 status;
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int ds;
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int err;
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/* Sanity check SRQ size before proceeding */
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2005-10-10 16:48:07 -04:00
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if (attr->max_wr > dev->limits.max_srq_wqes ||
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attr->max_sge > dev->limits.max_sg)
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2005-08-19 13:59:31 -04:00
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return -EINVAL;
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srq->max = attr->max_wr;
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srq->max_gs = attr->max_sge;
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srq->counter = 0;
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if (mthca_is_memfree(dev))
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srq->max = roundup_pow_of_two(srq->max + 1);
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2006-01-04 17:42:39 -05:00
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ds = max(64UL,
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2005-08-19 13:59:31 -04:00
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roundup_pow_of_two(sizeof (struct mthca_next_seg) +
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srq->max_gs * sizeof (struct mthca_data_seg)));
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srq->wqe_shift = long_log2(ds);
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srq->srqn = mthca_alloc(&dev->srq_table.alloc);
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if (srq->srqn == -1)
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return -ENOMEM;
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if (mthca_is_memfree(dev)) {
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err = mthca_table_get(dev, dev->srq_table.table, srq->srqn);
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if (err)
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goto err_out;
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if (!pd->ibpd.uobject) {
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srq->db_index = mthca_alloc_db(dev, MTHCA_DB_TYPE_SRQ,
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srq->srqn, &srq->db);
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if (srq->db_index < 0) {
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err = -ENOMEM;
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goto err_out_icm;
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}
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}
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}
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mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL);
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if (IS_ERR(mailbox)) {
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err = PTR_ERR(mailbox);
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goto err_out_db;
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}
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err = mthca_alloc_srq_buf(dev, pd, srq);
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if (err)
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goto err_out_mailbox;
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spin_lock_init(&srq->lock);
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atomic_set(&srq->refcount, 1);
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init_waitqueue_head(&srq->wait);
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if (mthca_is_memfree(dev))
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mthca_arbel_init_srq_context(dev, pd, srq, mailbox->buf);
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else
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mthca_tavor_init_srq_context(dev, pd, srq, mailbox->buf);
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err = mthca_SW2HW_SRQ(dev, mailbox, srq->srqn, &status);
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if (err) {
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mthca_warn(dev, "SW2HW_SRQ failed (%d)\n", err);
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goto err_out_free_buf;
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}
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if (status) {
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mthca_warn(dev, "SW2HW_SRQ returned status 0x%02x\n",
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status);
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err = -EINVAL;
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goto err_out_free_buf;
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}
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spin_lock_irq(&dev->srq_table.lock);
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if (mthca_array_set(&dev->srq_table.srq,
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srq->srqn & (dev->limits.num_srqs - 1),
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srq)) {
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spin_unlock_irq(&dev->srq_table.lock);
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goto err_out_free_srq;
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}
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spin_unlock_irq(&dev->srq_table.lock);
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mthca_free_mailbox(dev, mailbox);
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srq->first_free = 0;
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srq->last_free = srq->max - 1;
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2006-02-23 15:13:51 -05:00
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attr->max_wr = srq->max;
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attr->max_sge = srq->max_gs;
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2005-08-19 13:59:31 -04:00
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return 0;
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err_out_free_srq:
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err = mthca_HW2SW_SRQ(dev, mailbox, srq->srqn, &status);
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if (err)
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mthca_warn(dev, "HW2SW_SRQ failed (%d)\n", err);
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else if (status)
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mthca_warn(dev, "HW2SW_SRQ returned status 0x%02x\n", status);
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err_out_free_buf:
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if (!pd->ibpd.uobject)
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mthca_free_srq_buf(dev, srq);
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err_out_mailbox:
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mthca_free_mailbox(dev, mailbox);
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err_out_db:
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if (!pd->ibpd.uobject && mthca_is_memfree(dev))
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mthca_free_db(dev, MTHCA_DB_TYPE_SRQ, srq->db_index);
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err_out_icm:
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mthca_table_put(dev, dev->srq_table.table, srq->srqn);
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err_out:
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mthca_free(&dev->srq_table.alloc, srq->srqn);
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return err;
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}
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void mthca_free_srq(struct mthca_dev *dev, struct mthca_srq *srq)
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{
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struct mthca_mailbox *mailbox;
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int err;
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u8 status;
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mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL);
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if (IS_ERR(mailbox)) {
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mthca_warn(dev, "No memory for mailbox to free SRQ.\n");
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return;
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}
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err = mthca_HW2SW_SRQ(dev, mailbox, srq->srqn, &status);
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if (err)
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mthca_warn(dev, "HW2SW_SRQ failed (%d)\n", err);
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else if (status)
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mthca_warn(dev, "HW2SW_SRQ returned status 0x%02x\n", status);
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spin_lock_irq(&dev->srq_table.lock);
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mthca_array_clear(&dev->srq_table.srq,
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srq->srqn & (dev->limits.num_srqs - 1));
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spin_unlock_irq(&dev->srq_table.lock);
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atomic_dec(&srq->refcount);
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wait_event(srq->wait, !atomic_read(&srq->refcount));
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if (!srq->ibsrq.uobject) {
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mthca_free_srq_buf(dev, srq);
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if (mthca_is_memfree(dev))
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mthca_free_db(dev, MTHCA_DB_TYPE_SRQ, srq->db_index);
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}
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|
mthca_table_put(dev, dev->srq_table.table, srq->srqn);
|
|
|
|
mthca_free(&dev->srq_table.alloc, srq->srqn);
|
|
|
|
mthca_free_mailbox(dev, mailbox);
|
|
|
|
}
|
|
|
|
|
2005-10-06 16:15:56 -04:00
|
|
|
int mthca_modify_srq(struct ib_srq *ibsrq, struct ib_srq_attr *attr,
|
|
|
|
enum ib_srq_attr_mask attr_mask)
|
2006-02-01 16:38:24 -05:00
|
|
|
{
|
2005-10-06 16:15:56 -04:00
|
|
|
struct mthca_dev *dev = to_mdev(ibsrq->device);
|
|
|
|
struct mthca_srq *srq = to_msrq(ibsrq);
|
|
|
|
int ret;
|
|
|
|
u8 status;
|
|
|
|
|
|
|
|
/* We don't support resizing SRQs (yet?) */
|
|
|
|
if (attr_mask & IB_SRQ_MAX_WR)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
if (attr_mask & IB_SRQ_LIMIT) {
|
|
|
|
ret = mthca_ARM_SRQ(dev, srq->srqn, attr->srq_limit, &status);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
if (status)
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2006-02-13 19:40:21 -05:00
|
|
|
int mthca_query_srq(struct ib_srq *ibsrq, struct ib_srq_attr *srq_attr)
|
|
|
|
{
|
|
|
|
struct mthca_dev *dev = to_mdev(ibsrq->device);
|
|
|
|
struct mthca_srq *srq = to_msrq(ibsrq);
|
|
|
|
struct mthca_mailbox *mailbox;
|
|
|
|
struct mthca_arbel_srq_context *arbel_ctx;
|
|
|
|
u8 status;
|
|
|
|
int err;
|
|
|
|
|
|
|
|
mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL);
|
|
|
|
if (IS_ERR(mailbox))
|
|
|
|
return PTR_ERR(mailbox);
|
|
|
|
|
|
|
|
err = mthca_QUERY_SRQ(dev, srq->srqn, mailbox, &status);
|
|
|
|
if (err)
|
|
|
|
goto out;
|
|
|
|
|
|
|
|
if (mthca_is_memfree(dev)) {
|
|
|
|
arbel_ctx = mailbox->buf;
|
|
|
|
srq_attr->srq_limit = arbel_ctx->limit_watermark;
|
|
|
|
} else
|
|
|
|
srq_attr->srq_limit = 0;
|
|
|
|
|
|
|
|
srq_attr->max_wr = srq->max;
|
|
|
|
srq_attr->max_sge = srq->max_gs;
|
|
|
|
|
|
|
|
out:
|
|
|
|
mthca_free_mailbox(dev, mailbox);
|
|
|
|
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
2005-08-19 13:59:31 -04:00
|
|
|
void mthca_srq_event(struct mthca_dev *dev, u32 srqn,
|
|
|
|
enum ib_event_type event_type)
|
|
|
|
{
|
|
|
|
struct mthca_srq *srq;
|
|
|
|
struct ib_event event;
|
|
|
|
|
|
|
|
spin_lock(&dev->srq_table.lock);
|
|
|
|
srq = mthca_array_get(&dev->srq_table.srq, srqn & (dev->limits.num_srqs - 1));
|
|
|
|
if (srq)
|
|
|
|
atomic_inc(&srq->refcount);
|
|
|
|
spin_unlock(&dev->srq_table.lock);
|
|
|
|
|
|
|
|
if (!srq) {
|
|
|
|
mthca_warn(dev, "Async event for bogus SRQ %08x\n", srqn);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!srq->ibsrq.event_handler)
|
|
|
|
goto out;
|
|
|
|
|
|
|
|
event.device = &dev->ib_dev;
|
|
|
|
event.event = event_type;
|
2005-10-06 16:15:56 -04:00
|
|
|
event.element.srq = &srq->ibsrq;
|
2005-08-19 13:59:31 -04:00
|
|
|
srq->ibsrq.event_handler(&event, srq->ibsrq.srq_context);
|
|
|
|
|
|
|
|
out:
|
|
|
|
if (atomic_dec_and_test(&srq->refcount))
|
|
|
|
wake_up(&srq->wait);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* This function must be called with IRQs disabled.
|
|
|
|
*/
|
|
|
|
void mthca_free_srq_wqe(struct mthca_srq *srq, u32 wqe_addr)
|
|
|
|
{
|
|
|
|
int ind;
|
|
|
|
|
|
|
|
ind = wqe_addr >> srq->wqe_shift;
|
|
|
|
|
|
|
|
spin_lock(&srq->lock);
|
|
|
|
|
|
|
|
if (likely(srq->first_free >= 0))
|
|
|
|
*wqe_to_link(get_wqe(srq, srq->last_free)) = ind;
|
|
|
|
else
|
|
|
|
srq->first_free = ind;
|
|
|
|
|
|
|
|
*wqe_to_link(get_wqe(srq, ind)) = -1;
|
|
|
|
srq->last_free = ind;
|
|
|
|
|
|
|
|
spin_unlock(&srq->lock);
|
|
|
|
}
|
|
|
|
|
|
|
|
int mthca_tavor_post_srq_recv(struct ib_srq *ibsrq, struct ib_recv_wr *wr,
|
|
|
|
struct ib_recv_wr **bad_wr)
|
|
|
|
{
|
|
|
|
struct mthca_dev *dev = to_mdev(ibsrq->device);
|
|
|
|
struct mthca_srq *srq = to_msrq(ibsrq);
|
2005-11-09 17:59:57 -05:00
|
|
|
__be32 doorbell[2];
|
2005-08-19 13:59:31 -04:00
|
|
|
unsigned long flags;
|
|
|
|
int err = 0;
|
|
|
|
int first_ind;
|
|
|
|
int ind;
|
|
|
|
int next_ind;
|
|
|
|
int nreq;
|
|
|
|
int i;
|
|
|
|
void *wqe;
|
|
|
|
void *prev_wqe;
|
|
|
|
|
|
|
|
spin_lock_irqsave(&srq->lock, flags);
|
|
|
|
|
|
|
|
first_ind = srq->first_free;
|
|
|
|
|
|
|
|
for (nreq = 0; wr; ++nreq, wr = wr->next) {
|
2005-11-09 17:59:57 -05:00
|
|
|
if (unlikely(nreq == MTHCA_TAVOR_MAX_WQES_PER_RECV_DB)) {
|
|
|
|
nreq = 0;
|
|
|
|
|
|
|
|
doorbell[0] = cpu_to_be32(first_ind << srq->wqe_shift);
|
|
|
|
doorbell[1] = cpu_to_be32(srq->srqn << 8);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Make sure that descriptors are written
|
|
|
|
* before doorbell is rung.
|
|
|
|
*/
|
|
|
|
wmb();
|
|
|
|
|
|
|
|
mthca_write64(doorbell,
|
|
|
|
dev->kar + MTHCA_RECEIVE_DOORBELL,
|
|
|
|
MTHCA_GET_DOORBELL_LOCK(&dev->doorbell_lock));
|
|
|
|
|
|
|
|
first_ind = srq->first_free;
|
|
|
|
}
|
|
|
|
|
2005-08-19 13:59:31 -04:00
|
|
|
ind = srq->first_free;
|
|
|
|
|
|
|
|
if (ind < 0) {
|
|
|
|
mthca_err(dev, "SRQ %06x full\n", srq->srqn);
|
|
|
|
err = -ENOMEM;
|
|
|
|
*bad_wr = wr;
|
2005-09-18 17:00:17 -04:00
|
|
|
break;
|
2005-08-19 13:59:31 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
wqe = get_wqe(srq, ind);
|
|
|
|
next_ind = *wqe_to_link(wqe);
|
2005-10-06 16:25:16 -04:00
|
|
|
|
|
|
|
if (next_ind < 0) {
|
|
|
|
mthca_err(dev, "SRQ %06x full\n", srq->srqn);
|
|
|
|
err = -ENOMEM;
|
|
|
|
*bad_wr = wr;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2005-08-19 13:59:31 -04:00
|
|
|
prev_wqe = srq->last;
|
|
|
|
srq->last = wqe;
|
|
|
|
|
|
|
|
((struct mthca_next_seg *) wqe)->nda_op = 0;
|
|
|
|
((struct mthca_next_seg *) wqe)->ee_nds = 0;
|
|
|
|
/* flags field will always remain 0 */
|
|
|
|
|
|
|
|
wqe += sizeof (struct mthca_next_seg);
|
|
|
|
|
|
|
|
if (unlikely(wr->num_sge > srq->max_gs)) {
|
|
|
|
err = -EINVAL;
|
|
|
|
*bad_wr = wr;
|
|
|
|
srq->last = prev_wqe;
|
2005-09-18 17:00:17 -04:00
|
|
|
break;
|
2005-08-19 13:59:31 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
for (i = 0; i < wr->num_sge; ++i) {
|
|
|
|
((struct mthca_data_seg *) wqe)->byte_count =
|
|
|
|
cpu_to_be32(wr->sg_list[i].length);
|
|
|
|
((struct mthca_data_seg *) wqe)->lkey =
|
|
|
|
cpu_to_be32(wr->sg_list[i].lkey);
|
|
|
|
((struct mthca_data_seg *) wqe)->addr =
|
|
|
|
cpu_to_be64(wr->sg_list[i].addr);
|
|
|
|
wqe += sizeof (struct mthca_data_seg);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (i < srq->max_gs) {
|
|
|
|
((struct mthca_data_seg *) wqe)->byte_count = 0;
|
|
|
|
((struct mthca_data_seg *) wqe)->lkey = cpu_to_be32(MTHCA_INVAL_LKEY);
|
|
|
|
((struct mthca_data_seg *) wqe)->addr = 0;
|
|
|
|
}
|
|
|
|
|
2005-09-13 13:41:03 -04:00
|
|
|
((struct mthca_next_seg *) prev_wqe)->nda_op =
|
|
|
|
cpu_to_be32((ind << srq->wqe_shift) | 1);
|
|
|
|
wmb();
|
|
|
|
((struct mthca_next_seg *) prev_wqe)->ee_nds =
|
|
|
|
cpu_to_be32(MTHCA_NEXT_DBD);
|
2005-08-19 13:59:31 -04:00
|
|
|
|
|
|
|
srq->wrid[ind] = wr->wr_id;
|
|
|
|
srq->first_free = next_ind;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (likely(nreq)) {
|
|
|
|
doorbell[0] = cpu_to_be32(first_ind << srq->wqe_shift);
|
|
|
|
doorbell[1] = cpu_to_be32((srq->srqn << 8) | nreq);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Make sure that descriptors are written before
|
|
|
|
* doorbell is rung.
|
|
|
|
*/
|
|
|
|
wmb();
|
|
|
|
|
|
|
|
mthca_write64(doorbell,
|
|
|
|
dev->kar + MTHCA_RECEIVE_DOORBELL,
|
|
|
|
MTHCA_GET_DOORBELL_LOCK(&dev->doorbell_lock));
|
|
|
|
}
|
|
|
|
|
|
|
|
spin_unlock_irqrestore(&srq->lock, flags);
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
|
|
|
int mthca_arbel_post_srq_recv(struct ib_srq *ibsrq, struct ib_recv_wr *wr,
|
|
|
|
struct ib_recv_wr **bad_wr)
|
|
|
|
{
|
|
|
|
struct mthca_dev *dev = to_mdev(ibsrq->device);
|
|
|
|
struct mthca_srq *srq = to_msrq(ibsrq);
|
|
|
|
unsigned long flags;
|
|
|
|
int err = 0;
|
|
|
|
int ind;
|
|
|
|
int next_ind;
|
|
|
|
int nreq;
|
|
|
|
int i;
|
|
|
|
void *wqe;
|
|
|
|
|
|
|
|
spin_lock_irqsave(&srq->lock, flags);
|
|
|
|
|
|
|
|
for (nreq = 0; wr; ++nreq, wr = wr->next) {
|
|
|
|
ind = srq->first_free;
|
|
|
|
|
|
|
|
if (ind < 0) {
|
|
|
|
mthca_err(dev, "SRQ %06x full\n", srq->srqn);
|
|
|
|
err = -ENOMEM;
|
|
|
|
*bad_wr = wr;
|
2005-09-18 17:00:17 -04:00
|
|
|
break;
|
2005-08-19 13:59:31 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
wqe = get_wqe(srq, ind);
|
|
|
|
next_ind = *wqe_to_link(wqe);
|
|
|
|
|
2005-10-06 16:25:16 -04:00
|
|
|
if (next_ind < 0) {
|
|
|
|
mthca_err(dev, "SRQ %06x full\n", srq->srqn);
|
|
|
|
err = -ENOMEM;
|
|
|
|
*bad_wr = wr;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2005-08-19 13:59:31 -04:00
|
|
|
((struct mthca_next_seg *) wqe)->nda_op =
|
|
|
|
cpu_to_be32((next_ind << srq->wqe_shift) | 1);
|
|
|
|
((struct mthca_next_seg *) wqe)->ee_nds = 0;
|
|
|
|
/* flags field will always remain 0 */
|
|
|
|
|
|
|
|
wqe += sizeof (struct mthca_next_seg);
|
|
|
|
|
|
|
|
if (unlikely(wr->num_sge > srq->max_gs)) {
|
|
|
|
err = -EINVAL;
|
|
|
|
*bad_wr = wr;
|
2005-09-18 17:00:17 -04:00
|
|
|
break;
|
2005-08-19 13:59:31 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
for (i = 0; i < wr->num_sge; ++i) {
|
|
|
|
((struct mthca_data_seg *) wqe)->byte_count =
|
|
|
|
cpu_to_be32(wr->sg_list[i].length);
|
|
|
|
((struct mthca_data_seg *) wqe)->lkey =
|
|
|
|
cpu_to_be32(wr->sg_list[i].lkey);
|
|
|
|
((struct mthca_data_seg *) wqe)->addr =
|
|
|
|
cpu_to_be64(wr->sg_list[i].addr);
|
|
|
|
wqe += sizeof (struct mthca_data_seg);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (i < srq->max_gs) {
|
|
|
|
((struct mthca_data_seg *) wqe)->byte_count = 0;
|
|
|
|
((struct mthca_data_seg *) wqe)->lkey = cpu_to_be32(MTHCA_INVAL_LKEY);
|
|
|
|
((struct mthca_data_seg *) wqe)->addr = 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
srq->wrid[ind] = wr->wr_id;
|
|
|
|
srq->first_free = next_ind;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (likely(nreq)) {
|
|
|
|
srq->counter += nreq;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Make sure that descriptors are written before
|
|
|
|
* we write doorbell record.
|
|
|
|
*/
|
|
|
|
wmb();
|
|
|
|
*srq->db = cpu_to_be32(srq->counter);
|
|
|
|
}
|
|
|
|
|
|
|
|
spin_unlock_irqrestore(&srq->lock, flags);
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
|
|
|
int __devinit mthca_init_srq_table(struct mthca_dev *dev)
|
|
|
|
{
|
|
|
|
int err;
|
|
|
|
|
|
|
|
if (!(dev->mthca_flags & MTHCA_FLAG_SRQ))
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
spin_lock_init(&dev->srq_table.lock);
|
|
|
|
|
|
|
|
err = mthca_alloc_init(&dev->srq_table.alloc,
|
|
|
|
dev->limits.num_srqs,
|
|
|
|
dev->limits.num_srqs - 1,
|
|
|
|
dev->limits.reserved_srqs);
|
|
|
|
if (err)
|
|
|
|
return err;
|
|
|
|
|
|
|
|
err = mthca_array_init(&dev->srq_table.srq,
|
|
|
|
dev->limits.num_srqs);
|
|
|
|
if (err)
|
|
|
|
mthca_alloc_cleanup(&dev->srq_table.alloc);
|
|
|
|
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
|
|
|
void __devexit mthca_cleanup_srq_table(struct mthca_dev *dev)
|
|
|
|
{
|
|
|
|
if (!(dev->mthca_flags & MTHCA_FLAG_SRQ))
|
|
|
|
return;
|
|
|
|
|
|
|
|
mthca_array_cleanup(&dev->srq_table.srq, dev->limits.num_srqs);
|
|
|
|
mthca_alloc_cleanup(&dev->srq_table.alloc);
|
|
|
|
}
|