2005-04-16 18:20:36 -04:00
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/*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*
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* Copyright (C) 2000, 2001 Kanoj Sarcar
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* Copyright (C) 2000, 2001 Ralf Baechle
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* Copyright (C) 2000, 2001 Silicon Graphics, Inc.
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* Copyright (C) 2000, 2001, 2003 Broadcom Corporation
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*/
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#include <linux/cache.h>
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/spinlock.h>
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#include <linux/threads.h>
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#include <linux/module.h>
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#include <linux/time.h>
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#include <linux/timex.h>
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#include <linux/sched.h>
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#include <linux/cpumask.h>
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2006-02-20 08:35:27 -05:00
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#include <linux/cpu.h>
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2007-07-29 18:36:13 -04:00
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#include <linux/err.h>
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2005-04-16 18:20:36 -04:00
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#include <asm/atomic.h>
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#include <asm/cpu.h>
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#include <asm/processor.h>
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#include <asm/system.h>
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#include <asm/mmu_context.h>
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#include <asm/smp.h>
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2007-10-11 18:46:09 -04:00
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#include <asm/time.h>
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2005-04-16 18:20:36 -04:00
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2006-04-05 04:45:45 -04:00
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#ifdef CONFIG_MIPS_MT_SMTC
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#include <asm/mipsmtregs.h>
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#endif /* CONFIG_MIPS_MT_SMTC */
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2005-04-16 18:20:36 -04:00
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cpumask_t phys_cpu_present_map; /* Bitmask of available CPUs */
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volatile cpumask_t cpu_callin_map; /* Bitmask of started secondaries */
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cpumask_t cpu_online_map; /* Bitmask of currently online CPUs */
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int __cpu_number_map[NR_CPUS]; /* Map physical to logical */
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int __cpu_logical_map[NR_CPUS]; /* Map logical to physical */
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EXPORT_SYMBOL(phys_cpu_present_map);
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EXPORT_SYMBOL(cpu_online_map);
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extern void __init calibrate_delay(void);
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2007-05-25 14:32:28 -04:00
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extern void cpu_idle(void);
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2005-04-16 18:20:36 -04:00
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2007-03-02 15:42:04 -05:00
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/* Number of TCs (or siblings in Intel speak) per CPU core */
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int smp_num_siblings = 1;
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EXPORT_SYMBOL(smp_num_siblings);
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/* representing the TCs (or siblings in Intel speak) of each logical CPU */
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cpumask_t cpu_sibling_map[NR_CPUS] __read_mostly;
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EXPORT_SYMBOL(cpu_sibling_map);
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/* representing cpus for which sibling maps can be computed */
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static cpumask_t cpu_sibling_setup_map;
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static inline void set_cpu_sibling_map(int cpu)
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{
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int i;
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cpu_set(cpu, cpu_sibling_setup_map);
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if (smp_num_siblings > 1) {
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for_each_cpu_mask(i, cpu_sibling_setup_map) {
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if (cpu_data[cpu].core == cpu_data[i].core) {
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cpu_set(i, cpu_sibling_map[cpu]);
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cpu_set(cpu, cpu_sibling_map[i]);
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}
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}
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} else
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cpu_set(cpu, cpu_sibling_map[cpu]);
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}
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2005-04-16 18:20:36 -04:00
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/*
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* First C code run on the secondary CPUs after being started up by
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* the master.
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*/
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2007-05-31 11:15:01 -04:00
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asmlinkage __cpuinit void start_secondary(void)
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2005-04-16 18:20:36 -04:00
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{
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2005-11-09 00:39:01 -05:00
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unsigned int cpu;
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2005-04-16 18:20:36 -04:00
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2006-04-05 04:45:45 -04:00
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#ifdef CONFIG_MIPS_MT_SMTC
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/* Only do cpu_probe for first TC of CPU */
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if ((read_c0_tcbind() & TCBIND_CURTC) == 0)
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#endif /* CONFIG_MIPS_MT_SMTC */
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2005-04-16 18:20:36 -04:00
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cpu_probe();
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cpu_report();
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per_cpu_trap_init();
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2007-10-11 18:46:09 -04:00
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mips_clockevent_init();
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2005-04-16 18:20:36 -04:00
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prom_init_secondary();
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/*
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* XXX parity protection should be folded in here when it's converted
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* to an option instead of something based on .cputype
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*/
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calibrate_delay();
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2005-11-09 00:39:01 -05:00
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preempt_disable();
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cpu = smp_processor_id();
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2005-04-16 18:20:36 -04:00
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cpu_data[cpu].udelay_val = loops_per_jiffy;
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prom_smp_finish();
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2007-03-02 15:42:04 -05:00
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set_cpu_sibling_map(cpu);
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2005-04-16 18:20:36 -04:00
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cpu_set(cpu, cpu_callin_map);
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cpu_idle();
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}
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DEFINE_SPINLOCK(smp_call_lock);
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struct call_data_struct *call_data;
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/*
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* Run a function on all other CPUs.
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2007-10-02 20:24:16 -04:00
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*
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* <mask> cpuset_t of all processors to run the function on.
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2005-04-16 18:20:36 -04:00
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* <func> The function to run. This must be fast and non-blocking.
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* <info> An arbitrary pointer to pass to the function.
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* <retry> If true, keep retrying until ready.
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* <wait> If true, wait until function has completed on other CPUs.
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* [RETURNS] 0 on success, else a negative status code.
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*
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* Does not return until remote CPUs are nearly ready to execute <func>
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* or are or have executed.
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*
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* You must not call this function with disabled interrupts or from a
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2005-02-10 07:00:06 -05:00
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* hardware interrupt handler or from a bottom half handler:
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*
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* CPU A CPU B
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* Disable interrupts
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* smp_call_function()
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* Take call_lock
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* Send IPIs
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* Wait for all cpus to acknowledge IPI
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* CPU A has not responded, spin waiting
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* for cpu A to respond, holding call_lock
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* smp_call_function()
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* Spin waiting for call_lock
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* Deadlock Deadlock
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2005-04-16 18:20:36 -04:00
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*/
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2007-10-02 20:24:16 -04:00
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int smp_call_function_mask(cpumask_t mask, void (*func) (void *info),
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void *info, int retry, int wait)
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2005-04-16 18:20:36 -04:00
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{
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struct call_data_struct data;
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int cpu = smp_processor_id();
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2007-10-02 20:24:16 -04:00
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int cpus;
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2005-04-16 18:20:36 -04:00
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2005-07-15 11:44:02 -04:00
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/*
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* Can die spectacularly if this CPU isn't yet marked online
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*/
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BUG_ON(!cpu_online(cpu));
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2007-10-02 20:24:16 -04:00
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cpu_clear(cpu, mask);
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cpus = cpus_weight(mask);
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2005-04-16 18:20:36 -04:00
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if (!cpus)
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return 0;
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/* Can deadlock when called with interrupts disabled */
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WARN_ON(irqs_disabled());
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data.func = func;
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data.info = info;
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atomic_set(&data.started, 0);
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data.wait = wait;
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if (wait)
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atomic_set(&data.finished, 0);
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spin_lock(&smp_call_lock);
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call_data = &data;
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2006-10-30 22:45:07 -05:00
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smp_mb();
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2005-04-16 18:20:36 -04:00
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/* Send a message to all other CPUs and wait for them to respond */
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2007-10-02 20:24:16 -04:00
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core_send_ipi_mask(mask, SMP_CALL_FUNCTION);
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2005-04-16 18:20:36 -04:00
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/* Wait for response */
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/* FIXME: lock-up detection, backtrace on lock-up */
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while (atomic_read(&data.started) != cpus)
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barrier();
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if (wait)
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while (atomic_read(&data.finished) != cpus)
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barrier();
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2006-04-05 04:45:45 -04:00
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call_data = NULL;
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2005-04-16 18:20:36 -04:00
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spin_unlock(&smp_call_lock);
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return 0;
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}
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2007-10-02 20:24:16 -04:00
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int smp_call_function(void (*func) (void *info), void *info, int retry,
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int wait)
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{
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return smp_call_function_mask(cpu_online_map, func, info, retry, wait);
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}
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2006-04-05 04:45:45 -04:00
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2005-04-16 18:20:36 -04:00
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void smp_call_function_interrupt(void)
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{
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void (*func) (void *info) = call_data->func;
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void *info = call_data->info;
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int wait = call_data->wait;
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/*
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* Notify initiating CPU that I've grabbed the data and am
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* about to execute the function.
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*/
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2006-10-30 22:45:07 -05:00
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smp_mb();
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2005-04-16 18:20:36 -04:00
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atomic_inc(&call_data->started);
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/*
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* At this point the info structure may be out of scope unless wait==1.
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*/
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irq_enter();
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(*func)(info);
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irq_exit();
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if (wait) {
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2006-10-30 22:45:07 -05:00
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smp_mb();
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2005-04-16 18:20:36 -04:00
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atomic_inc(&call_data->finished);
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}
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}
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2007-07-30 18:01:29 -04:00
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int smp_call_function_single(int cpu, void (*func) (void *info), void *info,
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int retry, int wait)
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{
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2007-10-02 20:24:16 -04:00
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int ret, me;
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2007-07-30 18:01:29 -04:00
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/*
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* Can die spectacularly if this CPU isn't yet marked online
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*/
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if (!cpu_online(cpu))
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return 0;
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me = get_cpu();
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BUG_ON(!cpu_online(me));
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if (cpu == me) {
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local_irq_disable();
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func(info);
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local_irq_enable();
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put_cpu();
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return 0;
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}
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2007-10-02 20:24:16 -04:00
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ret = smp_call_function_mask(cpumask_of_cpu(cpu), func, info, retry,
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wait);
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2007-07-30 18:01:29 -04:00
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put_cpu();
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return 0;
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}
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2005-04-16 18:20:36 -04:00
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static void stop_this_cpu(void *dummy)
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{
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/*
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* Remove this CPU:
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*/
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cpu_clear(smp_processor_id(), cpu_online_map);
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local_irq_enable(); /* May need to service _machine_restart IPI */
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for (;;); /* Wait if available. */
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}
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void smp_send_stop(void)
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{
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smp_call_function(stop_this_cpu, NULL, 1, 0);
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}
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void __init smp_cpus_done(unsigned int max_cpus)
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{
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prom_cpus_done();
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}
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/* called from main before smp_init() */
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void __init smp_prepare_cpus(unsigned int max_cpus)
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{
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init_new_context(current, &init_mm);
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current_thread_info()->cpu = 0;
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2006-02-23 07:23:27 -05:00
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plat_prepare_cpus(max_cpus);
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2007-03-02 15:42:04 -05:00
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set_cpu_sibling_map(0);
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2006-05-22 09:24:04 -04:00
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#ifndef CONFIG_HOTPLUG_CPU
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cpu_present_map = cpu_possible_map;
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#endif
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2005-04-16 18:20:36 -04:00
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}
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/* preload SMP state for boot cpu */
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void __devinit smp_prepare_boot_cpu(void)
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{
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/*
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* This assumes that bootup is always handled by the processor
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* with the logic and physical number 0.
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*/
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__cpu_number_map[0] = 0;
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__cpu_logical_map[0] = 0;
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cpu_set(0, phys_cpu_present_map);
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cpu_set(0, cpu_online_map);
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cpu_set(0, cpu_callin_map);
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}
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/*
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2005-02-22 16:18:01 -05:00
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* Called once for each "cpu_possible(cpu)". Needs to spin up the cpu
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* and keep control until "cpu_online(cpu)" is set. Note: cpu is
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* physical, not logical.
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2005-04-16 18:20:36 -04:00
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*/
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2007-01-11 02:15:34 -05:00
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int __cpuinit __cpu_up(unsigned int cpu)
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2005-04-16 18:20:36 -04:00
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{
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struct task_struct *idle;
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/*
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2005-02-22 16:18:01 -05:00
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* Processor goes to start_secondary(), sets online flag
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2005-04-16 18:20:36 -04:00
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* The following code is purely to make sure
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* Linux can schedule processes on this slave.
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*/
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idle = fork_idle(cpu);
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if (IS_ERR(idle))
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2005-02-22 16:18:01 -05:00
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panic(KERN_ERR "Fork failed for CPU %d", cpu);
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2005-04-16 18:20:36 -04:00
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prom_boot_secondary(cpu, idle);
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2005-02-22 16:18:01 -05:00
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/*
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* Trust is futile. We should really have timeouts ...
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*/
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2005-04-16 18:20:36 -04:00
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while (!cpu_isset(cpu, cpu_callin_map))
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udelay(100);
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|
|
|
cpu_set(cpu, cpu_online_map);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Not really SMP stuff ... */
|
|
|
|
int setup_profiling_timer(unsigned int multiplier)
|
|
|
|
{
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void flush_tlb_all_ipi(void *info)
|
|
|
|
{
|
|
|
|
local_flush_tlb_all();
|
|
|
|
}
|
|
|
|
|
|
|
|
void flush_tlb_all(void)
|
|
|
|
{
|
2006-10-11 14:30:03 -04:00
|
|
|
on_each_cpu(flush_tlb_all_ipi, NULL, 1, 1);
|
2005-04-16 18:20:36 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
static void flush_tlb_mm_ipi(void *mm)
|
|
|
|
{
|
|
|
|
local_flush_tlb_mm((struct mm_struct *)mm);
|
|
|
|
}
|
|
|
|
|
2006-06-22 17:42:32 -04:00
|
|
|
/*
|
|
|
|
* Special Variant of smp_call_function for use by TLB functions:
|
|
|
|
*
|
|
|
|
* o No return value
|
|
|
|
* o collapses to normal function call on UP kernels
|
|
|
|
* o collapses to normal function call on systems with a single shared
|
|
|
|
* primary cache.
|
|
|
|
* o CONFIG_MIPS_MT_SMTC currently implies there is only one physical core.
|
|
|
|
*/
|
|
|
|
static inline void smp_on_other_tlbs(void (*func) (void *info), void *info)
|
|
|
|
{
|
|
|
|
#ifndef CONFIG_MIPS_MT_SMTC
|
|
|
|
smp_call_function(func, info, 1, 1);
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void smp_on_each_tlb(void (*func) (void *info), void *info)
|
|
|
|
{
|
|
|
|
preempt_disable();
|
|
|
|
|
|
|
|
smp_on_other_tlbs(func, info);
|
|
|
|
func(info);
|
|
|
|
|
|
|
|
preempt_enable();
|
|
|
|
}
|
|
|
|
|
2005-04-16 18:20:36 -04:00
|
|
|
/*
|
|
|
|
* The following tlb flush calls are invoked when old translations are
|
|
|
|
* being torn down, or pte attributes are changing. For single threaded
|
|
|
|
* address spaces, a new context is obtained on the current cpu, and tlb
|
|
|
|
* context on other cpus are invalidated to force a new context allocation
|
|
|
|
* at switch_mm time, should the mm ever be used on other cpus. For
|
|
|
|
* multithreaded address spaces, intercpu interrupts have to be sent.
|
|
|
|
* Another case where intercpu interrupts are required is when the target
|
|
|
|
* mm might be active on another cpu (eg debuggers doing the flushes on
|
|
|
|
* behalf of debugees, kswapd stealing pages from another process etc).
|
|
|
|
* Kanoj 07/00.
|
|
|
|
*/
|
|
|
|
|
|
|
|
void flush_tlb_mm(struct mm_struct *mm)
|
|
|
|
{
|
|
|
|
preempt_disable();
|
|
|
|
|
|
|
|
if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) {
|
2007-10-04 11:57:08 -04:00
|
|
|
smp_on_other_tlbs(flush_tlb_mm_ipi, mm);
|
2005-04-16 18:20:36 -04:00
|
|
|
} else {
|
2007-10-03 14:16:57 -04:00
|
|
|
cpumask_t mask = cpu_online_map;
|
|
|
|
unsigned int cpu;
|
|
|
|
|
|
|
|
cpu_clear(smp_processor_id(), mask);
|
2007-10-12 10:03:38 -04:00
|
|
|
for_each_cpu_mask(cpu, mask)
|
2007-10-03 14:16:57 -04:00
|
|
|
if (cpu_context(cpu, mm))
|
|
|
|
cpu_context(cpu, mm) = 0;
|
2005-04-16 18:20:36 -04:00
|
|
|
}
|
|
|
|
local_flush_tlb_mm(mm);
|
|
|
|
|
|
|
|
preempt_enable();
|
|
|
|
}
|
|
|
|
|
|
|
|
struct flush_tlb_data {
|
|
|
|
struct vm_area_struct *vma;
|
|
|
|
unsigned long addr1;
|
|
|
|
unsigned long addr2;
|
|
|
|
};
|
|
|
|
|
|
|
|
static void flush_tlb_range_ipi(void *info)
|
|
|
|
{
|
2007-10-04 11:57:08 -04:00
|
|
|
struct flush_tlb_data *fd = info;
|
2005-04-16 18:20:36 -04:00
|
|
|
|
|
|
|
local_flush_tlb_range(fd->vma, fd->addr1, fd->addr2);
|
|
|
|
}
|
|
|
|
|
|
|
|
void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, unsigned long end)
|
|
|
|
{
|
|
|
|
struct mm_struct *mm = vma->vm_mm;
|
|
|
|
|
|
|
|
preempt_disable();
|
|
|
|
if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) {
|
2007-10-04 13:18:52 -04:00
|
|
|
struct flush_tlb_data fd = {
|
|
|
|
.vma = vma,
|
|
|
|
.addr1 = start,
|
|
|
|
.addr2 = end,
|
|
|
|
};
|
2005-04-16 18:20:36 -04:00
|
|
|
|
2007-10-04 11:57:08 -04:00
|
|
|
smp_on_other_tlbs(flush_tlb_range_ipi, &fd);
|
2005-04-16 18:20:36 -04:00
|
|
|
} else {
|
2007-10-03 14:16:57 -04:00
|
|
|
cpumask_t mask = cpu_online_map;
|
|
|
|
unsigned int cpu;
|
|
|
|
|
|
|
|
cpu_clear(smp_processor_id(), mask);
|
2007-10-12 10:03:38 -04:00
|
|
|
for_each_cpu_mask(cpu, mask)
|
2007-10-03 14:16:57 -04:00
|
|
|
if (cpu_context(cpu, mm))
|
|
|
|
cpu_context(cpu, mm) = 0;
|
2005-04-16 18:20:36 -04:00
|
|
|
}
|
|
|
|
local_flush_tlb_range(vma, start, end);
|
|
|
|
preempt_enable();
|
|
|
|
}
|
|
|
|
|
|
|
|
static void flush_tlb_kernel_range_ipi(void *info)
|
|
|
|
{
|
2007-10-04 11:57:08 -04:00
|
|
|
struct flush_tlb_data *fd = info;
|
2005-04-16 18:20:36 -04:00
|
|
|
|
|
|
|
local_flush_tlb_kernel_range(fd->addr1, fd->addr2);
|
|
|
|
}
|
|
|
|
|
|
|
|
void flush_tlb_kernel_range(unsigned long start, unsigned long end)
|
|
|
|
{
|
2007-10-04 13:18:52 -04:00
|
|
|
struct flush_tlb_data fd = {
|
|
|
|
.addr1 = start,
|
|
|
|
.addr2 = end,
|
|
|
|
};
|
2005-04-16 18:20:36 -04:00
|
|
|
|
2007-10-04 11:57:08 -04:00
|
|
|
on_each_cpu(flush_tlb_kernel_range_ipi, &fd, 1, 1);
|
2005-04-16 18:20:36 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
static void flush_tlb_page_ipi(void *info)
|
|
|
|
{
|
2007-10-04 11:57:08 -04:00
|
|
|
struct flush_tlb_data *fd = info;
|
2005-04-16 18:20:36 -04:00
|
|
|
|
|
|
|
local_flush_tlb_page(fd->vma, fd->addr1);
|
|
|
|
}
|
|
|
|
|
|
|
|
void flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
|
|
|
|
{
|
|
|
|
preempt_disable();
|
|
|
|
if ((atomic_read(&vma->vm_mm->mm_users) != 1) || (current->mm != vma->vm_mm)) {
|
2007-10-04 13:18:52 -04:00
|
|
|
struct flush_tlb_data fd = {
|
|
|
|
.vma = vma,
|
|
|
|
.addr1 = page,
|
|
|
|
};
|
2005-04-16 18:20:36 -04:00
|
|
|
|
2007-10-04 11:57:08 -04:00
|
|
|
smp_on_other_tlbs(flush_tlb_page_ipi, &fd);
|
2005-04-16 18:20:36 -04:00
|
|
|
} else {
|
2007-10-03 14:16:57 -04:00
|
|
|
cpumask_t mask = cpu_online_map;
|
|
|
|
unsigned int cpu;
|
|
|
|
|
|
|
|
cpu_clear(smp_processor_id(), mask);
|
2007-10-12 10:03:38 -04:00
|
|
|
for_each_cpu_mask(cpu, mask)
|
2007-10-03 14:16:57 -04:00
|
|
|
if (cpu_context(cpu, vma->vm_mm))
|
|
|
|
cpu_context(cpu, vma->vm_mm) = 0;
|
2005-04-16 18:20:36 -04:00
|
|
|
}
|
|
|
|
local_flush_tlb_page(vma, page);
|
|
|
|
preempt_enable();
|
|
|
|
}
|
|
|
|
|
|
|
|
static void flush_tlb_one_ipi(void *info)
|
|
|
|
{
|
|
|
|
unsigned long vaddr = (unsigned long) info;
|
|
|
|
|
|
|
|
local_flush_tlb_one(vaddr);
|
|
|
|
}
|
|
|
|
|
|
|
|
void flush_tlb_one(unsigned long vaddr)
|
|
|
|
{
|
2006-06-22 17:42:32 -04:00
|
|
|
smp_on_each_tlb(flush_tlb_one_ipi, (void *) vaddr);
|
2005-04-16 18:20:36 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
EXPORT_SYMBOL(flush_tlb_page);
|
|
|
|
EXPORT_SYMBOL(flush_tlb_one);
|