2005-04-16 18:20:36 -04:00
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/*
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* linux/arch/cris/arch-v10/mm/tlb.c
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*
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* Low level TLB handling
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*
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*
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2008-01-21 05:28:16 -05:00
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* Copyright (C) 2000-2007 Axis Communications AB
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*
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2005-04-16 18:20:36 -04:00
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* Authors: Bjorn Wesen (bjornw@axis.com)
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*
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*/
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#include <asm/tlb.h>
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#include <asm/mmu_context.h>
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2008-10-21 11:45:58 -04:00
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#include <arch/svinto.h>
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2005-04-16 18:20:36 -04:00
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#define D(x)
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/* The TLB can host up to 64 different mm contexts at the same time.
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* The running context is R_MMU_CONTEXT, and each TLB entry contains a
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* page_id that has to match to give a hit. In page_id_map, we keep track
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* of which mm's we have assigned which page_id's, so that we know when
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* to invalidate TLB entries.
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*
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* The last page_id is never running - it is used as an invalid page_id
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* so we can make TLB entries that will never match.
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*
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* Notice that we need to make the flushes atomic, otherwise an interrupt
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* handler that uses vmalloced memory might cause a TLB load in the middle
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* of a flush causing.
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*/
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/* invalidate all TLB entries */
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void
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flush_tlb_all(void)
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{
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int i;
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unsigned long flags;
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/* the vpn of i & 0xf is so we dont write similar TLB entries
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2008-01-21 05:28:16 -05:00
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* in the same 4-way entry group. details...
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2005-04-16 18:20:36 -04:00
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*/
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2007-02-10 04:43:51 -05:00
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local_irq_save(flags);
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2005-04-16 18:20:36 -04:00
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for(i = 0; i < NUM_TLB_ENTRIES; i++) {
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*R_TLB_SELECT = ( IO_FIELD(R_TLB_SELECT, index, i) );
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*R_TLB_HI = ( IO_FIELD(R_TLB_HI, page_id, INVALID_PAGEID ) |
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IO_FIELD(R_TLB_HI, vpn, i & 0xf ) );
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2008-01-21 05:28:16 -05:00
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2005-04-16 18:20:36 -04:00
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*R_TLB_LO = ( IO_STATE(R_TLB_LO, global,no ) |
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IO_STATE(R_TLB_LO, valid, no ) |
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IO_STATE(R_TLB_LO, kernel,no ) |
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IO_STATE(R_TLB_LO, we, no ) |
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IO_FIELD(R_TLB_LO, pfn, 0 ) );
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}
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local_irq_restore(flags);
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D(printk("tlb: flushed all\n"));
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}
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/* invalidate the selected mm context only */
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void
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flush_tlb_mm(struct mm_struct *mm)
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{
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int i;
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int page_id = mm->context.page_id;
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unsigned long flags;
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D(printk("tlb: flush mm context %d (%p)\n", page_id, mm));
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if(page_id == NO_CONTEXT)
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return;
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2008-01-21 05:28:16 -05:00
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2005-04-16 18:20:36 -04:00
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/* mark the TLB entries that match the page_id as invalid.
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* here we could also check the _PAGE_GLOBAL bit and NOT flush
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2008-01-21 05:28:16 -05:00
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* global pages. is it worth the extra I/O ?
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2005-04-16 18:20:36 -04:00
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*/
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2007-02-10 04:43:51 -05:00
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local_irq_save(flags);
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2005-04-16 18:20:36 -04:00
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for(i = 0; i < NUM_TLB_ENTRIES; i++) {
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*R_TLB_SELECT = IO_FIELD(R_TLB_SELECT, index, i);
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if (IO_EXTRACT(R_TLB_HI, page_id, *R_TLB_HI) == page_id) {
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*R_TLB_HI = ( IO_FIELD(R_TLB_HI, page_id, INVALID_PAGEID ) |
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IO_FIELD(R_TLB_HI, vpn, i & 0xf ) );
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2008-01-21 05:28:16 -05:00
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2005-04-16 18:20:36 -04:00
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*R_TLB_LO = ( IO_STATE(R_TLB_LO, global,no ) |
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IO_STATE(R_TLB_LO, valid, no ) |
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IO_STATE(R_TLB_LO, kernel,no ) |
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IO_STATE(R_TLB_LO, we, no ) |
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IO_FIELD(R_TLB_LO, pfn, 0 ) );
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}
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}
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local_irq_restore(flags);
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}
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/* invalidate a single page */
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2008-01-21 05:28:16 -05:00
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void flush_tlb_page(struct vm_area_struct *vma, unsigned long addr)
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2005-04-16 18:20:36 -04:00
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{
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struct mm_struct *mm = vma->vm_mm;
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int page_id = mm->context.page_id;
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int i;
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unsigned long flags;
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D(printk("tlb: flush page %p in context %d (%p)\n", addr, page_id, mm));
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if(page_id == NO_CONTEXT)
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return;
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addr &= PAGE_MASK; /* perhaps not necessary */
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/* invalidate those TLB entries that match both the mm context
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2008-01-21 05:28:16 -05:00
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* and the virtual address requested
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2005-04-16 18:20:36 -04:00
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*/
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2007-02-10 04:43:51 -05:00
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local_irq_save(flags);
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2005-04-16 18:20:36 -04:00
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for(i = 0; i < NUM_TLB_ENTRIES; i++) {
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unsigned long tlb_hi;
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*R_TLB_SELECT = IO_FIELD(R_TLB_SELECT, index, i);
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tlb_hi = *R_TLB_HI;
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if (IO_EXTRACT(R_TLB_HI, page_id, tlb_hi) == page_id &&
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(tlb_hi & PAGE_MASK) == addr) {
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*R_TLB_HI = IO_FIELD(R_TLB_HI, page_id, INVALID_PAGEID ) |
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addr; /* same addr as before works. */
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2008-01-21 05:28:16 -05:00
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2005-04-16 18:20:36 -04:00
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*R_TLB_LO = ( IO_STATE(R_TLB_LO, global,no ) |
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IO_STATE(R_TLB_LO, valid, no ) |
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IO_STATE(R_TLB_LO, kernel,no ) |
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IO_STATE(R_TLB_LO, we, no ) |
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IO_FIELD(R_TLB_LO, pfn, 0 ) );
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}
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}
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local_irq_restore(flags);
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}
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/*
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* Initialize the context related info for a new mm_struct
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* instance.
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*/
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int
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init_new_context(struct task_struct *tsk, struct mm_struct *mm)
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{
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mm->context.page_id = NO_CONTEXT;
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return 0;
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}
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/* called in schedule() just before actually doing the switch_to */
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2008-01-21 05:28:16 -05:00
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void switch_mm(struct mm_struct *prev, struct mm_struct *next,
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struct task_struct *tsk)
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2005-04-16 18:20:36 -04:00
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{
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2008-01-21 05:28:16 -05:00
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if (prev != next) {
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/* make sure we have a context */
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get_mmu_context(next);
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2005-04-16 18:20:36 -04:00
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2008-01-21 05:28:16 -05:00
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/* remember the pgd for the fault handlers
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* this is similar to the pgd register in some other CPU's.
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* we need our own copy of it because current and active_mm
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* might be invalid at points where we still need to derefer
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* the pgd.
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*/
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2005-04-16 18:20:36 -04:00
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2008-01-21 05:28:16 -05:00
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per_cpu(current_pgd, smp_processor_id()) = next->pgd;
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2005-04-16 18:20:36 -04:00
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2008-01-21 05:28:16 -05:00
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/* switch context in the MMU */
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2005-04-16 18:20:36 -04:00
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2008-01-21 05:28:16 -05:00
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D(printk(KERN_DEBUG "switching mmu_context to %d (%p)\n",
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next->context, next));
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2005-04-16 18:20:36 -04:00
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2008-01-21 05:28:16 -05:00
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*R_MMU_CONTEXT = IO_FIELD(R_MMU_CONTEXT,
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page_id, next->context.page_id);
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}
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2005-04-16 18:20:36 -04:00
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}
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