30 lines
760 B
C
30 lines
760 B
C
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/* _PDC bit definition for Intel processors */
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#ifndef __PDC_INTEL_H__
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#define __PDC_INTEL_H__
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#define ACPI_PDC_P_FFH (0x0001)
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#define ACPI_PDC_C_C1_HALT (0x0002)
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#define ACPI_PDC_T_FFH (0x0004)
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#define ACPI_PDC_SMP_C1PT (0x0008)
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#define ACPI_PDC_SMP_C2C3 (0x0010)
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#define ACPI_PDC_SMP_P_SWCOORD (0x0020)
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#define ACPI_PDC_SMP_C_SWCOORD (0x0040)
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#define ACPI_PDC_SMP_T_SWCOORD (0x0080)
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#define ACPI_PDC_C_C1_FFH (0x0100)
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#define ACPI_PDC_EST_CAPABILITY_SMP (ACPI_PDC_SMP_C1PT | \
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ACPI_PDC_C_C1_HALT)
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#define ACPI_PDC_EST_CAPABILITY_SMP_MSR (ACPI_PDC_EST_CAPABILITY_SMP | \
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ACPI_PDC_P_FFH)
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#define ACPI_PDC_C_CAPABILITY_SMP (ACPI_PDC_SMP_C2C3 | \
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ACPI_PDC_SMP_C1PT | \
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ACPI_PDC_C_C1_HALT)
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#endif /* __PDC_INTEL_H__ */
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