blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-06 17:50:22 -04:00
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#ifndef __BFIN_ENTRY_H
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#define __BFIN_ENTRY_H
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#include <asm/setup.h>
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#include <asm/page.h>
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#ifdef __ASSEMBLY__
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#define LFLUSH_I_AND_D 0x00000808
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#define LSIGTRAP 5
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/* process bits for task_struct.flags */
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#define PF_TRACESYS_OFF 3
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#define PF_TRACESYS_BIT 5
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#define PF_PTRACED_OFF 3
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#define PF_PTRACED_BIT 4
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#define PF_DTRACE_OFF 1
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#define PF_DTRACE_BIT 5
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2008-05-06 23:41:26 -04:00
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/*
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* NOTE! The single-stepping code assumes that all interrupt handlers
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* start by saving SYSCFG on the stack with their first instruction.
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*/
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blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-06 17:50:22 -04:00
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/* This one is used for exceptions, emulation, and NMI. It doesn't push
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RETI and doesn't do cli. */
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#define SAVE_ALL_SYS save_context_no_interrupts
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/* This is used for all normal interrupts. It saves a minimum of registers
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to the stack, loads the IRQ number, and jumps to common code. */
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#define INTERRUPT_ENTRY(N) \
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[--sp] = SYSCFG; \
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\
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[--sp] = P0; /*orig_p0*/ \
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[--sp] = R0; /*orig_r0*/ \
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[--sp] = (R7:0,P5:0); \
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R0 = (N); \
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jump __common_int_entry;
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/* For timer interrupts, we need to save IPEND, since the user_mode
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macro accesses it to determine where to account time. */
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#define TIMER_INTERRUPT_ENTRY(N) \
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[--sp] = SYSCFG; \
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\
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[--sp] = P0; /*orig_p0*/ \
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[--sp] = R0; /*orig_r0*/ \
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[--sp] = (R7:0,P5:0); \
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p0.l = lo(IPEND); \
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p0.h = hi(IPEND); \
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r1 = [p0]; \
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R0 = (N); \
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jump __common_int_entry;
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/* This one pushes RETI without using CLI. Interrupts are enabled. */
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#define SAVE_CONTEXT_SYSCALL save_context_syscall
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#define SAVE_CONTEXT save_context_with_interrupts
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#define RESTORE_ALL_SYS restore_context_no_interrupts
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#define RESTORE_CONTEXT restore_context_with_interrupts
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#endif /* __ASSEMBLY__ */
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#endif /* __BFIN_ENTRY_H */
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