2006-11-17 01:07:26 -05:00
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/*
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* Philips UCB1400 touchscreen driver
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*
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* Author: Nicolas Pitre
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* Created: September 25, 2006
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* Copyright: MontaVista Software, Inc.
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*
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2008-08-03 16:34:08 -04:00
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* Spliting done by: Marek Vasut <marek.vasut@gmail.com>
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* If something doesnt work and it worked before spliting, e-mail me,
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* dont bother Nicolas please ;-)
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*
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2006-11-17 01:07:26 -05:00
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This code is heavily based on ucb1x00-*.c copyrighted by Russell King
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* covering the UCB1100, UCB1200 and UCB1300.. Support for the UCB1400 has
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* been made separate from ucb1x00-core/ucb1x00-ts on Russell's request.
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/completion.h>
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#include <linux/delay.h>
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#include <linux/input.h>
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#include <linux/device.h>
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#include <linux/interrupt.h>
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#include <linux/suspend.h>
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#include <linux/slab.h>
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#include <linux/kthread.h>
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2006-12-08 01:37:03 -05:00
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#include <linux/freezer.h>
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2008-08-03 16:34:08 -04:00
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#include <linux/ucb1400.h>
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2006-11-17 01:07:26 -05:00
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static int adcsync;
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2007-04-12 01:35:43 -04:00
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static int ts_delay = 55; /* us */
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static int ts_delay_pressure; /* us */
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2006-11-17 01:07:26 -05:00
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/* Switch to interrupt mode. */
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2008-08-03 16:34:08 -04:00
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static inline void ucb1400_ts_mode_int(struct snd_ac97 *ac97)
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2006-11-17 01:07:26 -05:00
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{
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2008-08-03 16:34:08 -04:00
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ucb1400_reg_write(ac97, UCB_TS_CR,
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2006-11-17 01:07:26 -05:00
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UCB_TS_CR_TSMX_POW | UCB_TS_CR_TSPX_POW |
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UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_GND |
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UCB_TS_CR_MODE_INT);
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}
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/*
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* Switch to pressure mode, and read pressure. We don't need to wait
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* here, since both plates are being driven.
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*/
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2008-08-03 16:34:08 -04:00
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static inline unsigned int ucb1400_ts_read_pressure(struct ucb1400_ts *ucb)
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2006-11-17 01:07:26 -05:00
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{
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2008-08-03 16:34:08 -04:00
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ucb1400_reg_write(ucb->ac97, UCB_TS_CR,
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2006-11-17 01:07:26 -05:00
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UCB_TS_CR_TSMX_POW | UCB_TS_CR_TSPX_POW |
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UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_GND |
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UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
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2007-04-12 01:35:43 -04:00
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udelay(ts_delay_pressure);
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2008-08-03 16:34:08 -04:00
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return ucb1400_adc_read(ucb->ac97, UCB_ADC_INP_TSPY, adcsync);
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2006-11-17 01:07:26 -05:00
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}
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/*
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* Switch to X position mode and measure Y plate. We switch the plate
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* configuration in pressure mode, then switch to position mode. This
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* gives a faster response time. Even so, we need to wait about 55us
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* for things to stabilise.
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*/
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2008-08-03 16:34:08 -04:00
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static inline unsigned int ucb1400_ts_read_xpos(struct ucb1400_ts *ucb)
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2006-11-17 01:07:26 -05:00
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{
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2008-08-03 16:34:08 -04:00
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ucb1400_reg_write(ucb->ac97, UCB_TS_CR,
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2006-11-17 01:07:26 -05:00
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UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW |
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UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
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2008-08-03 16:34:08 -04:00
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ucb1400_reg_write(ucb->ac97, UCB_TS_CR,
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2006-11-17 01:07:26 -05:00
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UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW |
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UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
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2008-08-03 16:34:08 -04:00
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ucb1400_reg_write(ucb->ac97, UCB_TS_CR,
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2006-11-17 01:07:26 -05:00
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UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW |
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UCB_TS_CR_MODE_POS | UCB_TS_CR_BIAS_ENA);
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2007-04-12 01:35:43 -04:00
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udelay(ts_delay);
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2006-11-17 01:07:26 -05:00
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2008-08-03 16:34:08 -04:00
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return ucb1400_adc_read(ucb->ac97, UCB_ADC_INP_TSPY, adcsync);
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2006-11-17 01:07:26 -05:00
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}
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/*
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* Switch to Y position mode and measure X plate. We switch the plate
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* configuration in pressure mode, then switch to position mode. This
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* gives a faster response time. Even so, we need to wait about 55us
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* for things to stabilise.
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*/
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2008-08-03 16:34:08 -04:00
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static inline unsigned int ucb1400_ts_read_ypos(struct ucb1400_ts *ucb)
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2006-11-17 01:07:26 -05:00
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{
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2008-08-03 16:34:08 -04:00
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ucb1400_reg_write(ucb->ac97, UCB_TS_CR,
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2006-11-17 01:07:26 -05:00
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UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW |
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UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
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2008-08-03 16:34:08 -04:00
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ucb1400_reg_write(ucb->ac97, UCB_TS_CR,
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2006-11-17 01:07:26 -05:00
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UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW |
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UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
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2008-08-03 16:34:08 -04:00
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ucb1400_reg_write(ucb->ac97, UCB_TS_CR,
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2006-11-17 01:07:26 -05:00
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UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW |
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UCB_TS_CR_MODE_POS | UCB_TS_CR_BIAS_ENA);
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2007-04-12 01:35:43 -04:00
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udelay(ts_delay);
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2006-11-17 01:07:26 -05:00
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2008-08-03 16:34:08 -04:00
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return ucb1400_adc_read(ucb->ac97, UCB_ADC_INP_TSPX, adcsync);
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2006-11-17 01:07:26 -05:00
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}
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/*
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* Switch to X plate resistance mode. Set MX to ground, PX to
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* supply. Measure current.
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*/
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2008-08-03 16:34:08 -04:00
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static inline unsigned int ucb1400_ts_read_xres(struct ucb1400_ts *ucb)
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2006-11-17 01:07:26 -05:00
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{
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2008-08-03 16:34:08 -04:00
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ucb1400_reg_write(ucb->ac97, UCB_TS_CR,
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2006-11-17 01:07:26 -05:00
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UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW |
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UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
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2008-08-03 16:34:08 -04:00
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return ucb1400_adc_read(ucb->ac97, 0, adcsync);
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2006-11-17 01:07:26 -05:00
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}
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/*
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* Switch to Y plate resistance mode. Set MY to ground, PY to
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* supply. Measure current.
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*/
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2008-08-03 16:34:08 -04:00
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static inline unsigned int ucb1400_ts_read_yres(struct ucb1400_ts *ucb)
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2006-11-17 01:07:26 -05:00
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{
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2008-08-03 16:34:08 -04:00
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ucb1400_reg_write(ucb->ac97, UCB_TS_CR,
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2006-11-17 01:07:26 -05:00
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UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW |
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UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
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2008-08-03 16:34:08 -04:00
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return ucb1400_adc_read(ucb->ac97, 0, adcsync);
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2006-11-17 01:07:26 -05:00
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}
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2008-08-03 16:34:08 -04:00
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static inline int ucb1400_ts_pen_down(struct snd_ac97 *ac97)
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2006-11-17 01:07:26 -05:00
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{
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2008-08-03 16:34:08 -04:00
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unsigned short val = ucb1400_reg_read(ac97, UCB_TS_CR);
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return val & (UCB_TS_CR_TSPX_LOW | UCB_TS_CR_TSMX_LOW);
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2006-11-17 01:07:26 -05:00
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}
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2008-08-03 16:34:08 -04:00
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static inline void ucb1400_ts_irq_enable(struct snd_ac97 *ac97)
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2006-11-17 01:07:26 -05:00
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{
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2008-08-03 16:34:08 -04:00
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ucb1400_reg_write(ac97, UCB_IE_CLEAR, UCB_IE_TSPX);
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ucb1400_reg_write(ac97, UCB_IE_CLEAR, 0);
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ucb1400_reg_write(ac97, UCB_IE_FAL, UCB_IE_TSPX);
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2006-11-17 01:07:26 -05:00
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}
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2008-08-03 16:34:08 -04:00
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static inline void ucb1400_ts_irq_disable(struct snd_ac97 *ac97)
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2006-11-17 01:07:26 -05:00
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{
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2008-08-03 16:34:08 -04:00
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ucb1400_reg_write(ac97, UCB_IE_FAL, 0);
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2006-11-17 01:07:26 -05:00
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}
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static void ucb1400_ts_evt_add(struct input_dev *idev, u16 pressure, u16 x, u16 y)
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{
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input_report_abs(idev, ABS_X, x);
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input_report_abs(idev, ABS_Y, y);
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input_report_abs(idev, ABS_PRESSURE, pressure);
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input_sync(idev);
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}
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static void ucb1400_ts_event_release(struct input_dev *idev)
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{
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input_report_abs(idev, ABS_PRESSURE, 0);
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input_sync(idev);
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}
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2008-08-03 16:34:08 -04:00
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static void ucb1400_handle_pending_irq(struct ucb1400_ts *ucb)
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2006-11-17 01:07:26 -05:00
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{
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unsigned int isr;
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2008-08-03 16:34:08 -04:00
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isr = ucb1400_reg_read(ucb->ac97, UCB_IE_STATUS);
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ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, isr);
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ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, 0);
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2006-11-17 01:07:26 -05:00
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2008-08-03 16:34:08 -04:00
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if (isr & UCB_IE_TSPX) {
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ucb1400_ts_irq_disable(ucb->ac97);
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enable_irq(ucb->irq);
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} else
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2006-11-17 01:07:26 -05:00
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printk(KERN_ERR "ucb1400: unexpected IE_STATUS = %#x\n", isr);
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}
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static int ucb1400_ts_thread(void *_ucb)
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{
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2008-08-03 16:34:08 -04:00
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struct ucb1400_ts *ucb = _ucb;
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2006-11-17 01:07:26 -05:00
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struct task_struct *tsk = current;
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int valid = 0;
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2007-05-14 23:52:07 -04:00
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struct sched_param param = { .sched_priority = 1 };
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2006-11-17 01:07:26 -05:00
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2007-05-14 23:52:07 -04:00
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sched_setscheduler(tsk, SCHED_FIFO, ¶m);
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2006-11-17 01:07:26 -05:00
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2007-07-17 07:03:35 -04:00
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set_freezable();
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2006-11-17 01:07:26 -05:00
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while (!kthread_should_stop()) {
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unsigned int x, y, p;
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long timeout;
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ucb->ts_restart = 0;
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if (ucb->irq_pending) {
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ucb->irq_pending = 0;
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ucb1400_handle_pending_irq(ucb);
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}
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2008-08-03 16:34:08 -04:00
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ucb1400_adc_enable(ucb->ac97);
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2006-11-17 01:07:26 -05:00
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x = ucb1400_ts_read_xpos(ucb);
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y = ucb1400_ts_read_ypos(ucb);
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p = ucb1400_ts_read_pressure(ucb);
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2008-08-03 16:34:08 -04:00
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ucb1400_adc_disable(ucb->ac97);
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2006-11-17 01:07:26 -05:00
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/* Switch back to interrupt mode. */
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2008-08-03 16:34:08 -04:00
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ucb1400_ts_mode_int(ucb->ac97);
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2006-11-17 01:07:26 -05:00
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msleep(10);
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2008-08-03 16:34:08 -04:00
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if (ucb1400_ts_pen_down(ucb->ac97)) {
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ucb1400_ts_irq_enable(ucb->ac97);
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2006-11-17 01:07:26 -05:00
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/*
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* If we spat out a valid sample set last time,
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* spit out a "pen off" sample here.
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*/
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if (valid) {
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ucb1400_ts_event_release(ucb->ts_idev);
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valid = 0;
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}
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timeout = MAX_SCHEDULE_TIMEOUT;
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} else {
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valid = 1;
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ucb1400_ts_evt_add(ucb->ts_idev, p, x, y);
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timeout = msecs_to_jiffies(10);
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}
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2007-10-18 06:04:45 -04:00
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wait_event_freezable_timeout(ucb->ts_wait,
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2008-08-03 16:34:08 -04:00
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ucb->irq_pending || ucb->ts_restart ||
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kthread_should_stop(), timeout);
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2006-11-17 01:07:26 -05:00
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}
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/* Send the "pen off" if we are stopping with the pen still active */
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if (valid)
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ucb1400_ts_event_release(ucb->ts_idev);
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ucb->ts_task = NULL;
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return 0;
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}
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/*
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* A restriction with interrupts exists when using the ucb1400, as
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* the codec read/write routines may sleep while waiting for codec
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* access completion and uses semaphores for access control to the
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* AC97 bus. A complete codec read cycle could take anywhere from
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* 60 to 100uSec so we *definitely* don't want to spin inside the
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* interrupt handler waiting for codec access. So, we handle the
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* interrupt by scheduling a RT kernel thread to run in process
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* context instead of interrupt context.
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*/
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static irqreturn_t ucb1400_hard_irq(int irqnr, void *devid)
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{
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2008-08-03 16:34:08 -04:00
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struct ucb1400_ts *ucb = devid;
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2006-11-17 01:07:26 -05:00
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if (irqnr == ucb->irq) {
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disable_irq(ucb->irq);
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ucb->irq_pending = 1;
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wake_up(&ucb->ts_wait);
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return IRQ_HANDLED;
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}
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return IRQ_NONE;
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}
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static int ucb1400_ts_open(struct input_dev *idev)
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{
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2008-08-03 16:34:08 -04:00
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struct ucb1400_ts *ucb = input_get_drvdata(idev);
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2006-11-17 01:07:26 -05:00
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int ret = 0;
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BUG_ON(ucb->ts_task);
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|
ucb->ts_task = kthread_run(ucb1400_ts_thread, ucb, "UCB1400_ts");
|
|
|
|
if (IS_ERR(ucb->ts_task)) {
|
|
|
|
ret = PTR_ERR(ucb->ts_task);
|
|
|
|
ucb->ts_task = NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void ucb1400_ts_close(struct input_dev *idev)
|
|
|
|
{
|
2008-08-03 16:34:08 -04:00
|
|
|
struct ucb1400_ts *ucb = input_get_drvdata(idev);
|
2006-11-17 01:07:26 -05:00
|
|
|
|
|
|
|
if (ucb->ts_task)
|
|
|
|
kthread_stop(ucb->ts_task);
|
|
|
|
|
2008-08-03 16:34:08 -04:00
|
|
|
ucb1400_ts_irq_disable(ucb->ac97);
|
|
|
|
ucb1400_reg_write(ucb->ac97, UCB_TS_CR, 0);
|
2006-11-17 01:07:26 -05:00
|
|
|
}
|
|
|
|
|
|
|
|
#ifndef NO_IRQ
|
|
|
|
#define NO_IRQ 0
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Try to probe our interrupt, rather than relying on lots of
|
|
|
|
* hard-coded machine dependencies.
|
|
|
|
*/
|
2008-08-03 16:34:08 -04:00
|
|
|
static int ucb1400_ts_detect_irq(struct ucb1400_ts *ucb)
|
2006-11-17 01:07:26 -05:00
|
|
|
{
|
|
|
|
unsigned long mask, timeout;
|
|
|
|
|
|
|
|
mask = probe_irq_on();
|
|
|
|
|
|
|
|
/* Enable the ADC interrupt. */
|
2008-08-03 16:34:08 -04:00
|
|
|
ucb1400_reg_write(ucb->ac97, UCB_IE_RIS, UCB_IE_ADC);
|
|
|
|
ucb1400_reg_write(ucb->ac97, UCB_IE_FAL, UCB_IE_ADC);
|
|
|
|
ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, 0xffff);
|
|
|
|
ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, 0);
|
2006-11-17 01:07:26 -05:00
|
|
|
|
|
|
|
/* Cause an ADC interrupt. */
|
2008-08-03 16:34:08 -04:00
|
|
|
ucb1400_reg_write(ucb->ac97, UCB_ADC_CR, UCB_ADC_ENA);
|
|
|
|
ucb1400_reg_write(ucb->ac97, UCB_ADC_CR, UCB_ADC_ENA | UCB_ADC_START);
|
2006-11-17 01:07:26 -05:00
|
|
|
|
|
|
|
/* Wait for the conversion to complete. */
|
|
|
|
timeout = jiffies + HZ/2;
|
2008-08-03 16:34:08 -04:00
|
|
|
while (!(ucb1400_reg_read(ucb->ac97, UCB_ADC_DATA) &
|
|
|
|
UCB_ADC_DAT_VALID)) {
|
2006-11-17 01:07:26 -05:00
|
|
|
cpu_relax();
|
|
|
|
if (time_after(jiffies, timeout)) {
|
|
|
|
printk(KERN_ERR "ucb1400: timed out in IRQ probe\n");
|
|
|
|
probe_irq_off(mask);
|
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
}
|
2008-08-03 16:34:08 -04:00
|
|
|
ucb1400_reg_write(ucb->ac97, UCB_ADC_CR, 0);
|
2006-11-17 01:07:26 -05:00
|
|
|
|
|
|
|
/* Disable and clear interrupt. */
|
2008-08-03 16:34:08 -04:00
|
|
|
ucb1400_reg_write(ucb->ac97, UCB_IE_RIS, 0);
|
|
|
|
ucb1400_reg_write(ucb->ac97, UCB_IE_FAL, 0);
|
|
|
|
ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, 0xffff);
|
|
|
|
ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, 0);
|
2006-11-17 01:07:26 -05:00
|
|
|
|
|
|
|
/* Read triggered interrupt. */
|
|
|
|
ucb->irq = probe_irq_off(mask);
|
|
|
|
if (ucb->irq < 0 || ucb->irq == NO_IRQ)
|
|
|
|
return -ENODEV;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2008-08-03 16:34:08 -04:00
|
|
|
static int ucb1400_ts_probe(struct platform_device *dev)
|
2006-11-17 01:07:26 -05:00
|
|
|
{
|
2008-08-03 16:34:08 -04:00
|
|
|
int error, x_res, y_res;
|
|
|
|
struct ucb1400_ts *ucb = dev->dev.platform_data;
|
2006-11-17 01:07:26 -05:00
|
|
|
|
2008-08-03 16:34:08 -04:00
|
|
|
ucb->ts_idev = input_allocate_device();
|
|
|
|
if (!ucb->ts_idev) {
|
2006-11-17 01:07:26 -05:00
|
|
|
error = -ENOMEM;
|
2008-08-03 16:34:08 -04:00
|
|
|
goto err;
|
2006-11-17 01:07:26 -05:00
|
|
|
}
|
|
|
|
|
2008-08-03 16:34:08 -04:00
|
|
|
error = ucb1400_ts_detect_irq(ucb);
|
2006-11-17 01:07:26 -05:00
|
|
|
if (error) {
|
|
|
|
printk(KERN_ERR "UCB1400: IRQ probe failed\n");
|
|
|
|
goto err_free_devs;
|
|
|
|
}
|
|
|
|
|
2008-08-03 16:34:08 -04:00
|
|
|
init_waitqueue_head(&ucb->ts_wait);
|
|
|
|
|
2006-11-17 01:07:26 -05:00
|
|
|
error = request_irq(ucb->irq, ucb1400_hard_irq, IRQF_TRIGGER_RISING,
|
|
|
|
"UCB1400", ucb);
|
|
|
|
if (error) {
|
|
|
|
printk(KERN_ERR "ucb1400: unable to grab irq%d: %d\n",
|
|
|
|
ucb->irq, error);
|
|
|
|
goto err_free_devs;
|
|
|
|
}
|
|
|
|
printk(KERN_DEBUG "UCB1400: found IRQ %d\n", ucb->irq);
|
|
|
|
|
2008-08-03 16:34:08 -04:00
|
|
|
input_set_drvdata(ucb->ts_idev, ucb);
|
2007-04-12 01:34:08 -04:00
|
|
|
|
2008-08-03 16:34:08 -04:00
|
|
|
ucb->ts_idev->dev.parent = &dev->dev;
|
|
|
|
ucb->ts_idev->name = "UCB1400 touchscreen interface";
|
|
|
|
ucb->ts_idev->id.vendor = ucb1400_reg_read(ucb->ac97,
|
|
|
|
AC97_VENDOR_ID1);
|
|
|
|
ucb->ts_idev->id.product = ucb->id;
|
|
|
|
ucb->ts_idev->open = ucb1400_ts_open;
|
|
|
|
ucb->ts_idev->close = ucb1400_ts_close;
|
|
|
|
ucb->ts_idev->evbit[0] = BIT_MASK(EV_ABS);
|
2006-11-17 01:07:26 -05:00
|
|
|
|
2008-08-03 16:34:08 -04:00
|
|
|
ucb1400_adc_enable(ucb->ac97);
|
2006-11-17 01:07:26 -05:00
|
|
|
x_res = ucb1400_ts_read_xres(ucb);
|
|
|
|
y_res = ucb1400_ts_read_yres(ucb);
|
2008-08-03 16:34:08 -04:00
|
|
|
ucb1400_adc_disable(ucb->ac97);
|
2006-11-17 01:07:26 -05:00
|
|
|
printk(KERN_DEBUG "UCB1400: x/y = %d/%d\n", x_res, y_res);
|
|
|
|
|
2008-08-03 16:34:08 -04:00
|
|
|
input_set_abs_params(ucb->ts_idev, ABS_X, 0, x_res, 0, 0);
|
|
|
|
input_set_abs_params(ucb->ts_idev, ABS_Y, 0, y_res, 0, 0);
|
|
|
|
input_set_abs_params(ucb->ts_idev, ABS_PRESSURE, 0, 0, 0, 0);
|
2006-11-17 01:07:26 -05:00
|
|
|
|
2008-08-03 16:34:08 -04:00
|
|
|
error = input_register_device(ucb->ts_idev);
|
2006-11-17 01:07:26 -05:00
|
|
|
if (error)
|
|
|
|
goto err_free_irq;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
2008-08-03 16:34:08 -04:00
|
|
|
err_free_irq:
|
2006-11-17 01:07:26 -05:00
|
|
|
free_irq(ucb->irq, ucb);
|
2008-08-03 16:34:08 -04:00
|
|
|
err_free_devs:
|
|
|
|
input_free_device(ucb->ts_idev);
|
|
|
|
err:
|
2006-11-17 01:07:26 -05:00
|
|
|
return error;
|
2008-08-03 16:34:08 -04:00
|
|
|
|
2006-11-17 01:07:26 -05:00
|
|
|
}
|
|
|
|
|
2008-08-03 16:34:08 -04:00
|
|
|
static int ucb1400_ts_remove(struct platform_device *dev)
|
2006-11-17 01:07:26 -05:00
|
|
|
{
|
2008-08-03 16:34:08 -04:00
|
|
|
struct ucb1400_ts *ucb = dev->dev.platform_data;
|
2006-11-17 01:07:26 -05:00
|
|
|
|
|
|
|
free_irq(ucb->irq, ucb);
|
|
|
|
input_unregister_device(ucb->ts_idev);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2008-08-03 16:34:08 -04:00
|
|
|
#ifdef CONFIG_PM
|
|
|
|
static int ucb1400_ts_resume(struct platform_device *dev)
|
|
|
|
{
|
|
|
|
struct ucb1400_ts *ucb = platform_get_drvdata(dev);
|
|
|
|
|
|
|
|
if (ucb->ts_task) {
|
|
|
|
/*
|
|
|
|
* Restart the TS thread to ensure the
|
|
|
|
* TS interrupt mode is set up again
|
|
|
|
* after sleep.
|
|
|
|
*/
|
|
|
|
ucb->ts_restart = 1;
|
|
|
|
wake_up(&ucb->ts_wait);
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
#else
|
|
|
|
#define ucb1400_ts_resume NULL
|
|
|
|
#endif
|
|
|
|
|
|
|
|
static struct platform_driver ucb1400_ts_driver = {
|
|
|
|
.probe = ucb1400_ts_probe,
|
|
|
|
.remove = ucb1400_ts_remove,
|
|
|
|
.resume = ucb1400_ts_resume,
|
|
|
|
.driver = {
|
|
|
|
.name = "ucb1400_ts",
|
|
|
|
},
|
2006-11-17 01:07:26 -05:00
|
|
|
};
|
|
|
|
|
|
|
|
static int __init ucb1400_ts_init(void)
|
|
|
|
{
|
2008-08-03 16:34:08 -04:00
|
|
|
return platform_driver_register(&ucb1400_ts_driver);
|
2006-11-17 01:07:26 -05:00
|
|
|
}
|
|
|
|
|
|
|
|
static void __exit ucb1400_ts_exit(void)
|
|
|
|
{
|
2008-08-03 16:34:08 -04:00
|
|
|
platform_driver_unregister(&ucb1400_ts_driver);
|
2006-11-17 01:07:26 -05:00
|
|
|
}
|
|
|
|
|
2007-04-12 01:35:43 -04:00
|
|
|
module_param(adcsync, bool, 0444);
|
|
|
|
MODULE_PARM_DESC(adcsync, "Synchronize touch readings with ADCSYNC pin.");
|
|
|
|
|
|
|
|
module_param(ts_delay, int, 0444);
|
2008-08-03 16:34:08 -04:00
|
|
|
MODULE_PARM_DESC(ts_delay, "Delay between panel setup and"
|
|
|
|
" position read. Default = 55us.");
|
2007-04-12 01:35:43 -04:00
|
|
|
|
|
|
|
module_param(ts_delay_pressure, int, 0444);
|
|
|
|
MODULE_PARM_DESC(ts_delay_pressure,
|
2008-08-03 16:34:08 -04:00
|
|
|
"delay between panel setup and pressure read."
|
|
|
|
" Default = 0us.");
|
2006-11-17 01:07:26 -05:00
|
|
|
|
|
|
|
module_init(ucb1400_ts_init);
|
|
|
|
module_exit(ucb1400_ts_exit);
|
|
|
|
|
|
|
|
MODULE_DESCRIPTION("Philips UCB1400 touchscreen driver");
|
|
|
|
MODULE_LICENSE("GPL");
|