309 lines
9.5 KiB
C
309 lines
9.5 KiB
C
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#ifndef __ser_defs_h
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#define __ser_defs_h
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/*
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* This file is autogenerated from
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* file: ../../inst/ser/rtl/ser_regs.r
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* id: ser_regs.r,v 1.23 2005/02/08 13:58:35 perz Exp
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* last modfied: Mon Apr 11 16:09:21 2005
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*
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* by /n/asic/design/tools/rdesc/src/rdes2c --outfile ser_defs.h ../../inst/ser/rtl/ser_regs.r
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* id: $Id: ser_defs.h,v 1.10 2005/04/24 18:30:58 starvik Exp $
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* Any changes here will be lost.
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*
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* -*- buffer-read-only: t -*-
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*/
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/* Main access macros */
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#ifndef REG_RD
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#define REG_RD( scope, inst, reg ) \
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REG_READ( reg_##scope##_##reg, \
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(inst) + REG_RD_ADDR_##scope##_##reg )
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#endif
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#ifndef REG_WR
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#define REG_WR( scope, inst, reg, val ) \
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REG_WRITE( reg_##scope##_##reg, \
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(inst) + REG_WR_ADDR_##scope##_##reg, (val) )
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#endif
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#ifndef REG_RD_VECT
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#define REG_RD_VECT( scope, inst, reg, index ) \
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REG_READ( reg_##scope##_##reg, \
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(inst) + REG_RD_ADDR_##scope##_##reg + \
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(index) * STRIDE_##scope##_##reg )
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#endif
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#ifndef REG_WR_VECT
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#define REG_WR_VECT( scope, inst, reg, index, val ) \
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REG_WRITE( reg_##scope##_##reg, \
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(inst) + REG_WR_ADDR_##scope##_##reg + \
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(index) * STRIDE_##scope##_##reg, (val) )
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#endif
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#ifndef REG_RD_INT
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#define REG_RD_INT( scope, inst, reg ) \
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REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
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#endif
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#ifndef REG_WR_INT
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#define REG_WR_INT( scope, inst, reg, val ) \
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REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
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#endif
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#ifndef REG_RD_INT_VECT
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#define REG_RD_INT_VECT( scope, inst, reg, index ) \
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REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
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(index) * STRIDE_##scope##_##reg )
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#endif
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#ifndef REG_WR_INT_VECT
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#define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
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REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
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(index) * STRIDE_##scope##_##reg, (val) )
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#endif
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#ifndef REG_TYPE_CONV
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#define REG_TYPE_CONV( type, orgtype, val ) \
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( { union { orgtype o; type n; } r; r.o = val; r.n; } )
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#endif
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#ifndef reg_page_size
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#define reg_page_size 8192
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#endif
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#ifndef REG_ADDR
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#define REG_ADDR( scope, inst, reg ) \
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( (inst) + REG_RD_ADDR_##scope##_##reg )
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#endif
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#ifndef REG_ADDR_VECT
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#define REG_ADDR_VECT( scope, inst, reg, index ) \
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( (inst) + REG_RD_ADDR_##scope##_##reg + \
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(index) * STRIDE_##scope##_##reg )
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#endif
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/* C-code for register scope ser */
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/* Register rw_tr_ctrl, scope ser, type rw */
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typedef struct {
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unsigned int base_freq : 3;
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unsigned int en : 1;
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unsigned int par : 2;
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unsigned int par_en : 1;
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unsigned int data_bits : 1;
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unsigned int stop_bits : 1;
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unsigned int stop : 1;
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unsigned int rts_delay : 3;
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unsigned int rts_setup : 1;
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unsigned int auto_rts : 1;
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unsigned int txd : 1;
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unsigned int auto_cts : 1;
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unsigned int dummy1 : 15;
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} reg_ser_rw_tr_ctrl;
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#define REG_RD_ADDR_ser_rw_tr_ctrl 0
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#define REG_WR_ADDR_ser_rw_tr_ctrl 0
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/* Register rw_tr_dma_en, scope ser, type rw */
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typedef struct {
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unsigned int en : 1;
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unsigned int dummy1 : 31;
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} reg_ser_rw_tr_dma_en;
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#define REG_RD_ADDR_ser_rw_tr_dma_en 4
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#define REG_WR_ADDR_ser_rw_tr_dma_en 4
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/* Register rw_rec_ctrl, scope ser, type rw */
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typedef struct {
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unsigned int base_freq : 3;
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unsigned int en : 1;
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unsigned int par : 2;
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unsigned int par_en : 1;
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unsigned int data_bits : 1;
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unsigned int dma_mode : 1;
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unsigned int dma_err : 1;
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unsigned int sampling : 1;
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unsigned int timeout : 3;
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unsigned int auto_eop : 1;
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unsigned int half_duplex : 1;
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unsigned int rts_n : 1;
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unsigned int loopback : 1;
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unsigned int dummy1 : 14;
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} reg_ser_rw_rec_ctrl;
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#define REG_RD_ADDR_ser_rw_rec_ctrl 8
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#define REG_WR_ADDR_ser_rw_rec_ctrl 8
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/* Register rw_tr_baud_div, scope ser, type rw */
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typedef struct {
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unsigned int div : 16;
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unsigned int dummy1 : 16;
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} reg_ser_rw_tr_baud_div;
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#define REG_RD_ADDR_ser_rw_tr_baud_div 12
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#define REG_WR_ADDR_ser_rw_tr_baud_div 12
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/* Register rw_rec_baud_div, scope ser, type rw */
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typedef struct {
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unsigned int div : 16;
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unsigned int dummy1 : 16;
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} reg_ser_rw_rec_baud_div;
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#define REG_RD_ADDR_ser_rw_rec_baud_div 16
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#define REG_WR_ADDR_ser_rw_rec_baud_div 16
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/* Register rw_xoff, scope ser, type rw */
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typedef struct {
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unsigned int chr : 8;
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unsigned int automatic : 1;
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unsigned int dummy1 : 23;
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} reg_ser_rw_xoff;
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#define REG_RD_ADDR_ser_rw_xoff 20
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#define REG_WR_ADDR_ser_rw_xoff 20
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/* Register rw_xoff_clr, scope ser, type rw */
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typedef struct {
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unsigned int clr : 1;
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unsigned int dummy1 : 31;
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} reg_ser_rw_xoff_clr;
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#define REG_RD_ADDR_ser_rw_xoff_clr 24
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#define REG_WR_ADDR_ser_rw_xoff_clr 24
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/* Register rw_dout, scope ser, type rw */
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typedef struct {
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unsigned int data : 8;
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unsigned int dummy1 : 24;
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} reg_ser_rw_dout;
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#define REG_RD_ADDR_ser_rw_dout 28
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#define REG_WR_ADDR_ser_rw_dout 28
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/* Register rs_stat_din, scope ser, type rs */
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typedef struct {
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unsigned int data : 8;
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unsigned int dummy1 : 8;
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unsigned int dav : 1;
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unsigned int framing_err : 1;
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unsigned int par_err : 1;
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unsigned int orun : 1;
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unsigned int rec_err : 1;
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unsigned int rxd : 1;
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unsigned int tr_idle : 1;
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unsigned int tr_empty : 1;
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unsigned int tr_rdy : 1;
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unsigned int cts_n : 1;
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unsigned int xoff_detect : 1;
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unsigned int rts_n : 1;
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unsigned int txd : 1;
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unsigned int dummy2 : 3;
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} reg_ser_rs_stat_din;
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#define REG_RD_ADDR_ser_rs_stat_din 32
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/* Register r_stat_din, scope ser, type r */
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typedef struct {
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unsigned int data : 8;
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unsigned int dummy1 : 8;
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unsigned int dav : 1;
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unsigned int framing_err : 1;
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unsigned int par_err : 1;
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unsigned int orun : 1;
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unsigned int rec_err : 1;
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unsigned int rxd : 1;
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unsigned int tr_idle : 1;
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unsigned int tr_empty : 1;
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unsigned int tr_rdy : 1;
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unsigned int cts_n : 1;
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unsigned int xoff_detect : 1;
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unsigned int rts_n : 1;
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unsigned int txd : 1;
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unsigned int dummy2 : 3;
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} reg_ser_r_stat_din;
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#define REG_RD_ADDR_ser_r_stat_din 36
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/* Register rw_rec_eop, scope ser, type rw */
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typedef struct {
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unsigned int set : 1;
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unsigned int dummy1 : 31;
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} reg_ser_rw_rec_eop;
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#define REG_RD_ADDR_ser_rw_rec_eop 40
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#define REG_WR_ADDR_ser_rw_rec_eop 40
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/* Register rw_intr_mask, scope ser, type rw */
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typedef struct {
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unsigned int tr_rdy : 1;
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unsigned int tr_empty : 1;
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unsigned int tr_idle : 1;
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unsigned int dav : 1;
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unsigned int dummy1 : 28;
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} reg_ser_rw_intr_mask;
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#define REG_RD_ADDR_ser_rw_intr_mask 44
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#define REG_WR_ADDR_ser_rw_intr_mask 44
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/* Register rw_ack_intr, scope ser, type rw */
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typedef struct {
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unsigned int tr_rdy : 1;
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unsigned int tr_empty : 1;
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unsigned int tr_idle : 1;
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unsigned int dav : 1;
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unsigned int dummy1 : 28;
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} reg_ser_rw_ack_intr;
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#define REG_RD_ADDR_ser_rw_ack_intr 48
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#define REG_WR_ADDR_ser_rw_ack_intr 48
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/* Register r_intr, scope ser, type r */
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typedef struct {
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unsigned int tr_rdy : 1;
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unsigned int tr_empty : 1;
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unsigned int tr_idle : 1;
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unsigned int dav : 1;
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unsigned int dummy1 : 28;
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} reg_ser_r_intr;
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#define REG_RD_ADDR_ser_r_intr 52
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/* Register r_masked_intr, scope ser, type r */
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typedef struct {
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unsigned int tr_rdy : 1;
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unsigned int tr_empty : 1;
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unsigned int tr_idle : 1;
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unsigned int dav : 1;
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unsigned int dummy1 : 28;
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} reg_ser_r_masked_intr;
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#define REG_RD_ADDR_ser_r_masked_intr 56
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/* Constants */
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enum {
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regk_ser_active = 0x00000000,
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regk_ser_bits1 = 0x00000000,
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regk_ser_bits2 = 0x00000001,
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regk_ser_bits7 = 0x00000001,
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regk_ser_bits8 = 0x00000000,
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regk_ser_del0_5 = 0x00000000,
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regk_ser_del1 = 0x00000001,
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regk_ser_del1_5 = 0x00000002,
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regk_ser_del2 = 0x00000003,
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regk_ser_del2_5 = 0x00000004,
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regk_ser_del3 = 0x00000005,
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regk_ser_del3_5 = 0x00000006,
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regk_ser_del4 = 0x00000007,
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regk_ser_even = 0x00000000,
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regk_ser_ext = 0x00000001,
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regk_ser_f100 = 0x00000007,
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regk_ser_f29_493 = 0x00000004,
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regk_ser_f32 = 0x00000005,
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regk_ser_f32_768 = 0x00000006,
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regk_ser_ignore = 0x00000001,
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regk_ser_inactive = 0x00000001,
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regk_ser_majority = 0x00000001,
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regk_ser_mark = 0x00000002,
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regk_ser_middle = 0x00000000,
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regk_ser_no = 0x00000000,
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regk_ser_odd = 0x00000001,
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regk_ser_off = 0x00000000,
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regk_ser_rw_intr_mask_default = 0x00000000,
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regk_ser_rw_rec_baud_div_default = 0x00000000,
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regk_ser_rw_rec_ctrl_default = 0x00010000,
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regk_ser_rw_tr_baud_div_default = 0x00000000,
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regk_ser_rw_tr_ctrl_default = 0x00008000,
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regk_ser_rw_tr_dma_en_default = 0x00000000,
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regk_ser_rw_xoff_default = 0x00000000,
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regk_ser_space = 0x00000003,
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regk_ser_stop = 0x00000000,
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regk_ser_yes = 0x00000001
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};
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#endif /* __ser_defs_h */
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