[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-26 02:32:13 -04:00
|
|
|
#ifndef __ASM_AVR32_DMA_MAPPING_H
|
|
|
|
#define __ASM_AVR32_DMA_MAPPING_H
|
|
|
|
|
|
|
|
#include <linux/mm.h>
|
|
|
|
#include <linux/device.h>
|
2007-10-24 04:16:02 -04:00
|
|
|
#include <linux/scatterlist.h>
|
[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-26 02:32:13 -04:00
|
|
|
#include <asm/processor.h>
|
|
|
|
#include <asm/cacheflush.h>
|
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|
#include <asm/io.h>
|
|
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|
2006-12-06 23:38:56 -05:00
|
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extern void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
|
|
|
|
int direction);
|
[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-26 02:32:13 -04:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Return whether the given device DMA address mask can be supported
|
|
|
|
* properly. For example, if your device can only drive the low 24-bits
|
|
|
|
* during bus mastering, then you would pass 0x00ffffff as the mask
|
|
|
|
* to this function.
|
|
|
|
*/
|
|
|
|
static inline int dma_supported(struct device *dev, u64 mask)
|
|
|
|
{
|
|
|
|
/* Fix when needed. I really don't know of any limitations */
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
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|
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|
|
static inline int dma_set_mask(struct device *dev, u64 dma_mask)
|
|
|
|
{
|
|
|
|
if (!dev->dma_mask || !dma_supported(dev, dma_mask))
|
|
|
|
return -EIO;
|
|
|
|
|
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|
|
*dev->dma_mask = dma_mask;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2007-02-01 10:26:03 -05:00
|
|
|
/*
|
|
|
|
* dma_map_single can't fail as it is implemented now.
|
|
|
|
*/
|
|
|
|
static inline int dma_mapping_error(dma_addr_t addr)
|
|
|
|
{
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-26 02:32:13 -04:00
|
|
|
/**
|
|
|
|
* dma_alloc_coherent - allocate consistent memory for DMA
|
|
|
|
* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
|
|
|
|
* @size: required memory size
|
|
|
|
* @handle: bus-specific DMA address
|
|
|
|
*
|
|
|
|
* Allocate some uncached, unbuffered memory for a device for
|
|
|
|
* performing DMA. This function allocates pages, and will
|
|
|
|
* return the CPU-viewed address, and sets @handle to be the
|
|
|
|
* device-viewed address.
|
|
|
|
*/
|
|
|
|
extern void *dma_alloc_coherent(struct device *dev, size_t size,
|
|
|
|
dma_addr_t *handle, gfp_t gfp);
|
|
|
|
|
|
|
|
/**
|
|
|
|
* dma_free_coherent - free memory allocated by dma_alloc_coherent
|
|
|
|
* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
|
|
|
|
* @size: size of memory originally requested in dma_alloc_coherent
|
|
|
|
* @cpu_addr: CPU-view address returned from dma_alloc_coherent
|
|
|
|
* @handle: device-view address returned from dma_alloc_coherent
|
|
|
|
*
|
|
|
|
* Free (and unmap) a DMA buffer previously allocated by
|
|
|
|
* dma_alloc_coherent().
|
|
|
|
*
|
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|
|
* References to memory and mappings associated with cpu_addr/handle
|
|
|
|
* during and after this call executing are illegal.
|
|
|
|
*/
|
|
|
|
extern void dma_free_coherent(struct device *dev, size_t size,
|
|
|
|
void *cpu_addr, dma_addr_t handle);
|
|
|
|
|
|
|
|
/**
|
|
|
|
* dma_alloc_writecombine - allocate write-combining memory for DMA
|
|
|
|
* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
|
|
|
|
* @size: required memory size
|
|
|
|
* @handle: bus-specific DMA address
|
|
|
|
*
|
|
|
|
* Allocate some uncached, buffered memory for a device for
|
|
|
|
* performing DMA. This function allocates pages, and will
|
|
|
|
* return the CPU-viewed address, and sets @handle to be the
|
|
|
|
* device-viewed address.
|
|
|
|
*/
|
|
|
|
extern void *dma_alloc_writecombine(struct device *dev, size_t size,
|
|
|
|
dma_addr_t *handle, gfp_t gfp);
|
|
|
|
|
|
|
|
/**
|
|
|
|
* dma_free_coherent - free memory allocated by dma_alloc_writecombine
|
|
|
|
* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
|
|
|
|
* @size: size of memory originally requested in dma_alloc_writecombine
|
|
|
|
* @cpu_addr: CPU-view address returned from dma_alloc_writecombine
|
|
|
|
* @handle: device-view address returned from dma_alloc_writecombine
|
|
|
|
*
|
|
|
|
* Free (and unmap) a DMA buffer previously allocated by
|
|
|
|
* dma_alloc_writecombine().
|
|
|
|
*
|
|
|
|
* References to memory and mappings associated with cpu_addr/handle
|
|
|
|
* during and after this call executing are illegal.
|
|
|
|
*/
|
|
|
|
extern void dma_free_writecombine(struct device *dev, size_t size,
|
|
|
|
void *cpu_addr, dma_addr_t handle);
|
|
|
|
|
|
|
|
/**
|
|
|
|
* dma_map_single - map a single buffer for streaming DMA
|
|
|
|
* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
|
|
|
|
* @cpu_addr: CPU direct mapped address of buffer
|
|
|
|
* @size: size of buffer to map
|
|
|
|
* @dir: DMA transfer direction
|
|
|
|
*
|
|
|
|
* Ensure that any data held in the cache is appropriately discarded
|
|
|
|
* or written back.
|
|
|
|
*
|
|
|
|
* The device owns this memory once this call has completed. The CPU
|
|
|
|
* can regain ownership by calling dma_unmap_single() or dma_sync_single().
|
|
|
|
*/
|
|
|
|
static inline dma_addr_t
|
|
|
|
dma_map_single(struct device *dev, void *cpu_addr, size_t size,
|
|
|
|
enum dma_data_direction direction)
|
|
|
|
{
|
2006-12-08 06:53:26 -05:00
|
|
|
dma_cache_sync(dev, cpu_addr, size, direction);
|
[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-26 02:32:13 -04:00
|
|
|
return virt_to_bus(cpu_addr);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* dma_unmap_single - unmap a single buffer previously mapped
|
|
|
|
* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
|
|
|
|
* @handle: DMA address of buffer
|
|
|
|
* @size: size of buffer to map
|
|
|
|
* @dir: DMA transfer direction
|
|
|
|
*
|
|
|
|
* Unmap a single streaming mode DMA translation. The handle and size
|
|
|
|
* must match what was provided in the previous dma_map_single() call.
|
|
|
|
* All other usages are undefined.
|
|
|
|
*
|
|
|
|
* After this call, reads by the CPU to the buffer are guaranteed to see
|
|
|
|
* whatever the device wrote there.
|
|
|
|
*/
|
|
|
|
static inline void
|
|
|
|
dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
|
|
|
|
enum dma_data_direction direction)
|
|
|
|
{
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* dma_map_page - map a portion of a page for streaming DMA
|
|
|
|
* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
|
|
|
|
* @page: page that buffer resides in
|
|
|
|
* @offset: offset into page for start of buffer
|
|
|
|
* @size: size of buffer to map
|
|
|
|
* @dir: DMA transfer direction
|
|
|
|
*
|
|
|
|
* Ensure that any data held in the cache is appropriately discarded
|
|
|
|
* or written back.
|
|
|
|
*
|
|
|
|
* The device owns this memory once this call has completed. The CPU
|
|
|
|
* can regain ownership by calling dma_unmap_page() or dma_sync_single().
|
|
|
|
*/
|
|
|
|
static inline dma_addr_t
|
|
|
|
dma_map_page(struct device *dev, struct page *page,
|
|
|
|
unsigned long offset, size_t size,
|
|
|
|
enum dma_data_direction direction)
|
|
|
|
{
|
|
|
|
return dma_map_single(dev, page_address(page) + offset,
|
|
|
|
size, direction);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* dma_unmap_page - unmap a buffer previously mapped through dma_map_page()
|
|
|
|
* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
|
|
|
|
* @handle: DMA address of buffer
|
|
|
|
* @size: size of buffer to map
|
|
|
|
* @dir: DMA transfer direction
|
|
|
|
*
|
|
|
|
* Unmap a single streaming mode DMA translation. The handle and size
|
|
|
|
* must match what was provided in the previous dma_map_single() call.
|
|
|
|
* All other usages are undefined.
|
|
|
|
*
|
|
|
|
* After this call, reads by the CPU to the buffer are guaranteed to see
|
|
|
|
* whatever the device wrote there.
|
|
|
|
*/
|
|
|
|
static inline void
|
|
|
|
dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
|
|
|
|
enum dma_data_direction direction)
|
|
|
|
{
|
|
|
|
dma_unmap_single(dev, dma_address, size, direction);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* dma_map_sg - map a set of SG buffers for streaming mode DMA
|
|
|
|
* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
|
|
|
|
* @sg: list of buffers
|
|
|
|
* @nents: number of buffers to map
|
|
|
|
* @dir: DMA transfer direction
|
|
|
|
*
|
|
|
|
* Map a set of buffers described by scatterlist in streaming
|
|
|
|
* mode for DMA. This is the scatter-gather version of the
|
|
|
|
* above pci_map_single interface. Here the scatter gather list
|
|
|
|
* elements are each tagged with the appropriate dma address
|
|
|
|
* and length. They are obtained via sg_dma_{address,length}(SG).
|
|
|
|
*
|
|
|
|
* NOTE: An implementation may be able to use a smaller number of
|
|
|
|
* DMA address/length pairs than there are SG table elements.
|
|
|
|
* (for example via virtual mapping capabilities)
|
|
|
|
* The routine returns the number of addr/length pairs actually
|
|
|
|
* used, at most nents.
|
|
|
|
*
|
|
|
|
* Device ownership issues as mentioned above for pci_map_single are
|
|
|
|
* the same here.
|
|
|
|
*/
|
|
|
|
static inline int
|
|
|
|
dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
|
|
|
|
enum dma_data_direction direction)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = 0; i < nents; i++) {
|
|
|
|
char *virt;
|
|
|
|
|
2007-10-23 06:54:14 -04:00
|
|
|
sg[i].dma_address = page_to_bus(sg_page(&sg[i])) + sg[i].offset;
|
|
|
|
virt = sg_virt(&sg[i]);
|
2006-12-08 06:53:26 -05:00
|
|
|
dma_cache_sync(dev, virt, sg[i].length, direction);
|
[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-26 02:32:13 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
return nents;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
|
|
|
|
* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
|
|
|
|
* @sg: list of buffers
|
|
|
|
* @nents: number of buffers to map
|
|
|
|
* @dir: DMA transfer direction
|
|
|
|
*
|
|
|
|
* Unmap a set of streaming mode DMA translations.
|
|
|
|
* Again, CPU read rules concerning calls here are the same as for
|
|
|
|
* pci_unmap_single() above.
|
|
|
|
*/
|
|
|
|
static inline void
|
|
|
|
dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
|
|
|
|
enum dma_data_direction direction)
|
|
|
|
{
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* dma_sync_single_for_cpu
|
|
|
|
* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
|
|
|
|
* @handle: DMA address of buffer
|
|
|
|
* @size: size of buffer to map
|
|
|
|
* @dir: DMA transfer direction
|
|
|
|
*
|
|
|
|
* Make physical memory consistent for a single streaming mode DMA
|
|
|
|
* translation after a transfer.
|
|
|
|
*
|
|
|
|
* If you perform a dma_map_single() but wish to interrogate the
|
|
|
|
* buffer using the cpu, yet do not wish to teardown the DMA mapping,
|
|
|
|
* you must call this function before doing so. At the next point you
|
|
|
|
* give the DMA address back to the card, you must first perform a
|
|
|
|
* dma_sync_single_for_device, and then the device again owns the
|
|
|
|
* buffer.
|
|
|
|
*/
|
|
|
|
static inline void
|
|
|
|
dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle,
|
|
|
|
size_t size, enum dma_data_direction direction)
|
|
|
|
{
|
2007-09-07 11:00:25 -04:00
|
|
|
/*
|
|
|
|
* No need to do anything since the CPU isn't supposed to
|
|
|
|
* touch this memory after we flushed it at mapping- or
|
|
|
|
* sync-for-device time.
|
|
|
|
*/
|
[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-26 02:32:13 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
static inline void
|
|
|
|
dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle,
|
|
|
|
size_t size, enum dma_data_direction direction)
|
|
|
|
{
|
2006-12-08 06:53:26 -05:00
|
|
|
dma_cache_sync(dev, bus_to_virt(dma_handle), size, direction);
|
[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-26 02:32:13 -04:00
|
|
|
}
|
|
|
|
|
2007-03-02 19:57:46 -05:00
|
|
|
static inline void
|
|
|
|
dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,
|
|
|
|
unsigned long offset, size_t size,
|
|
|
|
enum dma_data_direction direction)
|
|
|
|
{
|
|
|
|
/* just sync everything, that's all the pci API can do */
|
|
|
|
dma_sync_single_for_cpu(dev, dma_handle, offset+size, direction);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void
|
|
|
|
dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
|
|
|
|
unsigned long offset, size_t size,
|
|
|
|
enum dma_data_direction direction)
|
|
|
|
{
|
|
|
|
/* just sync everything, that's all the pci API can do */
|
|
|
|
dma_sync_single_for_device(dev, dma_handle, offset+size, direction);
|
|
|
|
}
|
|
|
|
|
[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-26 02:32:13 -04:00
|
|
|
/**
|
|
|
|
* dma_sync_sg_for_cpu
|
|
|
|
* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
|
|
|
|
* @sg: list of buffers
|
|
|
|
* @nents: number of buffers to map
|
|
|
|
* @dir: DMA transfer direction
|
|
|
|
*
|
|
|
|
* Make physical memory consistent for a set of streaming
|
|
|
|
* mode DMA translations after a transfer.
|
|
|
|
*
|
|
|
|
* The same as dma_sync_single_for_* but for a scatter-gather list,
|
|
|
|
* same rules and usage.
|
|
|
|
*/
|
|
|
|
static inline void
|
|
|
|
dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
|
|
|
|
int nents, enum dma_data_direction direction)
|
|
|
|
{
|
2007-09-07 11:00:25 -04:00
|
|
|
/*
|
|
|
|
* No need to do anything since the CPU isn't supposed to
|
|
|
|
* touch this memory after we flushed it at mapping- or
|
|
|
|
* sync-for-device time.
|
|
|
|
*/
|
[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-26 02:32:13 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
static inline void
|
|
|
|
dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
|
|
|
|
int nents, enum dma_data_direction direction)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = 0; i < nents; i++) {
|
2007-10-23 06:54:14 -04:00
|
|
|
dma_cache_sync(dev, sg_virt(&sg[i]), sg[i].length, direction);
|
[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-26 02:32:13 -04:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Now for the API extensions over the pci_ one */
|
|
|
|
|
|
|
|
#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
|
|
|
|
#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
|
|
|
|
|
2006-12-06 23:38:54 -05:00
|
|
|
static inline int dma_is_consistent(struct device *dev, dma_addr_t dma_addr)
|
[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-26 02:32:13 -04:00
|
|
|
{
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int dma_get_cache_alignment(void)
|
|
|
|
{
|
|
|
|
return boot_cpu_data.dcache.linesz;
|
|
|
|
}
|
|
|
|
|
|
|
|
#endif /* __ASM_AVR32_DMA_MAPPING_H */
|