blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-06 17:50:22 -04:00
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#ifndef __BFIN_TERMIOS_H__
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#define __BFIN_TERMIOS_H__
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#include <asm/termbits.h>
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#include <asm/ioctls.h>
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struct winsize {
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unsigned short ws_row;
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unsigned short ws_col;
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unsigned short ws_xpixel;
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unsigned short ws_ypixel;
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};
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#define NCC 8
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struct termio {
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unsigned short c_iflag; /* input mode flags */
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unsigned short c_oflag; /* output mode flags */
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unsigned short c_cflag; /* control mode flags */
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unsigned short c_lflag; /* local mode flags */
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unsigned char c_line; /* line discipline */
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unsigned char c_cc[NCC]; /* control characters */
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};
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/* modem lines */
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#define TIOCM_LE 0x001
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#define TIOCM_DTR 0x002
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#define TIOCM_RTS 0x004
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#define TIOCM_ST 0x008
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#define TIOCM_SR 0x010
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#define TIOCM_CTS 0x020
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#define TIOCM_CAR 0x040
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#define TIOCM_RNG 0x080
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#define TIOCM_DSR 0x100
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#define TIOCM_CD TIOCM_CAR
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#define TIOCM_RI TIOCM_RNG
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#define TIOCM_OUT1 0x2000
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#define TIOCM_OUT2 0x4000
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#define TIOCM_LOOP 0x8000
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/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
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/* line disciplines */
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#define N_TTY 0
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#define N_SLIP 1
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#define N_MOUSE 2
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#define N_PPP 3
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#define N_STRIP 4
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#define N_AX25 5
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#define N_X25 6 /* X.25 async */
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#define N_6PACK 7
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#define N_MASC 8 /* Reserved for Mobitex module <kaz@cafe.net> */
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#define N_R3964 9 /* Reserved for Simatic R3964 module */
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#define N_PROFIBUS_FDL 10 /* Reserved for Profibus <Dave@mvhi.com> */
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#define N_IRDA 11 /* Linux IR - http://irda.sourceforge.net/ */
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#define N_SMSBLOCK 12 /* SMS block mode - for talking to GSM data cards about SMS messages */
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#define N_HDLC 13 /* synchronous HDLC */
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#define N_SYNC_PPP 14 /* synchronous PPP */
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#define N_HCI 15 /* Bluetooth HCI UART */
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#ifdef __KERNEL__
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/* intr=^C quit=^\ erase=del kill=^U
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eof=^D vtime=\0 vmin=\1 sxtc=\0
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start=^Q stop=^S susp=^Z eol=\0
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reprint=^R discard=^U werase=^W lnext=^V
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eol2=\0
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*/
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#define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0"
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/*
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* Translate a "termio" structure into a "termios". Ugh.
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*/
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#define SET_LOW_TERMIOS_BITS(termios, termio, x) { \
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unsigned short __tmp; \
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get_user(__tmp,&(termio)->x); \
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*(unsigned short *) &(termios)->x = __tmp; \
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}
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#define user_termio_to_kernel_termios(termios, termio) \
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({ \
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SET_LOW_TERMIOS_BITS(termios, termio, c_iflag); \
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SET_LOW_TERMIOS_BITS(termios, termio, c_oflag); \
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SET_LOW_TERMIOS_BITS(termios, termio, c_cflag); \
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SET_LOW_TERMIOS_BITS(termios, termio, c_lflag); \
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copy_from_user((termios)->c_cc, (termio)->c_cc, NCC); \
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})
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/*
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* Translate a "termios" structure into a "termio". Ugh.
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*/
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#define kernel_termios_to_user_termio(termio, termios) \
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({ \
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put_user((termios)->c_iflag, &(termio)->c_iflag); \
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put_user((termios)->c_oflag, &(termio)->c_oflag); \
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put_user((termios)->c_cflag, &(termio)->c_cflag); \
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put_user((termios)->c_lflag, &(termio)->c_lflag); \
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put_user((termios)->c_line, &(termio)->c_line); \
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copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \
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})
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2007-08-05 07:16:05 -04:00
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#define user_termios_to_kernel_termios(k, u) \
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copy_from_user(k, u, sizeof(struct termios2))
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#define kernel_termios_to_user_termios(u, k) \
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copy_to_user(u, k, sizeof(struct termios2))
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#define user_termios_to_kernel_termios_1(k, u) \
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copy_from_user(k, u, sizeof(struct termios))
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#define kernel_termios_to_user_termios_1(u, k) \
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copy_to_user(u, k, sizeof(struct termios))
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blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-06 17:50:22 -04:00
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#endif /* __KERNEL__ */
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#endif /* __BFIN_TERMIOS_H__ */
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