android_kernel_xiaomi_sm8350/arch/blackfin/kernel/cplb-mpu/Makefile

#
# arch/blackfin/kernel/cplb-nompu/Makefile
#

obj-y := cplbinit.o cacheinit.o cplbmgr.o

CFLAGS_cplbmgr.o := -ffixed-I0 -ffixed-I1 -ffixed-I2 -ffixed-I3 \
		    -ffixed-L0 -ffixed-L1 -ffixed-L2 -ffixed-L3 \
		    -ffixed-M0 -ffixed-M1 -ffixed-M2 -ffixed-M3 \
		    -ffixed-B0 -ffixed-B1 -ffixed-B2 -ffixed-B3
[Blackfin] arch: Initial checkin of the memory protection support. Enable it with CONFIG_MPU. Signed-off-by: Bernd Schmidt <bernd.schmidt@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com> 2008-01-27 05:39:16 -05:00			`#`
			`# arch/blackfin/kernel/cplb-nompu/Makefile`
			`#`

			`obj-y := cplbinit.o cacheinit.o cplbmgr.o`
Blackfin arch: Faster C implementation of no-MPU CPLB handler This is a mixture ofcMichael McTernan's patch and the existing cplb-mpu code. We ditch the old cplb-nompu implementation, which is a good example of why a good algorithm in a HLL is preferrable to a bad algorithm written in assembly. Rather than try to construct a table of all posible CPLBs and search it, we just create a (smaller) table of memory regions and their attributes. Some of the data structures are now unified for both the mpu and nompu cases. A lot of needless complexity in cplbinit.c is removed. Further optimizations: * compile cplbmgr.c with a lot of -ffixed-reg options, and omit saving these registers on the stack when entering a CPLB exception. * lose cli/nop/nop/sti sequences for some workarounds - these don't * make sense in an exception context Additional code unification should be possible after this. [Mike Frysinger <vapier.adi@gmail.com>: - convert CPP if statements to C if statements - remove redundant statements - use a do...while loop rather than a for loop to get slightly better optimization and to avoid gcc "may be used uninitialized" warnings ... we know that the [id]cplb_nr_bounds variables will never be 0, so this is OK - the no-mpu code was the last user of MAX_MEM_SIZE and with that rewritten, we can punt it - add some BUG_ON() checks to make sure we dont overflow the small cplb_bounds array - add i/d cplb entries for the bootrom because there is functions/data in there we want to access - we do not need a NULL trailing entry as any time we access the bounds arrays, we use the nr_bounds variable ] Signed-off-by: Michael McTernan <mmcternan@airvana.com> Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bernd Schmidt <bernds_cb1@t-online.de> Signed-off-by: Bryan Wu <cooloney@kernel.org> 2009-01-07 10:14:38 -05:00
			`CFLAGS_cplbmgr.o := -ffixed-I0 -ffixed-I1 -ffixed-I2 -ffixed-I3 \`
			`-ffixed-L0 -ffixed-L1 -ffixed-L2 -ffixed-L3 \`
			`-ffixed-M0 -ffixed-M1 -ffixed-M2 -ffixed-M3 \`
			`-ffixed-B0 -ffixed-B1 -ffixed-B2 -ffixed-B3`