android_kernel_xiaomi_sm8350/arch/arm/mach-mmp/include/mach/regs-apmu.h

/*
 * linux/arch/arm/mach-mmp/include/mach/regs-apmu.h
 *
 *   Application Subsystem Power Management Unit
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#ifndef __ASM_MACH_REGS_APMU_H
#define __ASM_MACH_REGS_APMU_H

#include <mach/addr-map.h>

#define APMU_VIRT_BASE	(AXI_VIRT_BASE + 0x82800)
#define APMU_REG(x)	(APMU_VIRT_BASE + (x))

/* Clock Reset Control */
#define APMU_IRE	APMU_REG(0x048)
#define APMU_LCD	APMU_REG(0x04c)
#define APMU_CCIC	APMU_REG(0x050)
#define APMU_SDH0	APMU_REG(0x054)
#define APMU_SDH1	APMU_REG(0x058)
#define APMU_USB	APMU_REG(0x05c)
#define APMU_NAND	APMU_REG(0x060)
#define APMU_DMA	APMU_REG(0x064)
#define APMU_GEU	APMU_REG(0x068)
#define APMU_BUS	APMU_REG(0x06c)

#define APMU_FNCLK_EN	(1 << 4)
#define APMU_AXICLK_EN	(1 << 3)
#define APMU_FNRST_DIS	(1 << 1)
#define APMU_AXIRST_DIS	(1 << 0)

#endif /* __ASM_MACH_REGS_APMU_H */
[ARM] pxa: add base support for Marvell's PXA168 processor line """The Marvell® PXA168 processor is the first in a family of application processors targeted at mass market opportunities in computing and consumer devices. It balances high computing and multimedia performance with low power consumption to support extended battery life, and includes a wealth of integrated peripherals to reduce overall BOM cost .... """ See http://www.marvell.com/featured/pxa168.jsp for more information. 1. Marvell Mohawk core is a hybrid of xscale3 and its own ARM core, there are many enhancements like instructions for flushing the whole D-cache, and so on 2. Clock reuses Russell's common clkdev, and added the basic support for UART1/2. 3. Devices are a bit different from the 'mach-pxa' way, the platform devices are now dynamically allocated only when necessary (i.e. when pxa_register_device() is called). Description for each device are stored in an array of 'struct pxa_device_desc'. Now that: a. this array of device description is marked with __initdata and can be freed up system is fully up b. which means board code has to add all needed devices early in his initializing function c. platform specific data can now be marked as __initdata since they are allocated and copied by platform_device_add_data() 4. only the basic UART1/2/3 are added, more devices will come later. Signed-off-by: Jason Chagas <chagas@marvell.com> Signed-off-by: Eric Miao <eric.miao@marvell.com> 2009-01-20 01:15:18 -05:00			`/*`
			`* linux/arch/arm/mach-mmp/include/mach/regs-apmu.h`
			`*`
			`* Application Subsystem Power Management Unit`
			`*`
			`* This program is free software; you can redistribute it and/or modify`
			`* it under the terms of the GNU General Public License version 2 as`
			`* published by the Free Software Foundation.`
			`*/`

			`#ifndef __ASM_MACH_REGS_APMU_H`
			`#define __ASM_MACH_REGS_APMU_H`

			`#include <mach/addr-map.h>`

			`#define APMU_VIRT_BASE (AXI_VIRT_BASE + 0x82800)`
			`#define APMU_REG(x) (APMU_VIRT_BASE + (x))`

			`/* Clock Reset Control */`
			`#define APMU_IRE APMU_REG(0x048)`
			`#define APMU_LCD APMU_REG(0x04c)`
			`#define APMU_CCIC APMU_REG(0x050)`
			`#define APMU_SDH0 APMU_REG(0x054)`
			`#define APMU_SDH1 APMU_REG(0x058)`
			`#define APMU_USB APMU_REG(0x05c)`
			`#define APMU_NAND APMU_REG(0x060)`
			`#define APMU_DMA APMU_REG(0x064)`
			`#define APMU_GEU APMU_REG(0x068)`
			`#define APMU_BUS APMU_REG(0x06c)`

			`#define APMU_FNCLK_EN (1 << 4)`
			`#define APMU_AXICLK_EN (1 << 3)`
			`#define APMU_FNRST_DIS (1 << 1)`
			`#define APMU_AXIRST_DIS (1 << 0)`

			`#endif /* __ASM_MACH_REGS_APMU_H */`