66 lines
2.7 KiB
C
66 lines
2.7 KiB
C
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/*
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* include/asm-arm/arch-ks8695/regs-lan.h
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*
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* Copyright (C) 2006 Andrew Victor
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*
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* KS8695 - LAN Registers and bit definitions.
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#ifndef KS8695_LAN_H
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#define KS8695_LAN_H
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#define KS8695_LAN_OFFSET (0xF0000 + 0x8000)
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#define KS8695_LAN_VA (KS8695_IO_VA + KS8695_LAN_OFFSET)
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#define KS8695_LAN_PA (KS8695_IO_PA + KS8695_LAN_OFFSET)
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/*
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* LAN registers
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*/
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#define KS8695_LMDTXC (0x00) /* DMA Transmit Control */
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#define KS8695_LMDRXC (0x04) /* DMA Receive Control */
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#define KS8695_LMDTSC (0x08) /* DMA Transmit Start Command */
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#define KS8695_LMDRSC (0x0c) /* DMA Receive Start Command */
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#define KS8695_LTDLB (0x10) /* Transmit Descriptor List Base Address */
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#define KS8695_LRDLB (0x14) /* Receive Descriptor List Base Address */
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#define KS8695_LMAL (0x18) /* MAC Station Address Low */
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#define KS8695_LMAH (0x1c) /* MAC Station Address High */
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#define KS8695_LMAAL_(n) (0x80 + ((n)*8)) /* MAC Additional Station Address (0..15) Low */
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#define KS8695_LMAAH_(n) (0x84 + ((n)*8)) /* MAC Additional Station Address (0..15) High */
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/* DMA Transmit Control Register */
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#define LMDTXC_LMTRST (1 << 31) /* Soft Reset */
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#define LMDTXC_LMTBS (0x3f << 24) /* Transmit Burst Size */
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#define LMDTXC_LMTUCG (1 << 18) /* Transmit UDP Checksum Generate */
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#define LMDTXC_LMTTCG (1 << 17) /* Transmit TCP Checksum Generate */
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#define LMDTXC_LMTICG (1 << 16) /* Transmit IP Checksum Generate */
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#define LMDTXC_LMTFCE (1 << 9) /* Transmit Flow Control Enable */
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#define LMDTXC_LMTLB (1 << 8) /* Loopback mode */
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#define LMDTXC_LMTEP (1 << 2) /* Transmit Enable Padding */
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#define LMDTXC_LMTAC (1 << 1) /* Transmit Add CRC */
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#define LMDTXC_LMTE (1 << 0) /* TX Enable */
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/* DMA Receive Control Register */
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#define LMDRXC_LMRBS (0x3f << 24) /* Receive Burst Size */
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#define LMDRXC_LMRUCC (1 << 18) /* Receive UDP Checksum check */
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#define LMDRXC_LMRTCG (1 << 17) /* Receive TCP Checksum check */
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#define LMDRXC_LMRICG (1 << 16) /* Receive IP Checksum check */
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#define LMDRXC_LMRFCE (1 << 9) /* Receive Flow Control Enable */
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#define LMDRXC_LMRB (1 << 6) /* Receive Broadcast */
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#define LMDRXC_LMRM (1 << 5) /* Receive Multicast */
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#define LMDRXC_LMRU (1 << 4) /* Receive Unicast */
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#define LMDRXC_LMRERR (1 << 3) /* Receive Error Frame */
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#define LMDRXC_LMRA (1 << 2) /* Receive All */
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#define LMDRXC_LMRE (1 << 1) /* RX Enable */
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/* Additional Station Address High */
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#define LMAAH_E (1 << 31) /* Address Enabled */
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#endif
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