2005-09-26 02:04:21 -04:00
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#
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# Makefile for the linux kernel.
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#
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2005-09-29 23:51:25 -04:00
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ifeq ($(CONFIG_PPC64),y)
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EXTRA_CFLAGS += -mno-minimal-toc
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endif
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2005-09-30 02:16:52 -04:00
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ifeq ($(CONFIG_PPC32),y)
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2005-10-05 22:06:20 -04:00
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CFLAGS_prom_init.o += -fPIC
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2005-10-05 23:24:50 -04:00
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CFLAGS_btext.o += -fPIC
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2005-09-30 02:16:52 -04:00
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endif
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2005-10-05 22:06:20 -04:00
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2005-10-18 00:19:41 -04:00
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obj-y := semaphore.o cputable.o ptrace.o syscalls.o \
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2006-01-12 05:22:34 -05:00
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irq.o align.o signal_32.o pmc.o vdso.o \
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2007-06-04 01:15:49 -04:00
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init_task.o process.o systbl.o idle.o \
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signal.o
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2005-11-11 05:15:21 -05:00
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obj-y += vdso32/
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2005-10-27 06:20:42 -04:00
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obj-$(CONFIG_PPC64) += setup_64.o binfmt_elf32.o sys_ppc32.o \
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2006-02-10 00:02:20 -05:00
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signal_64.o ptrace32.o \
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2006-08-11 01:03:01 -04:00
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paca.o cpu_setup_ppc970.o \
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2007-02-04 17:36:51 -05:00
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cpu_setup_pa6t.o \
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2006-11-02 07:56:11 -05:00
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firmware.o sysfs.o nvram_64.o
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2005-11-11 05:15:21 -05:00
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obj-$(CONFIG_PPC64) += vdso64/
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2005-10-10 08:50:37 -04:00
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obj-$(CONFIG_ALTIVEC) += vecemu.o vector.o
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2006-04-18 07:49:11 -04:00
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obj-$(CONFIG_PPC_970_NAP) += idle_power4.o
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2006-11-11 01:24:59 -05:00
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obj-$(CONFIG_PPC_OF) += of_device.o of_platform.o prom_parse.o
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2007-09-20 10:00:11 -04:00
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obj-$(CONFIG_PPC_CLOCK) += clock.o
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2005-11-09 23:26:20 -05:00
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procfs-$(CONFIG_PPC64) := proc_ppc64.o
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obj-$(CONFIG_PROC_FS) += $(procfs-y)
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2007-03-04 01:04:44 -05:00
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rtaspci-$(CONFIG_PPC64)-$(CONFIG_PCI) := rtas_pci.o
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obj-$(CONFIG_PPC_RTAS) += rtas.o rtas-rtc.o $(rtaspci-y-y)
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2005-11-02 22:41:19 -05:00
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obj-$(CONFIG_RTAS_FLASH) += rtas_flash.o
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obj-$(CONFIG_RTAS_PROC) += rtas-proc.o
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2005-11-09 23:26:20 -05:00
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obj-$(CONFIG_LPARCFG) += lparcfg.o
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2005-10-24 00:22:37 -04:00
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obj-$(CONFIG_IBMVIO) += vio.o
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2005-11-16 02:56:43 -05:00
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obj-$(CONFIG_IBMEBUS) += ibmebus.o
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2005-11-03 21:28:58 -05:00
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obj-$(CONFIG_GENERIC_TBSYNC) += smp-tbsync.o
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2005-12-04 02:39:37 -05:00
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obj-$(CONFIG_CRASH_DUMP) += crash_dump.o
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2006-03-27 03:15:26 -05:00
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obj-$(CONFIG_6xx) += idle_6xx.o l2cr_6xx.o cpu_setup_6xx.o
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obj-$(CONFIG_TAU) += tau_6xx.o
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2007-09-20 20:16:20 -04:00
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obj-$(CONFIG_HIBERNATION) += swsusp.o suspend.o \
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swsusp_$(CONFIG_WORD_SIZE).o
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obj64-$(CONFIG_HIBERNATION) += swsusp_asm64.o
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obj-$(CONFIG_MODULES) += module_$(CONFIG_WORD_SIZE).o
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2007-10-03 21:02:09 -04:00
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obj-$(CONFIG_44x) += cpu_setup_44x.o
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2005-10-10 08:50:37 -04:00
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ifeq ($(CONFIG_PPC_MERGE),y)
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2005-10-10 07:52:43 -04:00
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extra-$(CONFIG_PPC_STD_MMU) := head_32.o
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2005-09-30 02:16:52 -04:00
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extra-$(CONFIG_PPC64) := head_64.o
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2007-08-20 08:27:07 -04:00
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extra-$(CONFIG_40x) := head_40x.o
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2005-09-26 02:04:21 -04:00
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extra-$(CONFIG_44x) := head_44x.o
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extra-$(CONFIG_FSL_BOOKE) := head_fsl_booke.o
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extra-$(CONFIG_8xx) := head_8xx.o
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extra-y += vmlinux.lds
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2006-06-27 21:55:49 -04:00
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obj-y += time.o prom.o traps.o setup-common.o \
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2007-09-20 20:16:20 -04:00
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udbg.o misc.o io.o \
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misc_$(CONFIG_WORD_SIZE).o
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obj-$(CONFIG_PPC32) += entry_32.o setup_32.o
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obj-$(CONFIG_PPC64) += dma_64.o iommu.o
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2006-01-09 05:32:42 -05:00
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obj-$(CONFIG_PPC_MULTIPLATFORM) += prom_init.o
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2005-09-28 06:28:14 -04:00
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obj-$(CONFIG_MODULES) += ppc_ksyms.o
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2005-10-05 22:06:20 -04:00
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obj-$(CONFIG_BOOTX_TEXT) += btext.o
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2005-11-04 18:33:55 -05:00
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obj-$(CONFIG_SMP) += smp.o
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2005-11-14 01:30:17 -05:00
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obj-$(CONFIG_KPROBES) += kprobes.o
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2006-01-10 00:19:05 -05:00
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obj-$(CONFIG_PPC_UDBG_16550) += legacy_serial.o udbg_16550.o
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2006-11-11 01:24:53 -05:00
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2007-09-20 20:16:20 -04:00
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pci64-$(CONFIG_PPC64) += pci_dn.o isa-bridge.o
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obj-$(CONFIG_PCI) += pci_$(CONFIG_WORD_SIZE).o $(pci64-y) \
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pci-common.o
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2007-05-07 22:58:34 -04:00
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obj-$(CONFIG_PCI_MSI) += msi.o
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2007-09-20 20:16:20 -04:00
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obj-$(CONFIG_KEXEC) += machine_kexec.o crash.o \
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machine_kexec_$(CONFIG_WORD_SIZE).o
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2006-08-31 19:02:42 -04:00
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obj-$(CONFIG_AUDIT) += audit.o
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obj64-$(CONFIG_AUDIT) += compat_audit.o
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2005-09-30 02:16:52 -04:00
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2007-09-18 16:29:35 -04:00
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obj-$(CONFIG_8XX_MINIMAL_FPEMU) += softemu8xx.o
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[POWERPC] Allow hooking of PCI MMIO & PIO accessors on 64 bits
This patch reworks the way iSeries hooks on PCI IO operations (both MMIO
and PIO) and provides a generic way for other platforms to do so (we
have need to do that for various other platforms).
While reworking the IO ops, I ended up doing some spring cleaning in
io.h and eeh.h which I might want to split into 2 or 3 patches (among
others, eeh.h had a lot of useless stuff in it).
A side effect is that EEH for PIO should work now (it used to pass IO
ports down to the eeh address check functions which is bogus).
Also, new are MMIO "repeat" ops, which other archs like ARM already had,
and that we have too now: readsb, readsw, readsl, writesb, writesw,
writesl.
In the long run, I might also make EEH use the hooks instead
of wrapping at the toplevel, which would make things even cleaner and
relegate EEH completely in platforms/iseries, but we have to measure the
performance impact there (though it's really only on MMIO reads)
Since I also need to hook on ioremap, I shuffled the functions a bit
there. I introduced ioremap_flags() to use by drivers who want to pass
explicit flags to ioremap (and it can be hooked). The old __ioremap() is
still there as a low level and cannot be hooked, thus drivers who use it
should migrate unless they know they want the low level version.
The patch "arch provides generic iomap missing accessors" (should be
number 4 in this series) is a pre-requisite to provide full iomap
API support with this patch.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-11-11 01:25:10 -05:00
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ifneq ($(CONFIG_PPC_INDIRECT_IO),y)
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2006-11-12 17:27:39 -05:00
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obj-y += iomap.o
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[POWERPC] Allow hooking of PCI MMIO & PIO accessors on 64 bits
This patch reworks the way iSeries hooks on PCI IO operations (both MMIO
and PIO) and provides a generic way for other platforms to do so (we
have need to do that for various other platforms).
While reworking the IO ops, I ended up doing some spring cleaning in
io.h and eeh.h which I might want to split into 2 or 3 patches (among
others, eeh.h had a lot of useless stuff in it).
A side effect is that EEH for PIO should work now (it used to pass IO
ports down to the eeh address check functions which is bogus).
Also, new are MMIO "repeat" ops, which other archs like ARM already had,
and that we have too now: readsb, readsw, readsl, writesb, writesw,
writesl.
In the long run, I might also make EEH use the hooks instead
of wrapping at the toplevel, which would make things even cleaner and
relegate EEH completely in platforms/iseries, but we have to measure the
performance impact there (though it's really only on MMIO reads)
Since I also need to hook on ioremap, I shuffled the functions a bit
there. I introduced ioremap_flags() to use by drivers who want to pass
explicit flags to ioremap (and it can be hooked). The old __ioremap() is
still there as a low level and cannot be hooked, thus drivers who use it
should migrate unless they know they want the low level version.
The patch "arch provides generic iomap missing accessors" (should be
number 4 in this series) is a pre-requisite to provide full iomap
API support with this patch.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-11-11 01:25:10 -05:00
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endif
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2005-10-11 08:08:12 -04:00
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else
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2005-11-14 01:30:17 -05:00
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# stuff used from here for ARCH=ppc
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2005-11-04 18:33:55 -05:00
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smpobj-$(CONFIG_SMP) += smp.o
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2005-10-11 08:08:12 -04:00
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2005-09-30 02:16:52 -04:00
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endif
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[PATCH] powerpc: Fix handling of fpscr on 64-bit
The recent merge of fpu.S broken the handling of fpscr for
ARCH=powerpc and CONFIG_PPC64=y. FP registers could be corrupted,
leading to strange random application crashes.
The confusion arises, because the thread_struct has (and requires) a
64-bit area to save the fpscr, because we use load/store double
instructions to get it in to/out of the FPU. However, only the low
32-bits are actually used, so we want to treat it as a 32-bit quantity
when manipulating its bits to avoid extra load/stores on 32-bit. This
patch replaces the current definition with a structure of two 32-bit
quantities (pad and val), to clarify things as much as is possible.
The 'val' field is used when manipulating bits, the structure itself
is used when obtaining the address for loading/unloading the value
from the FPU.
While we're at it, consolidate the 4 (!) almost identical versions of
cvt_fd() and cvt_df() (arch/ppc/kernel/misc.S,
arch/ppc64/kernel/misc.S, arch/powerpc/kernel/misc_32.S,
arch/powerpc/kernel/misc_64.S) into a single version in fpu.S. The
new version takes a pointer to thread_struct and applies the correct
offset itself, rather than a pointer to the fpscr field itself, again
to avoid confusion as to which is the correct field to use.
Finally, this patch makes ARCH=ppc64 also use the consolidated fpu.S
code, which it previously did not.
Built for G5 (ARCH=ppc64 and ARCH=powerpc), 32-bit powermac (ARCH=ppc
and ARCH=powerpc) and Walnut (ARCH=ppc, CONFIG_MATH_EMULATION=y).
Booted on G5 (ARCH=powerpc) and things which previously fell over no
longer do.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-10-27 02:27:25 -04:00
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2005-11-17 23:43:34 -05:00
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obj-$(CONFIG_PPC64) += $(obj64-y)
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[PATCH] powerpc: Fix handling of fpscr on 64-bit
The recent merge of fpu.S broken the handling of fpscr for
ARCH=powerpc and CONFIG_PPC64=y. FP registers could be corrupted,
leading to strange random application crashes.
The confusion arises, because the thread_struct has (and requires) a
64-bit area to save the fpscr, because we use load/store double
instructions to get it in to/out of the FPU. However, only the low
32-bits are actually used, so we want to treat it as a 32-bit quantity
when manipulating its bits to avoid extra load/stores on 32-bit. This
patch replaces the current definition with a structure of two 32-bit
quantities (pad and val), to clarify things as much as is possible.
The 'val' field is used when manipulating bits, the structure itself
is used when obtaining the address for loading/unloading the value
from the FPU.
While we're at it, consolidate the 4 (!) almost identical versions of
cvt_fd() and cvt_df() (arch/ppc/kernel/misc.S,
arch/ppc64/kernel/misc.S, arch/powerpc/kernel/misc_32.S,
arch/powerpc/kernel/misc_64.S) into a single version in fpu.S. The
new version takes a pointer to thread_struct and applies the correct
offset itself, rather than a pointer to the fpscr field itself, again
to avoid confusion as to which is the correct field to use.
Finally, this patch makes ARCH=ppc64 also use the consolidated fpu.S
code, which it previously did not.
Built for G5 (ARCH=ppc64 and ARCH=powerpc), 32-bit powermac (ARCH=ppc
and ARCH=powerpc) and Walnut (ARCH=ppc, CONFIG_MATH_EMULATION=y).
Booted on G5 (ARCH=powerpc) and things which previously fell over no
longer do.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-10-27 02:27:25 -04:00
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extra-$(CONFIG_PPC_FPU) += fpu.o
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2005-10-27 22:51:45 -04:00
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extra-$(CONFIG_PPC64) += entry_64.o
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