615 lines
22 KiB
C
615 lines
22 KiB
C
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/*******************************************************************************
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*
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* (c) 1999 by Computone Corporation
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*
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********************************************************************************
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*
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*
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* PACKAGE: Linux tty Device Driver for IntelliPort II family of multiport
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* serial I/O controllers.
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*
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* DESCRIPTION: Mainline code for the device driver
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*
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*******************************************************************************/
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//------------------------------------------------------------------------------
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// i2ellis.h
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//
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// IntelliPort-II and IntelliPort-IIEX
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//
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// Extremely
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// Low
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// Level
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// Interface
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// Services
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//
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// Structure Definitions and declarations for "ELLIS" service routines found in
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// i2ellis.c
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//
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// These routines are based on properties of the IntelliPort-II and -IIEX
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// hardware and bootstrap firmware, and are not sensitive to particular
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// conventions of any particular loadware.
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//
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// Unlike i2hw.h, which provides IRONCLAD hardware definitions, the material
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// here and in i2ellis.c is intended to provice a useful, but not required,
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// layer of insulation from the hardware specifics.
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//------------------------------------------------------------------------------
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#ifndef I2ELLIS_H /* To prevent multiple includes */
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#define I2ELLIS_H 1
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//------------------------------------------------
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// Revision History:
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//
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// 30 September 1991 MAG First Draft Started
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// 12 October 1991 ...continued...
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//
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// 20 December 1996 AKM Linux version
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//-------------------------------------------------
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//----------------------
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// Mandatory Includes:
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//----------------------
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#include "ip2types.h"
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#include "i2hw.h" // The hardware definitions
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//------------------------------------------
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// STAT_BOXIDS packets
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//------------------------------------------
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#define MAX_BOX 4
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typedef struct _bidStat
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{
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unsigned char bid_value[MAX_BOX];
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} bidStat, *bidStatPtr;
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// This packet is sent in response to a CMD_GET_BOXIDS bypass command. For -IIEX
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// boards, reports the hardware-specific "asynchronous resource register" on
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// each expansion box. Boxes not present report 0xff. For -II boards, the first
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// element contains 0x80 for 8-port, 0x40 for 4-port boards.
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// Box IDs aka ARR or Async Resource Register (more than you want to know)
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// 7 6 5 4 3 2 1 0
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// F F N N L S S S
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// =============================
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// F F - Product Family Designator
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// =====+++++++++++++++++++++++++++++++
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// 0 0 - Intelliport II EX / ISA-8
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// 1 0 - IntelliServer
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// 0 1 - SAC - Port Device (Intelliport III ??? )
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// =====+++++++++++++++++++++++++++++++++++++++
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// N N - Number of Ports
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// 0 0 - 8 (eight)
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// 0 1 - 4 (four)
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// 1 0 - 12 (twelve)
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// 1 1 - 16 (sixteen)
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// =++++++++++++++++++++++++++++++++++
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// L - LCD Display Module Present
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// 0 - No
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// 1 - LCD module present
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// =========+++++++++++++++++++++++++++++++++++++
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// S S S - Async Signals Supported Designator
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// 0 0 0 - 8dss, Mod DCE DB25 Female
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// 0 0 1 - 6dss, RJ-45
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// 0 1 0 - RS-232/422 dss, DB25 Female
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// 0 1 1 - RS-232/422 dss, separate 232/422 DB25 Female
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// 1 0 0 - 6dss, 921.6 I/F with ST654's
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// 1 0 1 - RS-423/232 8dss, RJ-45 10Pin
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// 1 1 0 - 6dss, Mod DCE DB25 Female
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// 1 1 1 - NO BOX PRESENT
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#define FF(c) ((c & 0xC0) >> 6)
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#define NN(c) ((c & 0x30) >> 4)
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#define L(c) ((c & 0x08) >> 3)
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#define SSS(c) (c & 0x07)
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#define BID_HAS_654(x) (SSS(x) == 0x04)
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#define BID_NO_BOX 0xff /* no box */
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#define BID_8PORT 0x80 /* IP2-8 port */
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#define BID_4PORT 0x81 /* IP2-4 port */
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#define BID_EXP_MASK 0x30 /* IP2-EX */
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#define BID_EXP_8PORT 0x00 /* 8, */
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#define BID_EXP_4PORT 0x10 /* 4, */
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#define BID_EXP_UNDEF 0x20 /* UNDEF, */
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#define BID_EXP_16PORT 0x30 /* 16, */
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#define BID_LCD_CTRL 0x08 /* LCD Controller */
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#define BID_LCD_NONE 0x00 /* - no controller present */
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#define BID_LCD_PRES 0x08 /* - controller present */
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#define BID_CON_MASK 0x07 /* - connector pinouts */
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#define BID_CON_DB25 0x00 /* - DB-25 F */
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#define BID_CON_RJ45 0x01 /* - rj45 */
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//------------------------------------------------------------------------------
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// i2eBordStr
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//
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// This structure contains all the information the ELLIS routines require in
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// dealing with a particular board.
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//------------------------------------------------------------------------------
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// There are some queues here which are guaranteed to never contain the entry
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// for a single channel twice. So they must be slightly larger to allow
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// unambiguous full/empty management
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//
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#define CH_QUEUE_SIZE ABS_MOST_PORTS+2
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typedef struct _i2eBordStr
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{
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porStr i2ePom; // Structure containing the power-on message.
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unsigned short i2ePomSize;
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// The number of bytes actually read if
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// different from sizeof i2ePom, indicates
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// there is an error!
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unsigned short i2eStartMail;
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// Contains whatever inbound mailbox data
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// present at startup. NO_MAIL_HERE indicates
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// nothing was present. No special
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// significance as of this writing, but may be
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// useful for diagnostic reasons.
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unsigned short i2eValid;
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// Indicates validity of the structure; if
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// i2eValid == I2E_MAGIC, then we can trust
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// the other fields. Some (especially
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// initialization) functions are good about
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// checking for validity. Many functions do
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// not, it being assumed that the larger
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// context assures we are using a valid
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// i2eBordStrPtr.
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unsigned short i2eError;
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// Used for returning an error condition from
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// several functions which use i2eBordStrPtr
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// as an argument.
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// Accelerators to characterize separate features of a board, derived from a
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// number of sources.
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unsigned short i2eFifoSize;
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// Always, the size of the FIFO. For
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// IntelliPort-II, always the same, for -IIEX
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// taken from the Power-On reset message.
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volatile
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unsigned short i2eFifoRemains;
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// Used during normal operation to indicate a
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// lower bound on the amount of data which
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// might be in the outbound fifo.
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unsigned char i2eFifoStyle;
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// Accelerator which tells which style (-II or
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// -IIEX) FIFO we are using.
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unsigned char i2eDataWidth16;
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// Accelerator which tells whether we should
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// do 8 or 16-bit data transfers.
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unsigned char i2eMaxIrq;
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// The highest allowable IRQ, based on the
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// slot size.
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unsigned char i2eChangeIrq;
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// Whether tis valid to change IRQ's
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// ISA = ok, EISA, MicroChannel, no
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// Accelerators for various addresses on the board
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int i2eBase; // I/O Address of the Board
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int i2eData; // From here data transfers happen
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int i2eStatus; // From here status reads happen
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int i2ePointer; // (IntelliPort-II: pointer/commands)
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int i2eXMail; // (IntelliPOrt-IIEX: mailboxes
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int i2eXMask; // (IntelliPort-IIEX: mask write
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//-------------------------------------------------------
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// Information presented in a common format across boards
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// For each box, bit map of the channels present. Box closest to
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// the host is box 0. LSB is channel 0. IntelliPort-II (non-expandable)
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// is taken to be box 0. These are derived from product i.d. registers.
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unsigned short i2eChannelMap[ABS_MAX_BOXES];
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// Same as above, except each is derived from firmware attempting to detect
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// the uart presence (by reading a valid GFRCR register). If bits are set in
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// i2eChannelMap and not in i2eGoodMap, there is a potential problem.
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unsigned short i2eGoodMap[ABS_MAX_BOXES];
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// ---------------------------
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// For indirect function calls
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// Routine to cause an N-millisecond delay: Patched by the ii2Initialize
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// function.
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void (*i2eDelay)(unsigned int);
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// Routine to write N bytes to the board through the FIFO. Returns true if
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// all copacetic, otherwise returns false and error is in i2eError field.
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// IF COUNT IS ODD, ROUNDS UP TO THE NEXT EVEN NUMBER.
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int (*i2eWriteBuf)(struct _i2eBordStr *, unsigned char *, int);
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// Routine to read N bytes from the board through the FIFO. Returns true if
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// copacetic, otherwise returns false and error in i2eError.
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// IF COUNT IS ODD, ROUNDS UP TO THE NEXT EVEN NUMBER.
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int (*i2eReadBuf)(struct _i2eBordStr *, unsigned char *, int);
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// Returns a word from FIFO. Will use 2 byte operations if needed.
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unsigned short (*i2eReadWord)(struct _i2eBordStr *);
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// Writes a word to FIFO. Will use 2 byte operations if needed.
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void (*i2eWriteWord)(struct _i2eBordStr *, unsigned short);
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// Waits specified time for the Transmit FIFO to go empty. Returns true if
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// ok, otherwise returns false and error in i2eError.
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int (*i2eWaitForTxEmpty)(struct _i2eBordStr *, int);
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// Returns true or false according to whether the outgoing mailbox is empty.
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int (*i2eTxMailEmpty)(struct _i2eBordStr *);
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// Checks whether outgoing mailbox is empty. If so, sends mail and returns
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// true. Otherwise returns false.
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int (*i2eTrySendMail)(struct _i2eBordStr *, unsigned char);
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// If no mail available, returns NO_MAIL_HERE, else returns the value in the
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// mailbox (guaranteed can't be NO_MAIL_HERE).
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unsigned short (*i2eGetMail)(struct _i2eBordStr *);
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// Enables the board to interrupt the host when it writes to the mailbox.
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// Irqs will not occur, however, until the loadware separately enables
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// interrupt generation to the host. The standard loadware does this in
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// response to a command packet sent by the host. (Also, disables
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// any other potential interrupt sources from the board -- other than the
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// inbound mailbox).
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void (*i2eEnableMailIrq)(struct _i2eBordStr *);
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// Writes an arbitrary value to the mask register.
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void (*i2eWriteMask)(struct _i2eBordStr *, unsigned char);
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// State information
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// During downloading, indicates the number of blocks remaining to download
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// to the board.
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short i2eToLoad;
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// State of board (see manifests below) (e.g., whether in reset condition,
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// whether standard loadware is installed, etc.
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unsigned char i2eState;
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// These three fields are only valid when there is loadware running on the
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// board. (i2eState == II_STATE_LOADED or i2eState == II_STATE_STDLOADED )
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unsigned char i2eLVersion; // Loadware version
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unsigned char i2eLRevision; // Loadware revision
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unsigned char i2eLSub; // Loadware subrevision
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// Flags which only have meaning in the context of the standard loadware.
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// Somewhat violates the layering concept, but there is so little additional
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// needed at the board level (while much additional at the channel level),
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// that this beats maintaining two different per-board structures.
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// Indicates which IRQ the board has been initialized (from software) to use
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// For MicroChannel boards, any value different from IRQ_UNDEFINED means
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// that the software command has been sent to enable interrupts (or specify
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// they are disabled). Special value: IRQ_UNDEFINED indicates that the
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// software command to select the interrupt has not yet been sent, therefore
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// (since the standard loadware insists that it be sent before any other
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// packets are sent) no other packets should be sent yet.
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unsigned short i2eUsingIrq;
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// This is set when we hit the MB_OUT_STUFFED mailbox, which prevents us
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// putting more in the mailbox until an appropriate mailbox message is
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// received.
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unsigned char i2eWaitingForEmptyFifo;
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// Any mailbox bits waiting to be sent to the board are OR'ed in here.
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unsigned char i2eOutMailWaiting;
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// The head of any incoming packet is read into here, is then examined and
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// we dispatch accordingly.
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unsigned short i2eLeadoffWord[1];
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// Running counter of interrupts where the mailbox indicated incoming data.
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unsigned short i2eFifoInInts;
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// Running counter of interrupts where the mailbox indicated outgoing data
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// had been stripped.
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unsigned short i2eFifoOutInts;
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// If not void, gives the address of a routine to call if fatal board error
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// is found (only applies to standard l/w).
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void (*i2eFatalTrap)(struct _i2eBordStr *);
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// Will point to an array of some sort of channel structures (whose format
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// is unknown at this level, being a function of what loadware is
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// installed and the code configuration (max sizes of buffers, etc.)).
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void *i2eChannelPtr;
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// Set indicates that the board has gone fatal.
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unsigned short i2eFatal;
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// The number of elements pointed to by i2eChannelPtr.
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unsigned short i2eChannelCnt;
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// Ring-buffers of channel structures whose channels have particular needs.
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rwlock_t Fbuf_spinlock;
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volatile
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unsigned short i2Fbuf_strip; // Strip index
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volatile
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unsigned short i2Fbuf_stuff; // Stuff index
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void *i2Fbuf[CH_QUEUE_SIZE]; // An array of channel pointers
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// of channels who need to send
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// flow control packets.
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rwlock_t Dbuf_spinlock;
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volatile
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unsigned short i2Dbuf_strip; // Strip index
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volatile
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unsigned short i2Dbuf_stuff; // Stuff index
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void *i2Dbuf[CH_QUEUE_SIZE]; // An array of channel pointers
|
||
|
|
// of channels who need to send
|
||
|
|
// data or in-line command packets.
|
||
|
|
rwlock_t Bbuf_spinlock;
|
||
|
|
volatile
|
||
|
|
unsigned short i2Bbuf_strip; // Strip index
|
||
|
|
volatile
|
||
|
|
unsigned short i2Bbuf_stuff; // Stuff index
|
||
|
|
void *i2Bbuf[CH_QUEUE_SIZE]; // An array of channel pointers
|
||
|
|
// of channels who need to send
|
||
|
|
// bypass command packets.
|
||
|
|
|
||
|
|
/*
|
||
|
|
* A set of flags to indicate that certain events have occurred on at least
|
||
|
|
* one of the ports on this board. We use this to decide whether to spin
|
||
|
|
* through the channels looking for breaks, etc.
|
||
|
|
*/
|
||
|
|
int got_input;
|
||
|
|
int status_change;
|
||
|
|
bidStat channelBtypes;
|
||
|
|
|
||
|
|
/*
|
||
|
|
* Debugging counters, etc.
|
||
|
|
*/
|
||
|
|
unsigned long debugFlowQueued;
|
||
|
|
unsigned long debugInlineQueued;
|
||
|
|
unsigned long debugDataQueued;
|
||
|
|
unsigned long debugBypassQueued;
|
||
|
|
unsigned long debugFlowCount;
|
||
|
|
unsigned long debugInlineCount;
|
||
|
|
unsigned long debugBypassCount;
|
||
|
|
|
||
|
|
rwlock_t read_fifo_spinlock;
|
||
|
|
rwlock_t write_fifo_spinlock;
|
||
|
|
|
||
|
|
// For queuing interrupt bottom half handlers. /\/\|=mhw=|\/\/
|
||
|
|
struct work_struct tqueue_interrupt;
|
||
|
|
|
||
|
|
struct timer_list SendPendingTimer; // Used by iiSendPending
|
||
|
|
unsigned int SendPendingRetry;
|
||
|
|
} i2eBordStr, *i2eBordStrPtr;
|
||
|
|
|
||
|
|
//-------------------------------------------------------------------
|
||
|
|
// Macro Definitions for the indirect calls defined in the i2eBordStr
|
||
|
|
//-------------------------------------------------------------------
|
||
|
|
//
|
||
|
|
#define iiDelay(a,b) (*(a)->i2eDelay)(b)
|
||
|
|
#define iiWriteBuf(a,b,c) (*(a)->i2eWriteBuf)(a,b,c)
|
||
|
|
#define iiReadBuf(a,b,c) (*(a)->i2eReadBuf)(a,b,c)
|
||
|
|
|
||
|
|
#define iiWriteWord(a,b) (*(a)->i2eWriteWord)(a,b)
|
||
|
|
#define iiReadWord(a) (*(a)->i2eReadWord)(a)
|
||
|
|
|
||
|
|
#define iiWaitForTxEmpty(a,b) (*(a)->i2eWaitForTxEmpty)(a,b)
|
||
|
|
|
||
|
|
#define iiTxMailEmpty(a) (*(a)->i2eTxMailEmpty)(a)
|
||
|
|
#define iiTrySendMail(a,b) (*(a)->i2eTrySendMail)(a,b)
|
||
|
|
|
||
|
|
#define iiGetMail(a) (*(a)->i2eGetMail)(a)
|
||
|
|
#define iiEnableMailIrq(a) (*(a)->i2eEnableMailIrq)(a)
|
||
|
|
#define iiDisableMailIrq(a) (*(a)->i2eWriteMask)(a,0)
|
||
|
|
#define iiWriteMask(a,b) (*(a)->i2eWriteMask)(a,b)
|
||
|
|
|
||
|
|
//-------------------------------------------
|
||
|
|
// Manifests for i2eBordStr:
|
||
|
|
//-------------------------------------------
|
||
|
|
|
||
|
|
#define YES 1
|
||
|
|
#define NO 0
|
||
|
|
|
||
|
|
#define NULLFUNC (void (*)(void))0
|
||
|
|
#define NULLPTR (void *)0
|
||
|
|
|
||
|
|
typedef void (*delayFunc_t)(unsigned int);
|
||
|
|
|
||
|
|
// i2eValid
|
||
|
|
//
|
||
|
|
#define I2E_MAGIC 0x4251 // Structure is valid.
|
||
|
|
#define I2E_INCOMPLETE 0x1122 // Structure failed during init.
|
||
|
|
|
||
|
|
|
||
|
|
// i2eError
|
||
|
|
//
|
||
|
|
#define I2EE_GOOD 0 // Operation successful
|
||
|
|
#define I2EE_BADADDR 1 // Address out of range
|
||
|
|
#define I2EE_BADSTATE 2 // Attempt to perform a function when the board
|
||
|
|
// structure was in the incorrect state
|
||
|
|
#define I2EE_BADMAGIC 3 // Bad magic number from Power On test (i2ePomSize
|
||
|
|
// reflects what was read
|
||
|
|
#define I2EE_PORM_SHORT 4 // Power On message too short
|
||
|
|
#define I2EE_PORM_LONG 5 // Power On message too long
|
||
|
|
#define I2EE_BAD_FAMILY 6 // Un-supported board family type
|
||
|
|
#define I2EE_INCONSIST 7 // Firmware reports something impossible,
|
||
|
|
// e.g. unexpected number of ports... Almost no
|
||
|
|
// excuse other than bad FIFO...
|
||
|
|
#define I2EE_POSTERR 8 // Power-On self test reported a bad error
|
||
|
|
#define I2EE_BADBUS 9 // Unknown Bus type declared in message
|
||
|
|
#define I2EE_TXE_TIME 10 // Timed out waiting for TX Fifo to empty
|
||
|
|
#define I2EE_INVALID 11 // i2eValid field does not indicate a valid and
|
||
|
|
// complete board structure (for functions which
|
||
|
|
// require this be so.)
|
||
|
|
#define I2EE_BAD_PORT 12 // Discrepancy between channels actually found and
|
||
|
|
// what the product is supposed to have. Check
|
||
|
|
// i2eGoodMap vs i2eChannelMap for details.
|
||
|
|
#define I2EE_BAD_IRQ 13 // Someone specified an unsupported IRQ
|
||
|
|
#define I2EE_NOCHANNELS 14 // No channel structures have been defined (for
|
||
|
|
// functions requiring this).
|
||
|
|
|
||
|
|
// i2eFifoStyle
|
||
|
|
//
|
||
|
|
#define FIFO_II 0 /* IntelliPort-II style: see also i2hw.h */
|
||
|
|
#define FIFO_IIEX 1 /* IntelliPort-IIEX style */
|
||
|
|
|
||
|
|
// i2eGetMail
|
||
|
|
//
|
||
|
|
#define NO_MAIL_HERE 0x1111 // Since mail is unsigned char, cannot possibly
|
||
|
|
// promote to 0x1111.
|
||
|
|
// i2eState
|
||
|
|
//
|
||
|
|
#define II_STATE_COLD 0 // Addresses have been defined, but board not even
|
||
|
|
// reset yet.
|
||
|
|
#define II_STATE_RESET 1 // Board,if it exists, has just been reset
|
||
|
|
#define II_STATE_READY 2 // Board ready for its first block
|
||
|
|
#define II_STATE_LOADING 3 // Board continuing load
|
||
|
|
#define II_STATE_LOADED 4 // Board has finished load: status ok
|
||
|
|
#define II_STATE_BADLOAD 5 // Board has finished load: failed!
|
||
|
|
#define II_STATE_STDLOADED 6 // Board has finished load: standard firmware
|
||
|
|
|
||
|
|
// i2eUsingIrq
|
||
|
|
//
|
||
|
|
#define IRQ_UNDEFINED 0x1352 // No valid irq (or polling = 0) can ever
|
||
|
|
// promote to this!
|
||
|
|
//------------------------------------------
|
||
|
|
// Handy Macros for i2ellis.c and others
|
||
|
|
// Note these are common to -II and -IIEX
|
||
|
|
//------------------------------------------
|
||
|
|
|
||
|
|
// Given a pointer to the board structure, does the input FIFO have any data or
|
||
|
|
// not?
|
||
|
|
//
|
||
|
|
#define HAS_INPUT(pB) !(INB(pB->i2eStatus) & ST_IN_EMPTY)
|
||
|
|
#define HAS_NO_INPUT(pB) (INB(pB->i2eStatus) & ST_IN_EMPTY)
|
||
|
|
|
||
|
|
// Given a pointer to board structure, read a byte or word from the fifo
|
||
|
|
//
|
||
|
|
#define BYTE_FROM(pB) (unsigned char)INB(pB->i2eData)
|
||
|
|
#define WORD_FROM(pB) (unsigned short)INW(pB->i2eData)
|
||
|
|
|
||
|
|
// Given a pointer to board structure, is there room for any data to be written
|
||
|
|
// to the data fifo?
|
||
|
|
//
|
||
|
|
#define HAS_OUTROOM(pB) !(INB(pB->i2eStatus) & ST_OUT_FULL)
|
||
|
|
#define HAS_NO_OUTROOM(pB) (INB(pB->i2eStatus) & ST_OUT_FULL)
|
||
|
|
|
||
|
|
// Given a pointer to board structure, write a single byte to the fifo
|
||
|
|
// structure. Note that for 16-bit interfaces, the high order byte is undefined
|
||
|
|
// and unknown.
|
||
|
|
//
|
||
|
|
#define BYTE_TO(pB, c) OUTB(pB->i2eData,(c))
|
||
|
|
|
||
|
|
// Write a word to the fifo structure. For 8-bit interfaces, this may have
|
||
|
|
// unknown results.
|
||
|
|
//
|
||
|
|
#define WORD_TO(pB, c) OUTW(pB->i2eData,(c))
|
||
|
|
|
||
|
|
// Given a pointer to the board structure, is there anything in the incoming
|
||
|
|
// mailbox?
|
||
|
|
//
|
||
|
|
#define HAS_MAIL(pB) (INB(pB->i2eStatus) & ST_IN_MAIL)
|
||
|
|
|
||
|
|
#define UPDATE_FIFO_ROOM(pB) (pB)->i2eFifoRemains=(pB)->i2eFifoSize
|
||
|
|
|
||
|
|
// Handy macro to round up a number (like the buffer write and read routines do)
|
||
|
|
//
|
||
|
|
#define ROUNDUP(number) (((number)+1) & (~1))
|
||
|
|
|
||
|
|
//------------------------------------------
|
||
|
|
// Function Declarations for i2ellis.c
|
||
|
|
//------------------------------------------
|
||
|
|
//
|
||
|
|
// Functions called directly
|
||
|
|
//
|
||
|
|
// Initialization of a board & structure is in four (five!) parts:
|
||
|
|
//
|
||
|
|
// 0) iiEllisInit() - Initialize iiEllis subsystem.
|
||
|
|
// 1) iiSetAddress() - Define the board address & delay function for a board.
|
||
|
|
// 2) iiReset() - Reset the board (provided it exists)
|
||
|
|
// -- Note you may do this to several boards --
|
||
|
|
// 3) iiResetDelay() - Delay for 2 seconds (once for all boards)
|
||
|
|
// 4) iiInitialize() - Attempt to read Power-up message; further initialize
|
||
|
|
// accelerators
|
||
|
|
//
|
||
|
|
// Then you may use iiDownloadAll() or iiDownloadFile() (in i2file.c) to write
|
||
|
|
// loadware. To change loadware, you must begin again with step 2, resetting
|
||
|
|
// the board again (step 1 not needed).
|
||
|
|
|
||
|
|
static void iiEllisInit(void);
|
||
|
|
static int iiSetAddress(i2eBordStrPtr, int, delayFunc_t );
|
||
|
|
static int iiReset(i2eBordStrPtr);
|
||
|
|
static int iiResetDelay(i2eBordStrPtr);
|
||
|
|
static int iiInitialize(i2eBordStrPtr);
|
||
|
|
|
||
|
|
// Routine to validate that all channels expected are there.
|
||
|
|
//
|
||
|
|
extern int iiValidateChannels(i2eBordStrPtr);
|
||
|
|
|
||
|
|
// Routine used to download a block of loadware.
|
||
|
|
//
|
||
|
|
static int iiDownloadBlock(i2eBordStrPtr, loadHdrStrPtr, int);
|
||
|
|
|
||
|
|
// Return values given by iiDownloadBlock, iiDownloadAll, iiDownloadFile:
|
||
|
|
//
|
||
|
|
#define II_DOWN_BADVALID 0 // board structure is invalid
|
||
|
|
#define II_DOWN_CONTINUING 1 // So far, so good, firmware expects more
|
||
|
|
#define II_DOWN_GOOD 2 // Download complete, CRC good
|
||
|
|
#define II_DOWN_BAD 3 // Download complete, but CRC bad
|
||
|
|
#define II_DOWN_BADFILE 4 // Bad magic number in loadware file
|
||
|
|
#define II_DOWN_BADSTATE 5 // Board is in an inappropriate state for
|
||
|
|
// downloading loadware. (see i2eState)
|
||
|
|
#define II_DOWN_TIMEOUT 6 // Timeout waiting for firmware
|
||
|
|
#define II_DOWN_OVER 7 // Too much data
|
||
|
|
#define II_DOWN_UNDER 8 // Not enough data
|
||
|
|
#define II_DOWN_NOFILE 9 // Loadware file not found
|
||
|
|
|
||
|
|
// Routine to download an entire loadware module: Return values are a subset of
|
||
|
|
// iiDownloadBlock's, excluding, of course, II_DOWN_CONTINUING
|
||
|
|
//
|
||
|
|
static int iiDownloadAll(i2eBordStrPtr, loadHdrStrPtr, int, int);
|
||
|
|
|
||
|
|
// Called indirectly always. Needed externally so the routine might be
|
||
|
|
// SPECIFIED as an argument to iiReset()
|
||
|
|
//
|
||
|
|
//static void ii2DelayIO(unsigned int); // N-millisecond delay using
|
||
|
|
//hardware spin
|
||
|
|
//static void ii2DelayTimer(unsigned int); // N-millisecond delay using Linux
|
||
|
|
//timer
|
||
|
|
|
||
|
|
// Many functions defined here return True if good, False otherwise, with an
|
||
|
|
// error code in i2eError field. Here is a handy macro for setting the error
|
||
|
|
// code and returning.
|
||
|
|
//
|
||
|
|
#define COMPLETE(pB,code) \
|
||
|
|
if(1){ \
|
||
|
|
pB->i2eError = code; \
|
||
|
|
return (code == I2EE_GOOD);\
|
||
|
|
}
|
||
|
|
|
||
|
|
#endif // I2ELLIS_H
|