2009-06-05 08:42:42 -04:00
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/*
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* Copyright 2000 ATI Technologies Inc., Markham, Ontario, and
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* VA Linux Systems Inc., Fremont, California.
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* Copyright 2008 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Original Authors:
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* Kevin E. Martin, Rickard E. Faith, Alan Hourihane
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*
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* Kernel port Author: Dave Airlie
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*/
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#ifndef RADEON_MODE_H
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#define RADEON_MODE_H
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#include <drm_crtc.h>
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#include <drm_mode.h>
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#include <drm_edid.h>
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#include <linux/i2c.h>
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#include <linux/i2c-id.h>
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#include <linux/i2c-algo-bit.h>
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2009-07-13 15:04:08 -04:00
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#include "radeon_fixed.h"
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struct radeon_device;
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2009-06-05 08:42:42 -04:00
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#define to_radeon_crtc(x) container_of(x, struct radeon_crtc, base)
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#define to_radeon_connector(x) container_of(x, struct radeon_connector, base)
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#define to_radeon_encoder(x) container_of(x, struct radeon_encoder, base)
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#define to_radeon_framebuffer(x) container_of(x, struct radeon_framebuffer, base)
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enum radeon_connector_type {
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CONNECTOR_NONE,
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CONNECTOR_VGA,
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CONNECTOR_DVI_I,
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CONNECTOR_DVI_D,
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CONNECTOR_DVI_A,
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CONNECTOR_STV,
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CONNECTOR_CTV,
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CONNECTOR_LVDS,
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CONNECTOR_DIGITAL,
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CONNECTOR_SCART,
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CONNECTOR_HDMI_TYPE_A,
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CONNECTOR_HDMI_TYPE_B,
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CONNECTOR_0XC,
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CONNECTOR_0XD,
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CONNECTOR_DIN,
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CONNECTOR_DISPLAY_PORT,
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CONNECTOR_UNSUPPORTED
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};
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enum radeon_dvi_type {
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DVI_AUTO,
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DVI_DIGITAL,
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DVI_ANALOG
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};
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enum radeon_rmx_type {
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RMX_OFF,
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RMX_FULL,
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RMX_CENTER,
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RMX_ASPECT
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};
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enum radeon_tv_std {
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TV_STD_NTSC,
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TV_STD_PAL,
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TV_STD_PAL_M,
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TV_STD_PAL_60,
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TV_STD_NTSC_J,
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TV_STD_SCART_PAL,
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TV_STD_SECAM,
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TV_STD_PAL_CN,
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};
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struct radeon_i2c_bus_rec {
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bool valid;
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uint32_t mask_clk_reg;
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uint32_t mask_data_reg;
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uint32_t a_clk_reg;
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uint32_t a_data_reg;
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uint32_t put_clk_reg;
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uint32_t put_data_reg;
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uint32_t get_clk_reg;
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uint32_t get_data_reg;
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uint32_t mask_clk_mask;
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uint32_t mask_data_mask;
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uint32_t put_clk_mask;
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uint32_t put_data_mask;
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uint32_t get_clk_mask;
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uint32_t get_data_mask;
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uint32_t a_clk_mask;
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uint32_t a_data_mask;
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};
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struct radeon_tmds_pll {
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uint32_t freq;
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uint32_t value;
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};
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#define RADEON_MAX_BIOS_CONNECTOR 16
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#define RADEON_PLL_USE_BIOS_DIVS (1 << 0)
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#define RADEON_PLL_NO_ODD_POST_DIV (1 << 1)
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#define RADEON_PLL_USE_REF_DIV (1 << 2)
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#define RADEON_PLL_LEGACY (1 << 3)
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#define RADEON_PLL_PREFER_LOW_REF_DIV (1 << 4)
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#define RADEON_PLL_PREFER_HIGH_REF_DIV (1 << 5)
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#define RADEON_PLL_PREFER_LOW_FB_DIV (1 << 6)
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#define RADEON_PLL_PREFER_HIGH_FB_DIV (1 << 7)
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#define RADEON_PLL_PREFER_LOW_POST_DIV (1 << 8)
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#define RADEON_PLL_PREFER_HIGH_POST_DIV (1 << 9)
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#define RADEON_PLL_USE_FRAC_FB_DIV (1 << 10)
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2009-07-13 11:08:18 -04:00
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#define RADEON_PLL_PREFER_CLOSEST_LOWER (1 << 11)
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2009-06-05 08:42:42 -04:00
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struct radeon_pll {
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uint16_t reference_freq;
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uint16_t reference_div;
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uint32_t pll_in_min;
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uint32_t pll_in_max;
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uint32_t pll_out_min;
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uint32_t pll_out_max;
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uint16_t xclk;
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uint32_t min_ref_div;
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uint32_t max_ref_div;
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uint32_t min_post_div;
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uint32_t max_post_div;
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uint32_t min_feedback_div;
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uint32_t max_feedback_div;
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uint32_t min_frac_feedback_div;
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uint32_t max_frac_feedback_div;
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uint32_t best_vco;
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};
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struct radeon_i2c_chan {
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struct drm_device *dev;
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struct i2c_adapter adapter;
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struct i2c_algo_bit_data algo;
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struct radeon_i2c_bus_rec rec;
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};
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/* mostly for macs, but really any system without connector tables */
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enum radeon_connector_table {
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CT_NONE,
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CT_GENERIC,
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CT_IBOOK,
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CT_POWERBOOK_EXTERNAL,
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CT_POWERBOOK_INTERNAL,
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CT_POWERBOOK_VGA,
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CT_MINI_EXTERNAL,
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CT_MINI_INTERNAL,
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CT_IMAC_G5_ISIGHT,
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CT_EMAC,
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};
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struct radeon_mode_info {
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struct atom_context *atom_context;
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2009-10-27 15:08:01 -04:00
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struct card_info *atom_card_info;
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2009-06-05 08:42:42 -04:00
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enum radeon_connector_table connector_table;
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bool mode_config_initialized;
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2009-07-13 15:04:08 -04:00
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struct radeon_crtc *crtcs[2];
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2009-09-09 03:40:54 -04:00
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/* DVI-I properties */
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struct drm_property *coherent_mode_property;
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/* DAC enable load detect */
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struct drm_property *load_detect_property;
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/* TV standard load detect */
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struct drm_property *tv_std_property;
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/* legacy TMDS PLL detect */
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struct drm_property *tmds_pll_property;
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2009-07-13 15:04:08 -04:00
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};
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2009-08-13 02:32:14 -04:00
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#define MAX_H_CODE_TIMING_LEN 32
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#define MAX_V_CODE_TIMING_LEN 32
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/* need to store these as reading
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back code tables is excessive */
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struct radeon_tv_regs {
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uint32_t tv_uv_adr;
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uint32_t timing_cntl;
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uint32_t hrestart;
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uint32_t vrestart;
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uint32_t frestart;
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uint16_t h_code_timing[MAX_H_CODE_TIMING_LEN];
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uint16_t v_code_timing[MAX_V_CODE_TIMING_LEN];
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};
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2009-06-05 08:42:42 -04:00
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struct radeon_crtc {
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struct drm_crtc base;
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int crtc_id;
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u16 lut_r[256], lut_g[256], lut_b[256];
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bool enabled;
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bool can_tile;
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uint32_t crtc_offset;
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struct drm_gem_object *cursor_bo;
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uint64_t cursor_addr;
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int cursor_width;
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int cursor_height;
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2009-07-09 01:04:19 -04:00
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uint32_t legacy_display_base_addr;
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2009-07-13 13:51:03 -04:00
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uint32_t legacy_cursor_offset;
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2009-07-13 15:04:08 -04:00
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enum radeon_rmx_type rmx_type;
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fixed20_12 vsc;
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fixed20_12 hsc;
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2009-10-09 15:14:30 -04:00
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struct drm_display_mode native_mode;
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2009-06-05 08:42:42 -04:00
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};
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struct radeon_encoder_primary_dac {
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/* legacy primary dac */
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uint32_t ps2_pdac_adj;
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};
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struct radeon_encoder_lvds {
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/* legacy lvds */
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uint16_t panel_vcc_delay;
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uint8_t panel_pwr_delay;
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uint8_t panel_digon_delay;
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uint8_t panel_blon_delay;
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uint16_t panel_ref_divider;
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uint8_t panel_post_divider;
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uint16_t panel_fb_divider;
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bool use_bios_dividers;
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uint32_t lvds_gen_cntl;
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/* panel mode */
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2009-10-09 15:14:30 -04:00
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struct drm_display_mode native_mode;
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2009-06-05 08:42:42 -04:00
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};
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struct radeon_encoder_tv_dac {
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/* legacy tv dac */
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uint32_t ps2_tvdac_adj;
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uint32_t ntsc_tvdac_adj;
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uint32_t pal_tvdac_adj;
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2009-08-13 02:32:14 -04:00
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int h_pos;
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int v_pos;
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int h_size;
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int supported_tv_stds;
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bool tv_on;
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2009-06-05 08:42:42 -04:00
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enum radeon_tv_std tv_std;
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2009-08-13 02:32:14 -04:00
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struct radeon_tv_regs tv;
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2009-06-05 08:42:42 -04:00
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};
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struct radeon_encoder_int_tmds {
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/* legacy int tmds */
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struct radeon_tmds_pll tmds_pll[4];
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};
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2009-10-16 11:15:25 -04:00
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/* spread spectrum */
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struct radeon_atom_ss {
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uint16_t percentage;
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uint8_t type;
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uint8_t step;
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uint8_t delay;
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uint8_t range;
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uint8_t refdiv;
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};
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2009-06-05 08:42:42 -04:00
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struct radeon_encoder_atom_dig {
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/* atom dig */
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bool coherent_mode;
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int dig_block;
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/* atom lvds */
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uint32_t lvds_misc;
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uint16_t panel_pwr_delay;
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2009-10-16 11:15:25 -04:00
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struct radeon_atom_ss *ss;
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2009-06-05 08:42:42 -04:00
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/* panel mode */
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2009-10-09 15:14:30 -04:00
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struct drm_display_mode native_mode;
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2009-06-05 08:42:42 -04:00
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};
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2009-08-13 02:32:14 -04:00
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struct radeon_encoder_atom_dac {
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enum radeon_tv_std tv_std;
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};
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2009-06-05 08:42:42 -04:00
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struct radeon_encoder {
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struct drm_encoder base;
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uint32_t encoder_id;
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uint32_t devices;
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2009-08-13 02:32:14 -04:00
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uint32_t active_device;
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2009-06-05 08:42:42 -04:00
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uint32_t flags;
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uint32_t pixel_clock;
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enum radeon_rmx_type rmx_type;
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2009-10-09 15:14:30 -04:00
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struct drm_display_mode native_mode;
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2009-06-05 08:42:42 -04:00
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void *enc_priv;
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};
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struct radeon_connector_atom_dig {
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uint32_t igp_lane_info;
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bool linkb;
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};
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struct radeon_connector {
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struct drm_connector base;
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uint32_t connector_id;
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uint32_t devices;
|
|
|
|
|
struct radeon_i2c_chan *ddc_bus;
|
2009-10-15 16:16:35 -04:00
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|
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/* some systems have a an hdmi and vga port with a shared ddc line */
|
|
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|
|
bool shared_ddc;
|
2009-08-13 02:32:14 -04:00
|
|
|
bool use_digital;
|
|
|
|
|
/* we need to mind the EDID between detect
|
|
|
|
|
and get modes due to analog/digital/tvencoder */
|
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|
|
struct edid *edid;
|
2009-06-05 08:42:42 -04:00
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|
|
void *con_priv;
|
2009-09-09 03:40:54 -04:00
|
|
|
bool dac_load_detect;
|
2009-11-05 13:16:01 -05:00
|
|
|
uint16_t connector_object_id;
|
2009-06-05 08:42:42 -04:00
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|
|
};
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|
|
struct radeon_framebuffer {
|
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|
|
struct drm_framebuffer base;
|
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|
|
struct drm_gem_object *obj;
|
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|
|
};
|
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extern struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev,
|
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|
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struct radeon_i2c_bus_rec *rec,
|
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|
|
|
const char *name);
|
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|
|
|
extern void radeon_i2c_destroy(struct radeon_i2c_chan *i2c);
|
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|
|
|
extern bool radeon_ddc_probe(struct radeon_connector *radeon_connector);
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|
extern int radeon_ddc_get_modes(struct radeon_connector *radeon_connector);
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|
extern struct drm_encoder *radeon_best_encoder(struct drm_connector *connector);
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|
|
extern void radeon_compute_pll(struct radeon_pll *pll,
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|
|
uint64_t freq,
|
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|
|
|
uint32_t *dot_clock_p,
|
|
|
|
|
uint32_t *fb_div_p,
|
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|
|
uint32_t *frac_fb_div_p,
|
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|
|
uint32_t *ref_div_p,
|
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|
|
uint32_t *post_div_p,
|
|
|
|
|
int flags);
|
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|
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|
|
struct drm_encoder *radeon_encoder_legacy_lvds_add(struct drm_device *dev, int bios_index);
|
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|
|
|
struct drm_encoder *radeon_encoder_legacy_primary_dac_add(struct drm_device *dev, int bios_index, int with_tv);
|
|
|
|
|
struct drm_encoder *radeon_encoder_legacy_tv_dac_add(struct drm_device *dev, int bios_index, int with_tv);
|
|
|
|
|
struct drm_encoder *radeon_encoder_legacy_tmds_int_add(struct drm_device *dev, int bios_index);
|
|
|
|
|
struct drm_encoder *radeon_encoder_legacy_tmds_ext_add(struct drm_device *dev, int bios_index);
|
|
|
|
|
extern void atombios_external_tmds_setup(struct drm_encoder *encoder, int action);
|
|
|
|
|
extern int atombios_get_encoder_mode(struct drm_encoder *encoder);
|
2009-08-13 02:32:14 -04:00
|
|
|
extern void radeon_encoder_set_active_device(struct drm_encoder *encoder);
|
2009-06-05 08:42:42 -04:00
|
|
|
|
|
|
|
|
extern void radeon_crtc_load_lut(struct drm_crtc *crtc);
|
|
|
|
|
extern int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y,
|
|
|
|
|
struct drm_framebuffer *old_fb);
|
|
|
|
|
extern int atombios_crtc_mode_set(struct drm_crtc *crtc,
|
|
|
|
|
struct drm_display_mode *mode,
|
|
|
|
|
struct drm_display_mode *adjusted_mode,
|
|
|
|
|
int x, int y,
|
|
|
|
|
struct drm_framebuffer *old_fb);
|
|
|
|
|
extern void atombios_crtc_dpms(struct drm_crtc *crtc, int mode);
|
|
|
|
|
|
|
|
|
|
extern int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y,
|
|
|
|
|
struct drm_framebuffer *old_fb);
|
|
|
|
|
extern void radeon_legacy_atom_set_surface(struct drm_crtc *crtc);
|
|
|
|
|
|
|
|
|
|
extern int radeon_crtc_cursor_set(struct drm_crtc *crtc,
|
|
|
|
|
struct drm_file *file_priv,
|
|
|
|
|
uint32_t handle,
|
|
|
|
|
uint32_t width,
|
|
|
|
|
uint32_t height);
|
|
|
|
|
extern int radeon_crtc_cursor_move(struct drm_crtc *crtc,
|
|
|
|
|
int x, int y);
|
|
|
|
|
|
|
|
|
|
extern bool radeon_atom_get_clock_info(struct drm_device *dev);
|
|
|
|
|
extern bool radeon_combios_get_clock_info(struct drm_device *dev);
|
|
|
|
|
extern struct radeon_encoder_atom_dig *
|
|
|
|
|
radeon_atombios_get_lvds_info(struct radeon_encoder *encoder);
|
2009-09-09 03:40:54 -04:00
|
|
|
bool radeon_atombios_get_tmds_info(struct radeon_encoder *encoder,
|
|
|
|
|
struct radeon_encoder_int_tmds *tmds);
|
|
|
|
|
bool radeon_legacy_get_tmds_info_from_combios(struct radeon_encoder *encoder,
|
|
|
|
|
struct radeon_encoder_int_tmds *tmds);
|
|
|
|
|
bool radeon_legacy_get_tmds_info_from_table(struct radeon_encoder *encoder,
|
|
|
|
|
struct radeon_encoder_int_tmds *tmds);
|
2009-06-12 13:26:08 -04:00
|
|
|
extern struct radeon_encoder_primary_dac *
|
|
|
|
|
radeon_atombios_get_primary_dac_info(struct radeon_encoder *encoder);
|
|
|
|
|
extern struct radeon_encoder_tv_dac *
|
|
|
|
|
radeon_atombios_get_tv_dac_info(struct radeon_encoder *encoder);
|
2009-06-05 08:42:42 -04:00
|
|
|
extern struct radeon_encoder_lvds *
|
|
|
|
|
radeon_combios_get_lvds_info(struct radeon_encoder *encoder);
|
|
|
|
|
extern void radeon_combios_get_ext_tmds_info(struct radeon_encoder *encoder);
|
|
|
|
|
extern struct radeon_encoder_tv_dac *
|
|
|
|
|
radeon_combios_get_tv_dac_info(struct radeon_encoder *encoder);
|
|
|
|
|
extern struct radeon_encoder_primary_dac *
|
|
|
|
|
radeon_combios_get_primary_dac_info(struct radeon_encoder *encoder);
|
|
|
|
|
extern void radeon_combios_output_lock(struct drm_encoder *encoder, bool lock);
|
|
|
|
|
extern void radeon_combios_initialize_bios_scratch_regs(struct drm_device *dev);
|
|
|
|
|
extern void radeon_atom_output_lock(struct drm_encoder *encoder, bool lock);
|
|
|
|
|
extern void radeon_atom_initialize_bios_scratch_regs(struct drm_device *dev);
|
2009-09-14 22:21:01 -04:00
|
|
|
extern void radeon_save_bios_scratch_regs(struct radeon_device *rdev);
|
|
|
|
|
extern void radeon_restore_bios_scratch_regs(struct radeon_device *rdev);
|
2009-06-05 08:42:42 -04:00
|
|
|
extern void
|
|
|
|
|
radeon_atombios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
|
|
|
|
|
extern void
|
|
|
|
|
radeon_atombios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
|
|
|
|
|
extern void
|
|
|
|
|
radeon_combios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
|
|
|
|
|
extern void
|
|
|
|
|
radeon_combios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
|
|
|
|
|
extern void radeon_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
|
|
|
|
|
u16 blue, int regno);
|
2009-10-05 23:54:01 -04:00
|
|
|
extern void radeon_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
|
|
|
|
|
u16 *blue, int regno);
|
2009-06-05 08:42:42 -04:00
|
|
|
struct drm_framebuffer *radeon_framebuffer_create(struct drm_device *dev,
|
|
|
|
|
struct drm_mode_fb_cmd *mode_cmd,
|
|
|
|
|
struct drm_gem_object *obj);
|
|
|
|
|
|
|
|
|
|
int radeonfb_probe(struct drm_device *dev);
|
|
|
|
|
|
|
|
|
|
int radeonfb_remove(struct drm_device *dev, struct drm_framebuffer *fb);
|
|
|
|
|
bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev);
|
|
|
|
|
bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev);
|
|
|
|
|
void radeon_atombios_init_crtc(struct drm_device *dev,
|
|
|
|
|
struct radeon_crtc *radeon_crtc);
|
|
|
|
|
void radeon_legacy_init_crtc(struct drm_device *dev,
|
|
|
|
|
struct radeon_crtc *radeon_crtc);
|
|
|
|
|
void radeon_i2c_do_lock(struct radeon_connector *radeon_connector, int lock_state);
|
|
|
|
|
|
|
|
|
|
void radeon_get_clock_info(struct drm_device *dev);
|
|
|
|
|
|
|
|
|
|
extern bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev);
|
|
|
|
|
extern bool radeon_get_atom_connector_info_from_supported_devices_table(struct drm_device *dev);
|
|
|
|
|
|
|
|
|
|
void radeon_rmx_mode_fixup(struct drm_encoder *encoder,
|
|
|
|
|
struct drm_display_mode *mode,
|
|
|
|
|
struct drm_display_mode *adjusted_mode);
|
|
|
|
|
void radeon_enc_destroy(struct drm_encoder *encoder);
|
|
|
|
|
void radeon_copy_fb(struct drm_device *dev, struct drm_gem_object *dst_obj);
|
|
|
|
|
void radeon_combios_asic_init(struct drm_device *dev);
|
|
|
|
|
extern int radeon_static_clocks_init(struct drm_device *dev);
|
2009-07-13 15:04:08 -04:00
|
|
|
bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc,
|
|
|
|
|
struct drm_display_mode *mode,
|
|
|
|
|
struct drm_display_mode *adjusted_mode);
|
2009-08-13 02:32:14 -04:00
|
|
|
void atom_rv515_force_tv_scaler(struct radeon_device *rdev, struct radeon_crtc *radeon_crtc);
|
|
|
|
|
|
|
|
|
|
/* legacy tv */
|
|
|
|
|
void radeon_legacy_tv_adjust_crtc_reg(struct drm_encoder *encoder,
|
|
|
|
|
uint32_t *h_total_disp, uint32_t *h_sync_strt_wid,
|
|
|
|
|
uint32_t *v_total_disp, uint32_t *v_sync_strt_wid);
|
|
|
|
|
void radeon_legacy_tv_adjust_pll1(struct drm_encoder *encoder,
|
|
|
|
|
uint32_t *htotal_cntl, uint32_t *ppll_ref_div,
|
|
|
|
|
uint32_t *ppll_div_3, uint32_t *pixclks_cntl);
|
|
|
|
|
void radeon_legacy_tv_adjust_pll2(struct drm_encoder *encoder,
|
|
|
|
|
uint32_t *htotal2_cntl, uint32_t *p2pll_ref_div,
|
|
|
|
|
uint32_t *p2pll_div_0, uint32_t *pixclks_cntl);
|
|
|
|
|
void radeon_legacy_tv_mode_set(struct drm_encoder *encoder,
|
|
|
|
|
struct drm_display_mode *mode,
|
|
|
|
|
struct drm_display_mode *adjusted_mode);
|
2009-06-05 08:42:42 -04:00
|
|
|
#endif
|
