2009-10-16 06:13:07 -04:00
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/**
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*
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* GSPCA sub driver for W996[78]CF JPEG USB Dual Mode Camera Chip.
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*
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* Copyright (C) 2009 Hans de Goede <hdegoede@redhat.com>
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*
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* This module is adapted from the in kernel v4l1 w9968cf driver:
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*
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* Copyright (C) 2002-2004 by Luca Risolia <luca.risolia@studio.unibo.it>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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*/
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/* Note this is not a stand alone driver, it gets included in ov519.c, this
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is a bit of a hack, but it needs the driver code for a lot of different
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ov sensors which is already present in ov519.c (the old v4l1 driver used
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the ovchipcam framework). When we have the time we really should move
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the sensor drivers to v4l2 sub drivers, and properly split of this
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driver from ov519.c */
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#define W9968CF_I2C_BUS_DELAY 4 /* delay in us for I2C bit r/w operations */
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/* FIXME make this runtime configurable */
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/* Comment/uncomment this for high/low quality of compressed video */
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#define W9968CF_DEC_FAST_LOWQUALITY_VIDEO
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#ifdef W9968CF_DEC_FAST_LOWQUALITY_VIDEO
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static const unsigned char Y_QUANTABLE[64] = {
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16, 11, 10, 16, 24, 40, 51, 61,
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12, 12, 14, 19, 26, 58, 60, 55,
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14, 13, 16, 24, 40, 57, 69, 56,
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14, 17, 22, 29, 51, 87, 80, 62,
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18, 22, 37, 56, 68, 109, 103, 77,
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24, 35, 55, 64, 81, 104, 113, 92,
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49, 64, 78, 87, 103, 121, 120, 101,
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72, 92, 95, 98, 112, 100, 103, 99
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};
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static const unsigned char UV_QUANTABLE[64] = {
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17, 18, 24, 47, 99, 99, 99, 99,
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18, 21, 26, 66, 99, 99, 99, 99,
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24, 26, 56, 99, 99, 99, 99, 99,
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47, 66, 99, 99, 99, 99, 99, 99,
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99, 99, 99, 99, 99, 99, 99, 99,
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99, 99, 99, 99, 99, 99, 99, 99,
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99, 99, 99, 99, 99, 99, 99, 99,
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99, 99, 99, 99, 99, 99, 99, 99
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};
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#else
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static const unsigned char Y_QUANTABLE[64] = {
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8, 5, 5, 8, 12, 20, 25, 30,
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6, 6, 7, 9, 13, 29, 30, 27,
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7, 6, 8, 12, 20, 28, 34, 28,
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7, 8, 11, 14, 25, 43, 40, 31,
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9, 11, 18, 28, 34, 54, 51, 38,
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12, 17, 27, 32, 40, 52, 56, 46,
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24, 32, 39, 43, 51, 60, 60, 50,
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36, 46, 47, 49, 56, 50, 51, 49
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};
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static const unsigned char UV_QUANTABLE[64] = {
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8, 9, 12, 23, 49, 49, 49, 49,
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9, 10, 13, 33, 49, 49, 49, 49,
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12, 13, 28, 49, 49, 49, 49, 49,
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23, 33, 49, 49, 49, 49, 49, 49,
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49, 49, 49, 49, 49, 49, 49, 49,
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49, 49, 49, 49, 49, 49, 49, 49,
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49, 49, 49, 49, 49, 49, 49, 49,
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49, 49, 49, 49, 49, 49, 49, 49
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};
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#endif
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static const struct v4l2_pix_format w9968cf_vga_mode[] = {
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{160, 120, V4L2_PIX_FMT_UYVY, V4L2_FIELD_NONE,
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.bytesperline = 160 * 2,
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.sizeimage = 160 * 120 * 2,
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.colorspace = V4L2_COLORSPACE_JPEG},
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{176, 144, V4L2_PIX_FMT_UYVY, V4L2_FIELD_NONE,
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.bytesperline = 176 * 2,
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.sizeimage = 176 * 144 * 2,
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.colorspace = V4L2_COLORSPACE_JPEG},
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{320, 240, V4L2_PIX_FMT_UYVY, V4L2_FIELD_NONE,
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.bytesperline = 320 * 2,
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.sizeimage = 320 * 240 * 2,
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.colorspace = V4L2_COLORSPACE_JPEG},
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{352, 288, V4L2_PIX_FMT_UYVY, V4L2_FIELD_NONE,
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.bytesperline = 352 * 2,
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.sizeimage = 352 * 288 * 2,
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.colorspace = V4L2_COLORSPACE_JPEG},
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/* {640, 480, V4L2_PIX_FMT_UYVY, V4L2_FIELD_NONE,
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.bytesperline = 640 * 2,
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.sizeimage = 640 * 480 * 2,
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.colorspace = V4L2_COLORSPACE_JPEG}, */
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};
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static int reg_w(struct sd *sd, __u16 index, __u16 value);
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/*--------------------------------------------------------------------------
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Write 64-bit data to the fast serial bus registers.
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Return 0 on success, -1 otherwise.
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--------------------------------------------------------------------------*/
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static int w9968cf_write_fsb(struct sd *sd, u16* data)
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{
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struct usb_device* udev = sd->gspca_dev.dev;
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u16 value;
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int ret;
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value = *data++;
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memcpy(sd->gspca_dev.usb_buf, data, 6);
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ret = usb_control_msg(udev, usb_sndctrlpipe(udev, 0), 0,
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USB_TYPE_VENDOR | USB_DIR_OUT | USB_RECIP_DEVICE,
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value, 0x06, sd->gspca_dev.usb_buf, 6, 500);
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if (ret < 0) {
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PDEBUG(D_ERR, "Write FSB registers failed (%d)", ret);
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return ret;
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}
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return 0;
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}
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/*--------------------------------------------------------------------------
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Write data to the serial bus control register.
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Return 0 on success, a negative number otherwise.
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--------------------------------------------------------------------------*/
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static int w9968cf_write_sb(struct sd *sd, u16 value)
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{
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int ret;
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/* We don't use reg_w here, as that would cause all writes when
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bitbanging i2c to be logged, making the logs impossible to read */
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ret = usb_control_msg(sd->gspca_dev.dev,
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usb_sndctrlpipe(sd->gspca_dev.dev, 0),
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0,
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USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
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value, 0x01, NULL, 0, 500);
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udelay(W9968CF_I2C_BUS_DELAY);
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if (ret < 0) {
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PDEBUG(D_ERR, "Write SB reg [01] %04x failed", value);
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return ret;
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}
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return 0;
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}
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/*--------------------------------------------------------------------------
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Read data from the serial bus control register.
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Return 0 on success, a negative number otherwise.
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--------------------------------------------------------------------------*/
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static int w9968cf_read_sb(struct sd *sd)
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{
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int ret;
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/* We don't use reg_r here, as the w9968cf is special and has 16
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bit registers instead of 8 bit */
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ret = usb_control_msg(sd->gspca_dev.dev,
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usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
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1,
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USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
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0, 0x01, sd->gspca_dev.usb_buf, 2, 500);
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if (ret >= 0)
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ret = sd->gspca_dev.usb_buf[0] |
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(sd->gspca_dev.usb_buf[1] << 8);
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else
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PDEBUG(D_ERR, "Read SB reg [01] failed");
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udelay(W9968CF_I2C_BUS_DELAY);
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return ret;
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}
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/*--------------------------------------------------------------------------
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Upload quantization tables for the JPEG compression.
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This function is called by w9968cf_start_transfer().
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Return 0 on success, a negative number otherwise.
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--------------------------------------------------------------------------*/
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static int w9968cf_upload_quantizationtables(struct sd *sd)
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{
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u16 a, b;
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int ret = 0, i, j;
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ret += reg_w(sd, 0x39, 0x0010); /* JPEG clock enable */
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for (i = 0, j = 0; i < 32; i++, j += 2) {
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a = Y_QUANTABLE[j] | ((unsigned)(Y_QUANTABLE[j+1]) << 8);
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b = UV_QUANTABLE[j] | ((unsigned)(UV_QUANTABLE[j+1]) << 8);
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ret += reg_w(sd, 0x40+i, a);
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ret += reg_w(sd, 0x60+i, b);
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}
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ret += reg_w(sd, 0x39, 0x0012); /* JPEG encoder enable */
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return ret;
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}
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/****************************************************************************
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* Low-level I2C I/O functions. *
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* The adapter supports the following I2C transfer functions: *
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* i2c_adap_fastwrite_byte_data() (at 400 kHz bit frequency only) *
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* i2c_adap_read_byte_data() *
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* i2c_adap_read_byte() *
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****************************************************************************/
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static int w9968cf_smbus_start(struct sd *sd)
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{
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int ret = 0;
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ret += w9968cf_write_sb(sd, 0x0011); /* SDE=1, SDA=0, SCL=1 */
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ret += w9968cf_write_sb(sd, 0x0010); /* SDE=1, SDA=0, SCL=0 */
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return ret;
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}
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static int w9968cf_smbus_stop(struct sd *sd)
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{
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int ret = 0;
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ret += w9968cf_write_sb(sd, 0x0010); /* SDE=1, SDA=0, SCL=0 */
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ret += w9968cf_write_sb(sd, 0x0011); /* SDE=1, SDA=0, SCL=1 */
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ret += w9968cf_write_sb(sd, 0x0013); /* SDE=1, SDA=1, SCL=1 */
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return ret;
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}
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static int w9968cf_smbus_write_byte(struct sd *sd, u8 v)
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{
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u8 bit;
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int ret = 0, sda;
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for (bit = 0 ; bit < 8 ; bit++) {
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sda = (v & 0x80) ? 2 : 0;
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v <<= 1;
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/* SDE=1, SDA=sda, SCL=0 */
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ret += w9968cf_write_sb(sd, 0x10 | sda);
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/* SDE=1, SDA=sda, SCL=1 */
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ret += w9968cf_write_sb(sd, 0x11 | sda);
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/* SDE=1, SDA=sda, SCL=0 */
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ret += w9968cf_write_sb(sd, 0x10 | sda);
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}
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return ret;
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}
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static int w9968cf_smbus_read_byte(struct sd *sd, u8* v)
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{
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u8 bit;
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int ret = 0;
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/* No need to ensure SDA is high as we are always called after
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read_ack which ends with SDA high */
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*v = 0;
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for (bit = 0 ; bit < 8 ; bit++) {
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*v <<= 1;
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/* SDE=1, SDA=1, SCL=1 */
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ret += w9968cf_write_sb(sd, 0x0013);
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*v |= (w9968cf_read_sb(sd) & 0x0008) ? 1 : 0;
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/* SDE=1, SDA=1, SCL=0 */
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ret += w9968cf_write_sb(sd, 0x0012);
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}
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return ret;
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}
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static int w9968cf_smbus_write_nack(struct sd *sd)
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{
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int ret = 0;
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/* No need to ensure SDA is high as we are always called after
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read_byte which ends with SDA high */
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ret += w9968cf_write_sb(sd, 0x0013); /* SDE=1, SDA=1, SCL=1 */
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ret += w9968cf_write_sb(sd, 0x0012); /* SDE=1, SDA=1, SCL=0 */
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return ret;
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}
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static int w9968cf_smbus_read_ack(struct sd *sd)
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{
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int ret = 0, sda;
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/* Ensure SDA is high before raising clock to avoid a spurious stop */
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ret += w9968cf_write_sb(sd, 0x0012); /* SDE=1, SDA=1, SCL=0 */
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ret += w9968cf_write_sb(sd, 0x0013); /* SDE=1, SDA=1, SCL=1 */
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sda = w9968cf_read_sb(sd);
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ret += w9968cf_write_sb(sd, 0x0012); /* SDE=1, SDA=1, SCL=0 */
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if (sda < 0)
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ret += sda;
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else if (sda & 0x08) {
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PDEBUG(D_USBI, "Did not receive i2c ACK");
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ret += -1;
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}
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return ret;
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}
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/* SMBus protocol: S Addr Wr [A] Subaddr [A] Value [A] P */
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static int w9968cf_i2c_w(struct sd *sd, u8 reg, u8 value)
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{
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u16* data = (u16 *)sd->gspca_dev.usb_buf;
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int ret = 0;
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data[0] = 0x082f | ((sd->sensor_addr & 0x80) ? 0x1500 : 0x0);
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data[0] |= (sd->sensor_addr & 0x40) ? 0x4000 : 0x0;
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data[1] = 0x2082 | ((sd->sensor_addr & 0x40) ? 0x0005 : 0x0);
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data[1] |= (sd->sensor_addr & 0x20) ? 0x0150 : 0x0;
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data[1] |= (sd->sensor_addr & 0x10) ? 0x5400 : 0x0;
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data[2] = 0x8208 | ((sd->sensor_addr & 0x08) ? 0x0015 : 0x0);
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data[2] |= (sd->sensor_addr & 0x04) ? 0x0540 : 0x0;
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data[2] |= (sd->sensor_addr & 0x02) ? 0x5000 : 0x0;
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data[3] = 0x1d20 | ((sd->sensor_addr & 0x02) ? 0x0001 : 0x0);
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data[3] |= (sd->sensor_addr & 0x01) ? 0x0054 : 0x0;
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ret += w9968cf_write_fsb(sd, data);
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data[0] = 0x8208 | ((reg & 0x80) ? 0x0015 : 0x0);
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data[0] |= (reg & 0x40) ? 0x0540 : 0x0;
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|
data[0] |= (reg & 0x20) ? 0x5000 : 0x0;
|
|
|
|
data[1] = 0x0820 | ((reg & 0x20) ? 0x0001 : 0x0);
|
|
|
|
data[1] |= (reg & 0x10) ? 0x0054 : 0x0;
|
|
|
|
data[1] |= (reg & 0x08) ? 0x1500 : 0x0;
|
|
|
|
data[1] |= (reg & 0x04) ? 0x4000 : 0x0;
|
|
|
|
data[2] = 0x2082 | ((reg & 0x04) ? 0x0005 : 0x0);
|
|
|
|
data[2] |= (reg & 0x02) ? 0x0150 : 0x0;
|
|
|
|
data[2] |= (reg & 0x01) ? 0x5400 : 0x0;
|
|
|
|
data[3] = 0x001d;
|
|
|
|
|
|
|
|
ret += w9968cf_write_fsb(sd, data);
|
|
|
|
|
|
|
|
data[0] = 0x8208 | ((value & 0x80) ? 0x0015 : 0x0);
|
|
|
|
data[0] |= (value & 0x40) ? 0x0540 : 0x0;
|
|
|
|
data[0] |= (value & 0x20) ? 0x5000 : 0x0;
|
|
|
|
data[1] = 0x0820 | ((value & 0x20) ? 0x0001 : 0x0);
|
|
|
|
data[1] |= (value & 0x10) ? 0x0054 : 0x0;
|
|
|
|
data[1] |= (value & 0x08) ? 0x1500 : 0x0;
|
|
|
|
data[1] |= (value & 0x04) ? 0x4000 : 0x0;
|
|
|
|
data[2] = 0x2082 | ((value & 0x04) ? 0x0005 : 0x0);
|
|
|
|
data[2] |= (value & 0x02) ? 0x0150 : 0x0;
|
|
|
|
data[2] |= (value & 0x01) ? 0x5400 : 0x0;
|
|
|
|
data[3] = 0xfe1d;
|
|
|
|
|
|
|
|
ret += w9968cf_write_fsb(sd, data);
|
|
|
|
|
|
|
|
if (!ret)
|
|
|
|
PDEBUG(D_USBO, "i2c 0x%02x -> [0x%02x]", value, reg);
|
|
|
|
else
|
|
|
|
PDEBUG(D_ERR, "i2c 0x%02x -> [0x%02x] failed", value, reg);
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* SMBus protocol: S Addr Wr [A] Subaddr [A] P S Addr+1 Rd [A] [Value] NA P */
|
|
|
|
static int w9968cf_i2c_r(struct sd *sd, u8 reg)
|
|
|
|
{
|
|
|
|
int ret = 0;
|
|
|
|
u8 value;
|
|
|
|
|
|
|
|
/* Fast serial bus data control disable */
|
|
|
|
ret += w9968cf_write_sb(sd, 0x0013); /* don't change ! */
|
|
|
|
|
|
|
|
ret += w9968cf_smbus_start(sd);
|
|
|
|
ret += w9968cf_smbus_write_byte(sd, sd->sensor_addr);
|
|
|
|
ret += w9968cf_smbus_read_ack(sd);
|
|
|
|
ret += w9968cf_smbus_write_byte(sd, reg);
|
|
|
|
ret += w9968cf_smbus_read_ack(sd);
|
|
|
|
ret += w9968cf_smbus_stop(sd);
|
|
|
|
ret += w9968cf_smbus_start(sd);
|
|
|
|
ret += w9968cf_smbus_write_byte(sd, sd->sensor_addr + 1);
|
|
|
|
ret += w9968cf_smbus_read_ack(sd);
|
|
|
|
ret += w9968cf_smbus_read_byte(sd, &value);
|
|
|
|
/* signal we don't want to read anymore, the v4l1 driver used to
|
|
|
|
send an ack here which is very wrong! (and then fixed
|
|
|
|
the issues this gave by retrying reads) */
|
|
|
|
ret += w9968cf_smbus_write_nack(sd);
|
|
|
|
ret += w9968cf_smbus_stop(sd);
|
|
|
|
|
|
|
|
/* Fast serial bus data control re-enable */
|
|
|
|
ret += w9968cf_write_sb(sd, 0x0030);
|
|
|
|
|
|
|
|
if (!ret) {
|
|
|
|
ret = value;
|
|
|
|
PDEBUG(D_USBI, "i2c [0x%02X] -> 0x%02X", reg, value);
|
|
|
|
} else
|
|
|
|
PDEBUG(D_ERR, "i2c read [0x%02x] failed", reg);
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/*--------------------------------------------------------------------------
|
|
|
|
Turn on the LED on some webcams. A beep should be heard too.
|
|
|
|
Return 0 on success, a negative number otherwise.
|
|
|
|
--------------------------------------------------------------------------*/
|
|
|
|
static int w9968cf_configure(struct sd *sd)
|
|
|
|
{
|
|
|
|
int ret = 0;
|
|
|
|
|
|
|
|
ret += reg_w(sd, 0x00, 0xff00); /* power-down */
|
|
|
|
ret += reg_w(sd, 0x00, 0xbf17); /* reset everything */
|
|
|
|
ret += reg_w(sd, 0x00, 0xbf10); /* normal operation */
|
|
|
|
ret += reg_w(sd, 0x01, 0x0010); /* serial bus, SDS high */
|
|
|
|
ret += reg_w(sd, 0x01, 0x0000); /* serial bus, SDS low */
|
|
|
|
ret += reg_w(sd, 0x01, 0x0010); /* ..high 'beep-beep' */
|
|
|
|
ret += reg_w(sd, 0x01, 0x0030); /* Set sda scl to FSB mode */
|
|
|
|
|
|
|
|
if (ret)
|
|
|
|
PDEBUG(D_ERR, "Couldn't turn on the LED");
|
|
|
|
|
|
|
|
sd->stopped = 1;
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int w9968cf_init(struct sd *sd)
|
|
|
|
{
|
|
|
|
int ret = 0;
|
|
|
|
unsigned long hw_bufsize = sd->sif ? (352 * 288 * 2) : (640 * 480 * 2),
|
|
|
|
y0 = 0x0000,
|
|
|
|
u0 = y0 + hw_bufsize/2,
|
|
|
|
v0 = u0 + hw_bufsize/4,
|
|
|
|
y1 = v0 + hw_bufsize/4,
|
|
|
|
u1 = y1 + hw_bufsize/2,
|
|
|
|
v1 = u1 + hw_bufsize/4;
|
|
|
|
|
|
|
|
ret += reg_w(sd, 0x00, 0xff00); /* power off */
|
|
|
|
ret += reg_w(sd, 0x00, 0xbf10); /* power on */
|
|
|
|
|
|
|
|
ret += reg_w(sd, 0x03, 0x405d); /* DRAM timings */
|
|
|
|
ret += reg_w(sd, 0x04, 0x0030); /* SDRAM timings */
|
|
|
|
|
|
|
|
ret += reg_w(sd, 0x20, y0 & 0xffff); /* Y buf.0, low */
|
|
|
|
ret += reg_w(sd, 0x21, y0 >> 16); /* Y buf.0, high */
|
|
|
|
ret += reg_w(sd, 0x24, u0 & 0xffff); /* U buf.0, low */
|
|
|
|
ret += reg_w(sd, 0x25, u0 >> 16); /* U buf.0, high */
|
|
|
|
ret += reg_w(sd, 0x28, v0 & 0xffff); /* V buf.0, low */
|
|
|
|
ret += reg_w(sd, 0x29, v0 >> 16); /* V buf.0, high */
|
|
|
|
|
|
|
|
ret += reg_w(sd, 0x22, y1 & 0xffff); /* Y buf.1, low */
|
|
|
|
ret += reg_w(sd, 0x23, y1 >> 16); /* Y buf.1, high */
|
|
|
|
ret += reg_w(sd, 0x26, u1 & 0xffff); /* U buf.1, low */
|
|
|
|
ret += reg_w(sd, 0x27, u1 >> 16); /* U buf.1, high */
|
|
|
|
ret += reg_w(sd, 0x2a, v1 & 0xffff); /* V buf.1, low */
|
|
|
|
ret += reg_w(sd, 0x2b, v1 >> 16); /* V buf.1, high */
|
|
|
|
|
|
|
|
ret += reg_w(sd, 0x32, y1 & 0xffff); /* JPEG buf 0 low */
|
|
|
|
ret += reg_w(sd, 0x33, y1 >> 16); /* JPEG buf 0 high */
|
|
|
|
|
|
|
|
ret += reg_w(sd, 0x34, y1 & 0xffff); /* JPEG buf 1 low */
|
|
|
|
ret += reg_w(sd, 0x35, y1 >> 16); /* JPEG bug 1 high */
|
|
|
|
|
|
|
|
ret += reg_w(sd, 0x36, 0x0000);/* JPEG restart interval */
|
|
|
|
ret += reg_w(sd, 0x37, 0x0804);/*JPEG VLE FIFO threshold*/
|
|
|
|
ret += reg_w(sd, 0x38, 0x0000);/* disable hw up-scaling */
|
|
|
|
ret += reg_w(sd, 0x3f, 0x0000); /* JPEG/MCTL test data */
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int w9968cf_set_crop_window(struct sd *sd)
|
|
|
|
{
|
|
|
|
int ret = 0, start_cropx, start_cropy, x, y, fw, fh, cw, ch,
|
|
|
|
max_width, max_height;
|
|
|
|
|
|
|
|
if (sd->sif) {
|
|
|
|
max_width = 352;
|
|
|
|
max_height = 288;
|
|
|
|
} else {
|
|
|
|
max_width = 640;
|
|
|
|
max_height = 480;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (sd->sensor == SEN_OV7620) {
|
|
|
|
/* Sigh, this is dependend on the clock / framerate changes
|
|
|
|
made by the frequency control, sick. */
|
|
|
|
if (sd->freq == 1) {
|
|
|
|
start_cropx = 279;
|
|
|
|
start_cropy = 35;
|
|
|
|
} else {
|
|
|
|
start_cropx = 103;
|
|
|
|
start_cropy = 35;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
start_cropx = 320;
|
|
|
|
start_cropy = 35;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Work around to avoid FP arithmetics */
|
|
|
|
#define SC(x) ((x) << 10)
|
|
|
|
|
|
|
|
/* Scaling factors */
|
|
|
|
fw = SC(sd->gspca_dev.width) / max_width;
|
|
|
|
fh = SC(sd->gspca_dev.height) / max_height;
|
|
|
|
|
|
|
|
cw = (fw >= fh) ? max_width : SC(sd->gspca_dev.width)/fh;
|
|
|
|
ch = (fw >= fh) ? SC(sd->gspca_dev.height)/fw : max_height;
|
|
|
|
|
|
|
|
sd->sensor_width = max_width;
|
|
|
|
sd->sensor_height = max_height;
|
|
|
|
|
|
|
|
x = (max_width - cw) / 2;
|
|
|
|
y = (max_height - ch) / 2;
|
|
|
|
|
|
|
|
ret += reg_w(sd, 0x10, start_cropx + x);
|
|
|
|
ret += reg_w(sd, 0x11, start_cropy + y);
|
|
|
|
ret += reg_w(sd, 0x12, start_cropx + x + cw);
|
|
|
|
ret += reg_w(sd, 0x13, start_cropy + y + ch);
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int w9968cf_mode_init_regs(struct sd *sd)
|
|
|
|
{
|
|
|
|
int ret = 0, val, vs_polarity, hs_polarity;
|
|
|
|
|
|
|
|
ret += w9968cf_set_crop_window(sd);
|
|
|
|
|
|
|
|
ret += reg_w(sd, 0x14, sd->gspca_dev.width);
|
|
|
|
ret += reg_w(sd, 0x15, sd->gspca_dev.height);
|
|
|
|
|
|
|
|
/* JPEG width & height */
|
|
|
|
ret += reg_w(sd, 0x30, sd->gspca_dev.width);
|
|
|
|
ret += reg_w(sd, 0x31, sd->gspca_dev.height);
|
|
|
|
|
|
|
|
/* Y & UV frame buffer strides (in WORD) */
|
|
|
|
ret += reg_w(sd, 0x2c, sd->gspca_dev.width);
|
|
|
|
|
|
|
|
ret += reg_w(sd, 0x00, 0xbf17); /* reset everything */
|
|
|
|
ret += reg_w(sd, 0x00, 0xbf10); /* normal operation */
|
|
|
|
|
|
|
|
/* Transfer size */
|
|
|
|
/* FIXME JPEG * 4 ?? */
|
|
|
|
val = sd->gspca_dev.width * sd->gspca_dev.height;
|
|
|
|
ret += reg_w(sd, 0x3d, val & 0xffff); /* low bits */
|
|
|
|
ret += reg_w(sd, 0x3e, val >> 16); /* high bits */
|
|
|
|
|
|
|
|
/* Video Capture Control Register */
|
|
|
|
if (sd->sensor == SEN_OV7620) {
|
|
|
|
/* Seems to work around a bug in the image sensor */
|
|
|
|
vs_polarity = 1;
|
|
|
|
hs_polarity = 1;
|
|
|
|
} else {
|
|
|
|
vs_polarity = 1;
|
|
|
|
hs_polarity = 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
val = (vs_polarity << 12) | (hs_polarity << 11);
|
|
|
|
|
|
|
|
val |= 0x0080; /* Enable HW double buffering */
|
|
|
|
|
|
|
|
/* val |= 0x0020; enable clamping */
|
|
|
|
/* val |= 0x0008; enable (1-2-1) filter */
|
|
|
|
/* val |= 0x000c; enable (2-3-6-3-2) filter */
|
|
|
|
|
|
|
|
val |= 0x8000; /* capt. enable */
|
|
|
|
|
|
|
|
ret += reg_w(sd, 0x16, val);
|
|
|
|
|
|
|
|
sd->gspca_dev.empty_packet = 0;
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void w9968cf_pkt_scan(struct gspca_dev *gspca_dev,
|
|
|
|
struct gspca_frame *frame, /* target */
|
|
|
|
__u8 *data, /* isoc packet */
|
|
|
|
int len) /* iso packet length */
|
|
|
|
{
|
|
|
|
/* An empty packet signals EOF */
|
|
|
|
if (gspca_dev->empty_packet) {
|
|
|
|
frame = gspca_frame_add(gspca_dev, LAST_PACKET, frame,
|
2009-10-16 10:26:22 -04:00
|
|
|
NULL, 0);
|
2009-10-16 06:13:07 -04:00
|
|
|
gspca_frame_add(gspca_dev, FIRST_PACKET, frame,
|
|
|
|
NULL, 0);
|
|
|
|
gspca_dev->empty_packet = 0;
|
|
|
|
}
|
|
|
|
gspca_frame_add(gspca_dev, INTER_PACKET, frame, data, len);
|
|
|
|
}
|