2008-10-23 01:26:29 -04:00
|
|
|
#ifndef _ASM_X86_GENAPIC_32_H
|
|
|
|
#define _ASM_X86_GENAPIC_32_H
|
2005-04-16 18:20:36 -04:00
|
|
|
|
2006-09-26 04:52:26 -04:00
|
|
|
#include <asm/mpspec.h>
|
x86: fix wakeup_cpu with numaq/es7000, v2
Impact: fix secondary-CPU wakeup/init path with numaq and es7000
While looking at wakeup_secondary_cpu for WAKE_SECONDARY_VIA_NMI:
|#ifdef WAKE_SECONDARY_VIA_NMI
|/*
| * Poke the other CPU in the eye via NMI to wake it up. Remember that the normal
| * INIT, INIT, STARTUP sequence will reset the chip hard for us, and this
| * won't ... remember to clear down the APIC, etc later.
| */
|static int __devinit
|wakeup_secondary_cpu(int logical_apicid, unsigned long start_eip)
|{
| unsigned long send_status, accept_status = 0;
| int maxlvt;
|...
| if (APIC_INTEGRATED(apic_version[phys_apicid])) {
| maxlvt = lapic_get_maxlvt();
I noticed that there is no warning about undefined phys_apicid...
because WAKE_SECONDARY_VIA_NMI and WAKE_SECONDARY_VIA_INIT can not be
defined at the same time. So NUMAQ is using wrong wakeup_secondary_cpu.
WAKE_SECONDARY_VIA_NMI, WAKE_SECONDARY_VIA_INIT and
WAKE_SECONDARY_VIA_MIP are variants of a weird and fragile
preprocessor-driven "HAL" mechanisms to specify the kind of secondary-CPU
wakeup strategy a given x86 kernel will use.
The vast majority of systems want to use INIT for secondary wakeup - NUMAQ
uses an NMI, (old-style-) ES7000 uses 'MIP' (a firmware driven in-memory
flag to let secondaries continue).
So convert these mechanisms to x86_quirks and add a
->wakeup_secondary_cpu() method to specify the rare exception
to the sane default.
Extend genapic accordingly as well, for 32-bit.
While looking further, I noticed that functions in wakecup.h for numaq
and es7000 are different to the default in mach_wakecpu.h - but smpboot.c
will only use default mach_wakecpu.h with smphook.h.
So we need to add mach_wakecpu.h for mach_generic, to properly support
numaq and es7000, and vectorize the following SMP init methods:
int trampoline_phys_low;
int trampoline_phys_high;
void (*wait_for_init_deassert)(atomic_t *deassert);
void (*smp_callin_clear_local_apic)(void);
void (*store_NMI_vector)(unsigned short *high, unsigned short *low);
void (*restore_NMI_vector)(unsigned short *high, unsigned short *low);
void (*inquire_remote_apic)(int apicid);
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-11-16 06:12:49 -05:00
|
|
|
#include <asm/atomic.h>
|
2006-09-26 04:52:26 -04:00
|
|
|
|
2005-04-16 18:20:36 -04:00
|
|
|
/*
|
|
|
|
* Generic APIC driver interface.
|
|
|
|
*
|
|
|
|
* An straight forward mapping of the APIC related parts of the
|
|
|
|
* x86 subarchitecture interface to a dynamic object.
|
|
|
|
*
|
|
|
|
* This is used by the "generic" x86 subarchitecture.
|
|
|
|
*
|
|
|
|
* Copyright 2003 Andi Kleen, SuSE Labs.
|
|
|
|
*/
|
|
|
|
|
2009-01-03 05:17:32 -05:00
|
|
|
struct mpc_bus;
|
2009-01-03 05:16:57 -05:00
|
|
|
struct mpc_table;
|
2009-01-03 05:18:52 -05:00
|
|
|
struct mpc_cpu;
|
2005-04-16 18:20:36 -04:00
|
|
|
|
2008-03-23 04:02:13 -04:00
|
|
|
struct genapic {
|
|
|
|
char *name;
|
|
|
|
int (*probe)(void);
|
2005-04-16 18:20:36 -04:00
|
|
|
|
|
|
|
int (*apic_id_registered)(void);
|
2008-12-16 20:33:59 -05:00
|
|
|
const struct cpumask *(*target_cpus)(void);
|
2005-04-16 18:20:36 -04:00
|
|
|
int int_delivery_mode;
|
2008-03-23 04:02:13 -04:00
|
|
|
int int_dest_mode;
|
2005-04-16 18:20:36 -04:00
|
|
|
int ESR_DISABLE;
|
|
|
|
int apic_destination_logical;
|
|
|
|
unsigned long (*check_apicid_used)(physid_mask_t bitmap, int apicid);
|
2008-03-23 04:02:13 -04:00
|
|
|
unsigned long (*check_apicid_present)(int apicid);
|
2005-04-16 18:20:36 -04:00
|
|
|
int no_balance_irq;
|
|
|
|
int no_ioapic_check;
|
|
|
|
void (*init_apic_ldr)(void);
|
|
|
|
physid_mask_t (*ioapic_phys_id_map)(physid_mask_t map);
|
|
|
|
|
2007-05-02 13:27:04 -04:00
|
|
|
void (*setup_apic_routing)(void);
|
2005-04-16 18:20:36 -04:00
|
|
|
int (*multi_timer_check)(int apic, int irq);
|
2008-03-23 04:02:13 -04:00
|
|
|
int (*apicid_to_node)(int logical_apicid);
|
2005-04-16 18:20:36 -04:00
|
|
|
int (*cpu_to_logical_apicid)(int cpu);
|
|
|
|
int (*cpu_present_to_apicid)(int mps_cpu);
|
|
|
|
physid_mask_t (*apicid_to_cpu_present)(int phys_apicid);
|
2008-03-23 04:02:13 -04:00
|
|
|
void (*setup_portio_remap)(void);
|
2005-04-16 18:20:36 -04:00
|
|
|
int (*check_phys_apicid_present)(int boot_cpu_physical_apicid);
|
|
|
|
void (*enable_apic_mode)(void);
|
|
|
|
u32 (*phys_pkg_id)(u32 cpuid_apic, int index_msb);
|
|
|
|
|
|
|
|
/* mpparse */
|
|
|
|
/* When one of the next two hooks returns 1 the genapic
|
2008-03-23 04:02:13 -04:00
|
|
|
is switched to this. Essentially they are additional probe
|
2005-04-16 18:20:36 -04:00
|
|
|
functions. */
|
2009-01-03 05:16:57 -05:00
|
|
|
int (*mps_oem_check)(struct mpc_table *mpc, char *oem,
|
2008-03-23 04:02:13 -04:00
|
|
|
char *productid);
|
2005-04-16 18:20:36 -04:00
|
|
|
int (*acpi_madt_oem_check)(char *oem_id, char *oem_table_id);
|
|
|
|
|
|
|
|
unsigned (*get_apic_id)(unsigned long x);
|
|
|
|
unsigned long apic_id_mask;
|
2008-12-16 20:33:59 -05:00
|
|
|
unsigned int (*cpu_mask_to_apicid)(const struct cpumask *cpumask);
|
2008-12-16 20:33:55 -05:00
|
|
|
unsigned int (*cpu_mask_to_apicid_and)(const struct cpumask *cpumask,
|
|
|
|
const struct cpumask *andmask);
|
2008-12-16 20:33:59 -05:00
|
|
|
void (*vector_allocation_domain)(int cpu, struct cpumask *retmask);
|
2006-09-26 04:52:26 -04:00
|
|
|
|
|
|
|
#ifdef CONFIG_SMP
|
2005-04-16 18:20:36 -04:00
|
|
|
/* ipi */
|
2008-12-16 20:33:59 -05:00
|
|
|
void (*send_IPI_mask)(const struct cpumask *mask, int vector);
|
|
|
|
void (*send_IPI_mask_allbutself)(const struct cpumask *mask,
|
|
|
|
int vector);
|
2005-04-16 18:20:36 -04:00
|
|
|
void (*send_IPI_allbutself)(int vector);
|
|
|
|
void (*send_IPI_all)(int vector);
|
2006-09-26 04:52:26 -04:00
|
|
|
#endif
|
2008-11-17 18:19:53 -05:00
|
|
|
int (*wakeup_cpu)(int apicid, unsigned long start_eip);
|
x86: fix wakeup_cpu with numaq/es7000, v2
Impact: fix secondary-CPU wakeup/init path with numaq and es7000
While looking at wakeup_secondary_cpu for WAKE_SECONDARY_VIA_NMI:
|#ifdef WAKE_SECONDARY_VIA_NMI
|/*
| * Poke the other CPU in the eye via NMI to wake it up. Remember that the normal
| * INIT, INIT, STARTUP sequence will reset the chip hard for us, and this
| * won't ... remember to clear down the APIC, etc later.
| */
|static int __devinit
|wakeup_secondary_cpu(int logical_apicid, unsigned long start_eip)
|{
| unsigned long send_status, accept_status = 0;
| int maxlvt;
|...
| if (APIC_INTEGRATED(apic_version[phys_apicid])) {
| maxlvt = lapic_get_maxlvt();
I noticed that there is no warning about undefined phys_apicid...
because WAKE_SECONDARY_VIA_NMI and WAKE_SECONDARY_VIA_INIT can not be
defined at the same time. So NUMAQ is using wrong wakeup_secondary_cpu.
WAKE_SECONDARY_VIA_NMI, WAKE_SECONDARY_VIA_INIT and
WAKE_SECONDARY_VIA_MIP are variants of a weird and fragile
preprocessor-driven "HAL" mechanisms to specify the kind of secondary-CPU
wakeup strategy a given x86 kernel will use.
The vast majority of systems want to use INIT for secondary wakeup - NUMAQ
uses an NMI, (old-style-) ES7000 uses 'MIP' (a firmware driven in-memory
flag to let secondaries continue).
So convert these mechanisms to x86_quirks and add a
->wakeup_secondary_cpu() method to specify the rare exception
to the sane default.
Extend genapic accordingly as well, for 32-bit.
While looking further, I noticed that functions in wakecup.h for numaq
and es7000 are different to the default in mach_wakecpu.h - but smpboot.c
will only use default mach_wakecpu.h with smphook.h.
So we need to add mach_wakecpu.h for mach_generic, to properly support
numaq and es7000, and vectorize the following SMP init methods:
int trampoline_phys_low;
int trampoline_phys_high;
void (*wait_for_init_deassert)(atomic_t *deassert);
void (*smp_callin_clear_local_apic)(void);
void (*store_NMI_vector)(unsigned short *high, unsigned short *low);
void (*restore_NMI_vector)(unsigned short *high, unsigned short *low);
void (*inquire_remote_apic)(int apicid);
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-11-16 06:12:49 -05:00
|
|
|
int trampoline_phys_low;
|
|
|
|
int trampoline_phys_high;
|
|
|
|
void (*wait_for_init_deassert)(atomic_t *deassert);
|
|
|
|
void (*smp_callin_clear_local_apic)(void);
|
|
|
|
void (*store_NMI_vector)(unsigned short *high, unsigned short *low);
|
|
|
|
void (*restore_NMI_vector)(unsigned short *high, unsigned short *low);
|
|
|
|
void (*inquire_remote_apic)(int apicid);
|
2008-03-23 04:02:13 -04:00
|
|
|
};
|
2005-04-16 18:20:36 -04:00
|
|
|
|
2006-09-26 04:52:26 -04:00
|
|
|
#define APICFUNC(x) .x = x,
|
|
|
|
|
|
|
|
/* More functions could be probably marked IPIFUNC and save some space
|
|
|
|
in UP GENERICARCH kernels, but I don't have the nerve right now
|
|
|
|
to untangle this mess. -AK */
|
|
|
|
#ifdef CONFIG_SMP
|
|
|
|
#define IPIFUNC(x) APICFUNC(x)
|
|
|
|
#else
|
|
|
|
#define IPIFUNC(x)
|
|
|
|
#endif
|
2005-04-16 18:20:36 -04:00
|
|
|
|
2008-03-23 04:02:13 -04:00
|
|
|
#define APIC_INIT(aname, aprobe) \
|
|
|
|
{ \
|
|
|
|
.name = aname, \
|
|
|
|
.probe = aprobe, \
|
|
|
|
.int_delivery_mode = INT_DELIVERY_MODE, \
|
|
|
|
.int_dest_mode = INT_DEST_MODE, \
|
|
|
|
.no_balance_irq = NO_BALANCE_IRQ, \
|
|
|
|
.ESR_DISABLE = esr_disable, \
|
|
|
|
.apic_destination_logical = APIC_DEST_LOGICAL, \
|
|
|
|
APICFUNC(apic_id_registered) \
|
|
|
|
APICFUNC(target_cpus) \
|
|
|
|
APICFUNC(check_apicid_used) \
|
|
|
|
APICFUNC(check_apicid_present) \
|
|
|
|
APICFUNC(init_apic_ldr) \
|
|
|
|
APICFUNC(ioapic_phys_id_map) \
|
|
|
|
APICFUNC(setup_apic_routing) \
|
|
|
|
APICFUNC(multi_timer_check) \
|
|
|
|
APICFUNC(apicid_to_node) \
|
|
|
|
APICFUNC(cpu_to_logical_apicid) \
|
|
|
|
APICFUNC(cpu_present_to_apicid) \
|
|
|
|
APICFUNC(apicid_to_cpu_present) \
|
|
|
|
APICFUNC(setup_portio_remap) \
|
|
|
|
APICFUNC(check_phys_apicid_present) \
|
|
|
|
APICFUNC(mps_oem_check) \
|
|
|
|
APICFUNC(get_apic_id) \
|
|
|
|
.apic_id_mask = APIC_ID_MASK, \
|
|
|
|
APICFUNC(cpu_mask_to_apicid) \
|
2008-12-16 20:33:54 -05:00
|
|
|
APICFUNC(cpu_mask_to_apicid_and) \
|
x86: fix wakeup_cpu with numaq/es7000, v2
Impact: fix secondary-CPU wakeup/init path with numaq and es7000
While looking at wakeup_secondary_cpu for WAKE_SECONDARY_VIA_NMI:
|#ifdef WAKE_SECONDARY_VIA_NMI
|/*
| * Poke the other CPU in the eye via NMI to wake it up. Remember that the normal
| * INIT, INIT, STARTUP sequence will reset the chip hard for us, and this
| * won't ... remember to clear down the APIC, etc later.
| */
|static int __devinit
|wakeup_secondary_cpu(int logical_apicid, unsigned long start_eip)
|{
| unsigned long send_status, accept_status = 0;
| int maxlvt;
|...
| if (APIC_INTEGRATED(apic_version[phys_apicid])) {
| maxlvt = lapic_get_maxlvt();
I noticed that there is no warning about undefined phys_apicid...
because WAKE_SECONDARY_VIA_NMI and WAKE_SECONDARY_VIA_INIT can not be
defined at the same time. So NUMAQ is using wrong wakeup_secondary_cpu.
WAKE_SECONDARY_VIA_NMI, WAKE_SECONDARY_VIA_INIT and
WAKE_SECONDARY_VIA_MIP are variants of a weird and fragile
preprocessor-driven "HAL" mechanisms to specify the kind of secondary-CPU
wakeup strategy a given x86 kernel will use.
The vast majority of systems want to use INIT for secondary wakeup - NUMAQ
uses an NMI, (old-style-) ES7000 uses 'MIP' (a firmware driven in-memory
flag to let secondaries continue).
So convert these mechanisms to x86_quirks and add a
->wakeup_secondary_cpu() method to specify the rare exception
to the sane default.
Extend genapic accordingly as well, for 32-bit.
While looking further, I noticed that functions in wakecup.h for numaq
and es7000 are different to the default in mach_wakecpu.h - but smpboot.c
will only use default mach_wakecpu.h with smphook.h.
So we need to add mach_wakecpu.h for mach_generic, to properly support
numaq and es7000, and vectorize the following SMP init methods:
int trampoline_phys_low;
int trampoline_phys_high;
void (*wait_for_init_deassert)(atomic_t *deassert);
void (*smp_callin_clear_local_apic)(void);
void (*store_NMI_vector)(unsigned short *high, unsigned short *low);
void (*restore_NMI_vector)(unsigned short *high, unsigned short *low);
void (*inquire_remote_apic)(int apicid);
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-11-16 06:12:49 -05:00
|
|
|
APICFUNC(vector_allocation_domain) \
|
2008-03-23 04:02:13 -04:00
|
|
|
APICFUNC(acpi_madt_oem_check) \
|
|
|
|
IPIFUNC(send_IPI_mask) \
|
|
|
|
IPIFUNC(send_IPI_allbutself) \
|
|
|
|
IPIFUNC(send_IPI_all) \
|
|
|
|
APICFUNC(enable_apic_mode) \
|
|
|
|
APICFUNC(phys_pkg_id) \
|
x86: fix wakeup_cpu with numaq/es7000, v2
Impact: fix secondary-CPU wakeup/init path with numaq and es7000
While looking at wakeup_secondary_cpu for WAKE_SECONDARY_VIA_NMI:
|#ifdef WAKE_SECONDARY_VIA_NMI
|/*
| * Poke the other CPU in the eye via NMI to wake it up. Remember that the normal
| * INIT, INIT, STARTUP sequence will reset the chip hard for us, and this
| * won't ... remember to clear down the APIC, etc later.
| */
|static int __devinit
|wakeup_secondary_cpu(int logical_apicid, unsigned long start_eip)
|{
| unsigned long send_status, accept_status = 0;
| int maxlvt;
|...
| if (APIC_INTEGRATED(apic_version[phys_apicid])) {
| maxlvt = lapic_get_maxlvt();
I noticed that there is no warning about undefined phys_apicid...
because WAKE_SECONDARY_VIA_NMI and WAKE_SECONDARY_VIA_INIT can not be
defined at the same time. So NUMAQ is using wrong wakeup_secondary_cpu.
WAKE_SECONDARY_VIA_NMI, WAKE_SECONDARY_VIA_INIT and
WAKE_SECONDARY_VIA_MIP are variants of a weird and fragile
preprocessor-driven "HAL" mechanisms to specify the kind of secondary-CPU
wakeup strategy a given x86 kernel will use.
The vast majority of systems want to use INIT for secondary wakeup - NUMAQ
uses an NMI, (old-style-) ES7000 uses 'MIP' (a firmware driven in-memory
flag to let secondaries continue).
So convert these mechanisms to x86_quirks and add a
->wakeup_secondary_cpu() method to specify the rare exception
to the sane default.
Extend genapic accordingly as well, for 32-bit.
While looking further, I noticed that functions in wakecup.h for numaq
and es7000 are different to the default in mach_wakecpu.h - but smpboot.c
will only use default mach_wakecpu.h with smphook.h.
So we need to add mach_wakecpu.h for mach_generic, to properly support
numaq and es7000, and vectorize the following SMP init methods:
int trampoline_phys_low;
int trampoline_phys_high;
void (*wait_for_init_deassert)(atomic_t *deassert);
void (*smp_callin_clear_local_apic)(void);
void (*store_NMI_vector)(unsigned short *high, unsigned short *low);
void (*restore_NMI_vector)(unsigned short *high, unsigned short *low);
void (*inquire_remote_apic)(int apicid);
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-11-16 06:12:49 -05:00
|
|
|
.trampoline_phys_low = TRAMPOLINE_PHYS_LOW, \
|
|
|
|
.trampoline_phys_high = TRAMPOLINE_PHYS_HIGH, \
|
|
|
|
APICFUNC(wait_for_init_deassert) \
|
|
|
|
APICFUNC(smp_callin_clear_local_apic) \
|
|
|
|
APICFUNC(store_NMI_vector) \
|
|
|
|
APICFUNC(restore_NMI_vector) \
|
|
|
|
APICFUNC(inquire_remote_apic) \
|
2008-03-23 04:02:13 -04:00
|
|
|
}
|
2005-04-16 18:20:36 -04:00
|
|
|
|
2007-05-02 13:27:04 -04:00
|
|
|
extern struct genapic *genapic;
|
2008-11-18 11:14:14 -05:00
|
|
|
extern void es7000_update_genapic_to_cluster(void);
|
2005-04-16 18:20:36 -04:00
|
|
|
|
2008-03-28 15:12:06 -04:00
|
|
|
enum uv_system_type {UV_NONE, UV_LEGACY_APIC, UV_X2APIC, UV_NON_UNIQUE_APIC};
|
|
|
|
#define get_uv_system_type() UV_NONE
|
|
|
|
#define is_uv_system() 0
|
2008-04-16 12:45:15 -04:00
|
|
|
#define uv_wakeup_secondary(a, b) 1
|
2008-08-21 14:49:05 -04:00
|
|
|
#define uv_system_init() do {} while (0)
|
2008-03-28 15:12:06 -04:00
|
|
|
|
|
|
|
|
2008-10-23 01:26:29 -04:00
|
|
|
#endif /* _ASM_X86_GENAPIC_32_H */
|