2005-04-16 18:20:36 -04:00
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/* enternow_pci.c,v 0.99 2001/10/02
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*
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* enternow_pci.c Card-specific routines for
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* Formula-n enter:now ISDN PCI ab
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* Gerdes AG Power ISDN PCI
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* Woerltronic SA 16 PCI
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* (based on HiSax driver by Karsten Keil)
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*
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* Author Christoph Ersfeld <info@formula-n.de>
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* Formula-n Europe AG (www.formula-n.com)
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* previously Gerdes AG
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*
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*
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* This file is (c) under GNU PUBLIC LICENSE
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*
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* Notes:
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* This driver interfaces to netjet.c which performs B-channel
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* processing.
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*
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* Version 0.99 is the first release of this driver and there are
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* certainly a few bugs.
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* It isn't testet on linux 2.4 yet, so consider this code to be
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* beta.
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*
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* Please don't report me any malfunction without sending
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* (compressed) debug-logs.
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* It would be nearly impossible to retrace it.
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*
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* Log D-channel-processing as follows:
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*
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* 1. Load hisax with card-specific parameters, this example ist for
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* Formula-n enter:now ISDN PCI and compatible
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* (f.e. Gerdes Power ISDN PCI)
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*
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* modprobe hisax type=41 protocol=2 id=gerdes
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*
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* if you chose an other value for id, you need to modify the
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* code below, too.
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*
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* 2. set debug-level
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*
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* hisaxctrl gerdes 1 0x3ff
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* hisaxctrl gerdes 11 0x4f
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* cat /dev/isdnctrl >> ~/log &
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*
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* Please take also a look into /var/log/messages if there is
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* anything importand concerning HISAX.
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*
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*
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* Credits:
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* Programming the driver for Formula-n enter:now ISDN PCI and
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* necessary the driver for the used Amd 7930 D-channel-controller
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* was spnsored by Formula-n Europe AG.
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* Thanks to Karsten Keil and Petr Novak, who gave me support in
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* Hisax-specific questions.
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* I want so say special thanks to Carl-Friedrich Braun, who had to
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* answer a lot of questions about generally ISDN and about handling
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* of the Amd-Chip.
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*
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*/
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#include "hisax.h"
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#include "isac.h"
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#include "isdnl1.h"
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#include "amd7930_fn.h"
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#include <linux/interrupt.h>
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#include <linux/ppp_defs.h>
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#include <linux/pci.h>
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#include <linux/init.h>
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#include "netjet.h"
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2005-06-25 17:59:18 -04:00
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static const char *enternow_pci_rev = "$Revision: 1.1.4.5 $";
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/* f<>r PowerISDN PCI */
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#define TJ_AMD_IRQ 0x20
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#define TJ_LED1 0x40
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#define TJ_LED2 0x80
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/* Das Fenster zum AMD...
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* Ab Adresse hw.njet.base + TJ_AMD_PORT werden vom AMD jeweils 8 Bit in
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* den TigerJet i/o-Raum gemappt
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* -> 0x01 des AMD bei hw.njet.base + 0C4 */
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#define TJ_AMD_PORT 0xC0
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2005-04-16 18:20:36 -04:00
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/* *************************** I/O-Interface functions ************************************* */
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/* cs->readisac, macro rByteAMD */
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2005-06-25 17:59:18 -04:00
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static unsigned char
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ReadByteAmd7930(struct IsdnCardState *cs, unsigned char offset)
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2005-04-16 18:20:36 -04:00
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{
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/* direktes Register */
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if(offset < 8)
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2005-06-25 17:59:18 -04:00
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return (inb(cs->hw.njet.isac + 4*offset));
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2005-04-16 18:20:36 -04:00
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/* indirektes Register */
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else {
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2005-06-25 17:59:18 -04:00
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outb(offset, cs->hw.njet.isac + 4*AMD_CR);
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return(inb(cs->hw.njet.isac + 4*AMD_DR));
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2005-04-16 18:20:36 -04:00
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}
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}
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/* cs->writeisac, macro wByteAMD */
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2005-06-25 17:59:18 -04:00
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static void
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WriteByteAmd7930(struct IsdnCardState *cs, unsigned char offset, unsigned char value)
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2005-04-16 18:20:36 -04:00
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{
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/* direktes Register */
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if(offset < 8)
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2005-06-25 17:59:18 -04:00
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outb(value, cs->hw.njet.isac + 4*offset);
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2005-04-16 18:20:36 -04:00
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/* indirektes Register */
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else {
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2005-06-25 17:59:18 -04:00
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outb(offset, cs->hw.njet.isac + 4*AMD_CR);
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outb(value, cs->hw.njet.isac + 4*AMD_DR);
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2005-04-16 18:20:36 -04:00
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}
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}
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2005-06-25 17:59:18 -04:00
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static void
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enpci_setIrqMask(struct IsdnCardState *cs, unsigned char val) {
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2005-04-16 18:20:36 -04:00
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if (!val)
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2005-06-25 17:59:18 -04:00
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outb(0x00, cs->hw.njet.base+NETJET_IRQMASK1);
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2005-04-16 18:20:36 -04:00
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else
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2005-06-25 17:59:18 -04:00
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outb(TJ_AMD_IRQ, cs->hw.njet.base+NETJET_IRQMASK1);
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2005-04-16 18:20:36 -04:00
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}
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2005-06-25 17:59:18 -04:00
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static unsigned char dummyrr(struct IsdnCardState *cs, int chan, unsigned char off)
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2005-04-16 18:20:36 -04:00
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{
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return(5);
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}
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2005-06-25 17:59:18 -04:00
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static void dummywr(struct IsdnCardState *cs, int chan, unsigned char off, unsigned char value)
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2005-04-16 18:20:36 -04:00
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{
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}
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/* ******************************************************************************** */
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static void
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reset_enpci(struct IsdnCardState *cs)
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{
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if (cs->debug & L1_DEB_ISAC)
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debugl1(cs, "enter:now PCI: reset");
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/* Reset on, (also for AMD) */
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cs->hw.njet.ctrl_reg = 0x07;
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2005-06-25 17:59:18 -04:00
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outb(cs->hw.njet.ctrl_reg, cs->hw.njet.base + NETJET_CTRL);
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2005-04-16 18:20:36 -04:00
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mdelay(20);
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/* Reset off */
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cs->hw.njet.ctrl_reg = 0x30;
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2005-06-25 17:59:18 -04:00
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outb(cs->hw.njet.ctrl_reg, cs->hw.njet.base + NETJET_CTRL);
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2005-04-16 18:20:36 -04:00
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/* 20ms delay */
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mdelay(20);
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cs->hw.njet.auxd = 0; // LED-status
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cs->hw.njet.dmactrl = 0;
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2005-06-25 17:59:18 -04:00
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outb(~TJ_AMD_IRQ, cs->hw.njet.base + NETJET_AUXCTRL);
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outb(TJ_AMD_IRQ, cs->hw.njet.base + NETJET_IRQMASK1);
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outb(cs->hw.njet.auxd, cs->hw.njet.auxa); // LED off
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2005-04-16 18:20:36 -04:00
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}
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static int
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enpci_card_msg(struct IsdnCardState *cs, int mt, void *arg)
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{
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u_long flags;
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2005-06-25 17:59:18 -04:00
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unsigned char *chan;
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2005-04-16 18:20:36 -04:00
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if (cs->debug & L1_DEB_ISAC)
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debugl1(cs, "enter:now PCI: card_msg: 0x%04X", mt);
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switch (mt) {
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case CARD_RESET:
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spin_lock_irqsave(&cs->lock, flags);
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reset_enpci(cs);
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Amd7930_init(cs);
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spin_unlock_irqrestore(&cs->lock, flags);
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break;
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case CARD_RELEASE:
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release_io_netjet(cs);
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break;
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case CARD_INIT:
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reset_enpci(cs);
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inittiger(cs);
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/* irq must be on here */
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Amd7930_init(cs);
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break;
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case CARD_TEST:
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break;
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case MDL_ASSIGN:
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/* TEI assigned, LED1 on */
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cs->hw.njet.auxd = TJ_AMD_IRQ << 1;
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2005-06-25 17:59:18 -04:00
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outb(cs->hw.njet.auxd, cs->hw.njet.base + NETJET_AUXDATA);
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2005-04-16 18:20:36 -04:00
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break;
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case MDL_REMOVE:
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/* TEI removed, LEDs off */
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cs->hw.njet.auxd = 0;
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2005-06-25 17:59:18 -04:00
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outb(0x00, cs->hw.njet.base + NETJET_AUXDATA);
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2005-04-16 18:20:36 -04:00
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break;
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case MDL_BC_ASSIGN:
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/* activate B-channel */
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2005-06-25 17:59:18 -04:00
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chan = (unsigned char *)arg;
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2005-04-16 18:20:36 -04:00
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if (cs->debug & L1_DEB_ISAC)
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debugl1(cs, "enter:now PCI: assign phys. BC %d in AMD LMR1", *chan);
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cs->dc.amd7930.ph_command(cs, (cs->dc.amd7930.lmr1 | (*chan + 1)), "MDL_BC_ASSIGN");
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/* at least one b-channel in use, LED 2 on */
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cs->hw.njet.auxd |= TJ_AMD_IRQ << 2;
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2005-06-25 17:59:18 -04:00
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outb(cs->hw.njet.auxd, cs->hw.njet.base + NETJET_AUXDATA);
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2005-04-16 18:20:36 -04:00
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break;
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case MDL_BC_RELEASE:
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/* deactivate B-channel */
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2005-06-25 17:59:18 -04:00
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chan = (unsigned char *)arg;
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2005-04-16 18:20:36 -04:00
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if (cs->debug & L1_DEB_ISAC)
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debugl1(cs, "enter:now PCI: release phys. BC %d in Amd LMR1", *chan);
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cs->dc.amd7930.ph_command(cs, (cs->dc.amd7930.lmr1 & ~(*chan + 1)), "MDL_BC_RELEASE");
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/* no b-channel active -> LED2 off */
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if (!(cs->dc.amd7930.lmr1 & 3)) {
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cs->hw.njet.auxd &= ~(TJ_AMD_IRQ << 2);
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2005-06-25 17:59:18 -04:00
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outb(cs->hw.njet.auxd, cs->hw.njet.base + NETJET_AUXDATA);
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2005-04-16 18:20:36 -04:00
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}
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break;
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default:
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break;
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}
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return(0);
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}
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static irqreturn_t
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enpci_interrupt(int intno, void *dev_id, struct pt_regs *regs)
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{
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struct IsdnCardState *cs = dev_id;
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2005-06-25 17:59:18 -04:00
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unsigned char s0val, s1val, ir;
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2005-04-16 18:20:36 -04:00
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u_long flags;
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spin_lock_irqsave(&cs->lock, flags);
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2005-06-25 17:59:18 -04:00
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s1val = inb(cs->hw.njet.base + NETJET_IRQSTAT1);
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2005-04-16 18:20:36 -04:00
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/* AMD threw an interrupt */
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if (!(s1val & TJ_AMD_IRQ)) {
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/* read and clear interrupt-register */
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ir = ReadByteAmd7930(cs, 0x00);
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Amd7930_interrupt(cs, ir);
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s1val = 1;
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} else
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s1val = 0;
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2005-06-25 17:59:18 -04:00
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s0val = inb(cs->hw.njet.base + NETJET_IRQSTAT0);
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2005-04-16 18:20:36 -04:00
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if ((s0val | s1val)==0) { // shared IRQ
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spin_unlock_irqrestore(&cs->lock, flags);
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return IRQ_NONE;
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}
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if (s0val)
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2005-06-25 17:59:18 -04:00
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outb(s0val, cs->hw.njet.base + NETJET_IRQSTAT0);
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2005-04-16 18:20:36 -04:00
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/* DMA-Interrupt: B-channel-stuff */
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/* set bits in sval to indicate which page is free */
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if (inl(cs->hw.njet.base + NETJET_DMA_WRITE_ADR) <
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inl(cs->hw.njet.base + NETJET_DMA_WRITE_IRQ))
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/* the 2nd write page is free */
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s0val = 0x08;
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else /* the 1st write page is free */
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s0val = 0x04;
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if (inl(cs->hw.njet.base + NETJET_DMA_READ_ADR) <
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inl(cs->hw.njet.base + NETJET_DMA_READ_IRQ))
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/* the 2nd read page is free */
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s0val = s0val | 0x02;
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else /* the 1st read page is free */
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s0val = s0val | 0x01;
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if (s0val != cs->hw.njet.last_is0) /* we have a DMA interrupt */
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{
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if (test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
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spin_unlock_irqrestore(&cs->lock, flags);
|
|
|
|
|
return IRQ_HANDLED;
|
|
|
|
|
}
|
|
|
|
|
cs->hw.njet.irqstat0 = s0val;
|
|
|
|
|
if ((cs->hw.njet.irqstat0 & NETJET_IRQM0_READ) !=
|
|
|
|
|
(cs->hw.njet.last_is0 & NETJET_IRQM0_READ))
|
|
|
|
|
/* we have a read dma int */
|
|
|
|
|
read_tiger(cs);
|
|
|
|
|
if ((cs->hw.njet.irqstat0 & NETJET_IRQM0_WRITE) !=
|
|
|
|
|
(cs->hw.njet.last_is0 & NETJET_IRQM0_WRITE))
|
|
|
|
|
/* we have a write dma int */
|
|
|
|
|
write_tiger(cs);
|
|
|
|
|
test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
|
|
|
|
|
}
|
|
|
|
|
spin_unlock_irqrestore(&cs->lock, flags);
|
|
|
|
|
return IRQ_HANDLED;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
static struct pci_dev *dev_netjet __initdata = NULL;
|
|
|
|
|
|
|
|
|
|
/* called by config.c */
|
|
|
|
|
int __init
|
|
|
|
|
setup_enternow_pci(struct IsdnCard *card)
|
|
|
|
|
{
|
|
|
|
|
int bytecnt;
|
|
|
|
|
struct IsdnCardState *cs = card->cs;
|
|
|
|
|
char tmp[64];
|
|
|
|
|
|
|
|
|
|
#ifdef CONFIG_PCI
|
|
|
|
|
#ifdef __BIG_ENDIAN
|
|
|
|
|
#error "not running on big endian machines now"
|
|
|
|
|
#endif
|
|
|
|
|
strcpy(tmp, enternow_pci_rev);
|
|
|
|
|
printk(KERN_INFO "HiSax: Formula-n Europe AG enter:now ISDN PCI driver Rev. %s\n", HiSax_getrev(tmp));
|
|
|
|
|
if (cs->typ != ISDN_CTYPE_ENTERNOW)
|
|
|
|
|
return(0);
|
|
|
|
|
test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
|
|
|
|
|
|
|
|
|
|
for ( ;; )
|
|
|
|
|
{
|
|
|
|
|
if ((dev_netjet = pci_find_device(PCI_VENDOR_ID_TIGERJET,
|
|
|
|
|
PCI_DEVICE_ID_TIGERJET_300, dev_netjet))) {
|
|
|
|
|
if (pci_enable_device(dev_netjet))
|
|
|
|
|
return(0);
|
|
|
|
|
cs->irq = dev_netjet->irq;
|
|
|
|
|
if (!cs->irq) {
|
|
|
|
|
printk(KERN_WARNING "enter:now PCI: No IRQ for PCI card found\n");
|
|
|
|
|
return(0);
|
|
|
|
|
}
|
|
|
|
|
cs->hw.njet.base = pci_resource_start(dev_netjet, 0);
|
|
|
|
|
if (!cs->hw.njet.base) {
|
|
|
|
|
printk(KERN_WARNING "enter:now PCI: No IO-Adr for PCI card found\n");
|
|
|
|
|
return(0);
|
|
|
|
|
}
|
|
|
|
|
/* checks Sub-Vendor ID because system crashes with Traverse-Card */
|
|
|
|
|
if ((dev_netjet->subsystem_vendor != 0x55) ||
|
|
|
|
|
(dev_netjet->subsystem_device != 0x02)) {
|
|
|
|
|
printk(KERN_WARNING "enter:now: You tried to load this driver with an incompatible TigerJet-card\n");
|
|
|
|
|
printk(KERN_WARNING "Use type=20 for Traverse NetJet PCI Card.\n");
|
|
|
|
|
return(0);
|
|
|
|
|
}
|
|
|
|
|
} else {
|
|
|
|
|
printk(KERN_WARNING "enter:now PCI: No PCI card found\n");
|
|
|
|
|
return(0);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
cs->hw.njet.auxa = cs->hw.njet.base + NETJET_AUXDATA;
|
|
|
|
|
cs->hw.njet.isac = cs->hw.njet.base + 0xC0; // Fenster zum AMD
|
|
|
|
|
|
|
|
|
|
/* Reset an */
|
|
|
|
|
cs->hw.njet.ctrl_reg = 0x07; // ge<67>ndert von 0xff
|
2005-06-25 17:59:18 -04:00
|
|
|
|
outb(cs->hw.njet.ctrl_reg, cs->hw.njet.base + NETJET_CTRL);
|
2005-04-16 18:20:36 -04:00
|
|
|
|
/* 20 ms Pause */
|
|
|
|
|
mdelay(20);
|
|
|
|
|
|
|
|
|
|
cs->hw.njet.ctrl_reg = 0x30; /* Reset Off and status read clear */
|
2005-06-25 17:59:18 -04:00
|
|
|
|
outb(cs->hw.njet.ctrl_reg, cs->hw.njet.base + NETJET_CTRL);
|
2005-04-16 18:20:36 -04:00
|
|
|
|
mdelay(10);
|
|
|
|
|
|
|
|
|
|
cs->hw.njet.auxd = 0x00; // war 0xc0
|
|
|
|
|
cs->hw.njet.dmactrl = 0;
|
|
|
|
|
|
2005-06-25 17:59:18 -04:00
|
|
|
|
outb(~TJ_AMD_IRQ, cs->hw.njet.base + NETJET_AUXCTRL);
|
|
|
|
|
outb(TJ_AMD_IRQ, cs->hw.njet.base + NETJET_IRQMASK1);
|
|
|
|
|
outb(cs->hw.njet.auxd, cs->hw.njet.auxa);
|
2005-04-16 18:20:36 -04:00
|
|
|
|
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
#else
|
|
|
|
|
|
|
|
|
|
printk(KERN_WARNING "enter:now PCI: NO_PCI_BIOS\n");
|
|
|
|
|
printk(KERN_WARNING "enter:now PCI: unable to config Formula-n enter:now ISDN PCI ab\n");
|
|
|
|
|
return (0);
|
|
|
|
|
|
|
|
|
|
#endif /* CONFIG_PCI */
|
|
|
|
|
|
|
|
|
|
bytecnt = 256;
|
|
|
|
|
|
|
|
|
|
printk(KERN_INFO
|
|
|
|
|
"enter:now PCI: PCI card configured at 0x%lx IRQ %d\n",
|
|
|
|
|
cs->hw.njet.base, cs->irq);
|
|
|
|
|
if (!request_region(cs->hw.njet.base, bytecnt, "Fn_ISDN")) {
|
|
|
|
|
printk(KERN_WARNING
|
|
|
|
|
"HiSax: %s config port %lx-%lx already in use\n",
|
|
|
|
|
CardType[card->typ],
|
|
|
|
|
cs->hw.njet.base,
|
|
|
|
|
cs->hw.njet.base + bytecnt);
|
|
|
|
|
return (0);
|
|
|
|
|
}
|
|
|
|
|
setup_Amd7930(cs);
|
|
|
|
|
cs->hw.njet.last_is0 = 0;
|
|
|
|
|
/* macro rByteAMD */
|
|
|
|
|
cs->readisac = &ReadByteAmd7930;
|
|
|
|
|
/* macro wByteAMD */
|
|
|
|
|
cs->writeisac = &WriteByteAmd7930;
|
|
|
|
|
cs->dc.amd7930.setIrqMask = &enpci_setIrqMask;
|
|
|
|
|
|
|
|
|
|
cs->BC_Read_Reg = &dummyrr;
|
|
|
|
|
cs->BC_Write_Reg = &dummywr;
|
|
|
|
|
cs->BC_Send_Data = &netjet_fill_dma;
|
|
|
|
|
cs->cardmsg = &enpci_card_msg;
|
|
|
|
|
cs->irq_func = &enpci_interrupt;
|
2006-07-01 22:29:36 -04:00
|
|
|
|
cs->irq_flags |= IRQF_SHARED;
|
2005-04-16 18:20:36 -04:00
|
|
|
|
|
|
|
|
|
return (1);
|
|
|
|
|
}
|