android_kernel_xiaomi_sm8350/include/asm-avr32/arch-at32ap/irq.h

#ifndef __ASM_AVR32_ARCH_IRQ_H
#define __ASM_AVR32_ARCH_IRQ_H

#define EIM_IRQ_BASE	NR_INTERNAL_IRQS
#define NR_EIM_IRQS	32

#define AT32_EXTINT(n)	(EIM_IRQ_BASE + (n))

#define GPIO_IRQ_BASE	(EIM_IRQ_BASE + NR_EIM_IRQS)
#define NR_GPIO_IRQS	(5 * 32)

#define NR_IRQS		(GPIO_IRQ_BASE + NR_GPIO_IRQS)

#endif /* __ASM_AVR32_ARCH_IRQ_H */
[AVR32] GPIO API implementation Arch-neutral GPIO calls for AVR32. GPIO IRQ support written by David Brownell. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> 2007-02-05 10:57:13 -05:00			`#ifndef __ASM_AVR32_ARCH_IRQ_H`
			`#define __ASM_AVR32_ARCH_IRQ_H`

			`#define EIM_IRQ_BASE NR_INTERNAL_IRQS`
			`#define NR_EIM_IRQS 32`

			`#define AT32_EXTINT(n) (EIM_IRQ_BASE + (n))`

			`#define GPIO_IRQ_BASE (EIM_IRQ_BASE + NR_EIM_IRQS)`
[AVR32] Add PIOE device and reserve SDRAM pins The PIOE device was left out before because it muxes SDRAM pins (and is therefore a bit dangerous to mess with) and because no existing drivers had any use for it. It is needed for CompactFlash, however, and now that we have a way to protect the SDRAM pins, it can be safely added. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> 2007-01-30 05:16:16 -05:00			`#define NR_GPIO_IRQS (5 * 32)`
[AVR32] GPIO API implementation Arch-neutral GPIO calls for AVR32. GPIO IRQ support written by David Brownell. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> 2007-02-05 10:57:13 -05:00
			`#define NR_IRQS (GPIO_IRQ_BASE + NR_GPIO_IRQS)`

			`#endif /* __ASM_AVR32_ARCH_IRQ_H */`