2006-01-14 16:20:50 -05:00
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/*
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* mpc83xx_wdt.c - MPC83xx watchdog userspace interface
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*
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* Authors: Dave Updegraff <dave@cray.org>
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* Kumar Gala <galak@kernel.crashing.org>
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* Attribution: from 83xx_wst: Florian Schirmer <jolt@tuxbox.org>
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* ..and from sc520_wdt
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*
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* Note: it appears that you can only actually ENABLE or DISABLE the thing
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* once after POR. Once enabled, you cannot disable, and vice versa.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/fs.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/miscdevice.h>
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#include <linux/platform_device.h>
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#include <linux/module.h>
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#include <linux/watchdog.h>
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#include <asm/io.h>
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#include <asm/uaccess.h>
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struct mpc83xx_wdt {
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__be32 res0;
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__be32 swcrr; /* System watchdog control register */
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#define SWCRR_SWTC 0xFFFF0000 /* Software Watchdog Time Count. */
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#define SWCRR_SWEN 0x00000004 /* Watchdog Enable bit. */
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#define SWCRR_SWRI 0x00000002 /* Software Watchdog Reset/Interrupt Select bit.*/
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#define SWCRR_SWPR 0x00000001 /* Software Watchdog Counter Prescale bit. */
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__be32 swcnr; /* System watchdog count register */
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u8 res1[2];
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__be16 swsrr; /* System watchdog service register */
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u8 res2[0xF0];
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};
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static struct mpc83xx_wdt __iomem *wd_base;
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static u16 timeout = 0xffff;
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module_param(timeout, ushort, 0);
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MODULE_PARM_DESC(timeout, "Watchdog timeout in ticks. (0<timeout<65536, default=65535");
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static int reset = 1;
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module_param(reset, bool, 0);
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MODULE_PARM_DESC(reset, "Watchdog Interrupt/Reset Mode. 0 = interrupt, 1 = reset");
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/*
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* We always prescale, but if someone really doesn't want to they can set this
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* to 0
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*/
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static int prescale = 1;
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static unsigned int timeout_sec;
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static unsigned long wdt_is_open;
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static spinlock_t wdt_spinlock;
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static void mpc83xx_wdt_keepalive(void)
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{
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/* Ping the WDT */
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spin_lock(&wdt_spinlock);
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out_be16(&wd_base->swsrr, 0x556c);
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out_be16(&wd_base->swsrr, 0xaa39);
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spin_unlock(&wdt_spinlock);
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}
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static ssize_t mpc83xx_wdt_write(struct file *file, const char __user *buf,
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size_t count, loff_t *ppos)
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{
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if (count)
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mpc83xx_wdt_keepalive();
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return count;
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}
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static int mpc83xx_wdt_open(struct inode *inode, struct file *file)
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{
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u32 tmp = SWCRR_SWEN;
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if (test_and_set_bit(0, &wdt_is_open))
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return -EBUSY;
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/* Once we start the watchdog we can't stop it */
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__module_get(THIS_MODULE);
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/* Good, fire up the show */
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if (prescale)
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tmp |= SWCRR_SWPR;
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if (reset)
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tmp |= SWCRR_SWRI;
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tmp |= timeout << 16;
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out_be32(&wd_base->swcrr, tmp);
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return nonseekable_open(inode, file);
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}
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static int mpc83xx_wdt_release(struct inode *inode, struct file *file)
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{
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printk(KERN_CRIT "Unexpected close, not stopping watchdog!\n");
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mpc83xx_wdt_keepalive();
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clear_bit(0, &wdt_is_open);
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return 0;
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}
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static int mpc83xx_wdt_ioctl(struct inode *inode, struct file *file,
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unsigned int cmd, unsigned long arg)
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{
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void __user *argp = (void __user *)arg;
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int __user *p = argp;
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static struct watchdog_info ident = {
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.options = WDIOF_KEEPALIVEPING,
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.firmware_version = 1,
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.identity = "MPC83xx",
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};
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switch (cmd) {
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case WDIOC_GETSUPPORT:
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return copy_to_user(argp, &ident, sizeof(ident)) ? -EFAULT : 0;
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case WDIOC_KEEPALIVE:
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mpc83xx_wdt_keepalive();
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return 0;
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case WDIOC_GETTIMEOUT:
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return put_user(timeout_sec, p);
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default:
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return -ENOIOCTLCMD;
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}
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}
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2006-07-03 03:24:21 -04:00
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static const struct file_operations mpc83xx_wdt_fops = {
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2006-01-14 16:20:50 -05:00
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.owner = THIS_MODULE,
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.llseek = no_llseek,
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.write = mpc83xx_wdt_write,
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.ioctl = mpc83xx_wdt_ioctl,
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.open = mpc83xx_wdt_open,
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.release = mpc83xx_wdt_release,
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};
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static struct miscdevice mpc83xx_wdt_miscdev = {
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.minor = WATCHDOG_MINOR,
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.name = "watchdog",
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.fops = &mpc83xx_wdt_fops,
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};
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static int __devinit mpc83xx_wdt_probe(struct platform_device *dev)
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{
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struct resource *r;
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int ret;
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unsigned int *freq = dev->dev.platform_data;
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/* get a pointer to the register memory */
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r = platform_get_resource(dev, IORESOURCE_MEM, 0);
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if (!r) {
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ret = -ENODEV;
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goto err_out;
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}
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wd_base = ioremap(r->start, sizeof (struct mpc83xx_wdt));
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if (wd_base == NULL) {
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ret = -ENOMEM;
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goto err_out;
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}
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ret = misc_register(&mpc83xx_wdt_miscdev);
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if (ret) {
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printk(KERN_ERR "cannot register miscdev on minor=%d "
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"(err=%d)\n",
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WATCHDOG_MINOR, ret);
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goto err_unmap;
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}
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/* Calculate the timeout in seconds */
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if (prescale)
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timeout_sec = (timeout * 0x10000) / (*freq);
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else
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timeout_sec = timeout / (*freq);
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printk(KERN_INFO "WDT driver for MPC83xx initialized. "
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"mode:%s timeout=%d (%d seconds)\n",
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reset ? "reset":"interrupt", timeout, timeout_sec);
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spin_lock_init(&wdt_spinlock);
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return 0;
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err_unmap:
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iounmap(wd_base);
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err_out:
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return ret;
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}
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static int __devexit mpc83xx_wdt_remove(struct platform_device *dev)
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{
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misc_deregister(&mpc83xx_wdt_miscdev);
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iounmap(wd_base);
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return 0;
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}
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static struct platform_driver mpc83xx_wdt_driver = {
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.probe = mpc83xx_wdt_probe,
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.remove = __devexit_p(mpc83xx_wdt_remove),
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.driver = {
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.name = "mpc83xx_wdt",
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},
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};
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static int __init mpc83xx_wdt_init(void)
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{
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return platform_driver_register(&mpc83xx_wdt_driver);
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}
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static void __exit mpc83xx_wdt_exit(void)
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{
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platform_driver_unregister(&mpc83xx_wdt_driver);
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}
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module_init(mpc83xx_wdt_init);
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module_exit(mpc83xx_wdt_exit);
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MODULE_AUTHOR("Dave Updegraff, Kumar Gala");
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MODULE_DESCRIPTION("Driver for watchdog timer in MPC83xx uProcessor");
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MODULE_LICENSE("GPL");
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MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
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