2019-04-02 17:23:55 -04:00
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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2020-01-21 17:13:10 -05:00
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* Copyright (c) 2015-2020, The Linux Foundation. All rights reserved.
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2019-04-02 17:23:55 -04:00
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*/
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#ifndef _SDE_HW_INTF_H
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#define _SDE_HW_INTF_H
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#include "sde_hw_catalog.h"
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#include "sde_hw_mdss.h"
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#include "sde_hw_util.h"
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#include "sde_hw_blk.h"
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#include "sde_kms.h"
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struct sde_hw_intf;
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/* intf timing settings */
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struct intf_timing_params {
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u32 width; /* active width */
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u32 height; /* active height */
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u32 xres; /* Display panel width */
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u32 yres; /* Display panel height */
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u32 h_back_porch;
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u32 h_front_porch;
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u32 v_back_porch;
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u32 v_front_porch;
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u32 hsync_pulse_width;
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u32 vsync_pulse_width;
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u32 hsync_polarity;
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u32 vsync_polarity;
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u32 border_clr;
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u32 underflow_clr;
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u32 hsync_skew;
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u32 v_front_porch_fixed;
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bool wide_bus_en; /* for DP only */
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bool compression_en;
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u32 extra_dto_cycles; /* for DP only */
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bool dsc_4hs_merge; /* DSC 4HS merge */
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};
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struct intf_prog_fetch {
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u8 enable;
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/* vsync counter for the front porch pixel line */
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u32 fetch_start;
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};
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struct intf_status {
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u8 is_en; /* interface timing engine is enabled or not */
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u32 frame_count; /* frame count since timing engine enabled */
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u32 line_count; /* current line count including blanking */
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};
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struct intf_avr_params {
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u32 default_fps;
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u32 min_fps;
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u32 avr_mode; /* 0 - disable, 1 - continuous, 2 - one-shot */
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};
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/**
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* struct sde_hw_intf_ops : Interface to the interface Hw driver functions
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* Assumption is these functions will be called after clocks are enabled
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* @ setup_timing_gen : programs the timing engine
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* @ setup_prog_fetch : enables/disables the programmable fetch logic
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* @ setup_rot_start : enables/disables the rotator start trigger
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* @ enable_timing: enable/disable timing engine
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* @ get_status: returns if timing engine is enabled or not
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* @ setup_misr: enables/disables MISR in HW register
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* @ collect_misr: reads and stores MISR data from HW register
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* @ get_line_count: reads current vertical line counter
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* @bind_pingpong_blk: enable/disable the connection with pingpong which will
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* feed pixels to this interface
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*/
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struct sde_hw_intf_ops {
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void (*setup_timing_gen)(struct sde_hw_intf *intf,
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const struct intf_timing_params *p,
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const struct sde_format *fmt);
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void (*setup_prg_fetch)(struct sde_hw_intf *intf,
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const struct intf_prog_fetch *fetch);
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void (*setup_rot_start)(struct sde_hw_intf *intf,
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const struct intf_prog_fetch *fetch);
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void (*enable_timing)(struct sde_hw_intf *intf,
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u8 enable);
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void (*get_status)(struct sde_hw_intf *intf,
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struct intf_status *status);
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void (*setup_misr)(struct sde_hw_intf *intf,
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bool enable, u32 frame_count);
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int (*collect_misr)(struct sde_hw_intf *intf,
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bool nonblock, u32 *misr_value);
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/**
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* returns the current scan line count of the display
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* video mode panels use get_line_count whereas get_vsync_info
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* is used for command mode panels
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*/
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u32 (*get_line_count)(struct sde_hw_intf *intf);
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void (*bind_pingpong_blk)(struct sde_hw_intf *intf,
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bool enable,
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const enum sde_pingpong pp);
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/**
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* enables vysnc generation and sets up init value of
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* read pointer and programs the tear check cofiguration
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*/
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int (*setup_tearcheck)(struct sde_hw_intf *intf,
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struct sde_hw_tear_check *cfg);
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/**
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* enables tear check block
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*/
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int (*enable_tearcheck)(struct sde_hw_intf *intf,
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bool enable);
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/**
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* updates tearcheck configuration
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*/
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void (*update_tearcheck)(struct sde_hw_intf *intf,
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struct sde_hw_tear_check *cfg);
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/**
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* read, modify, write to either set or clear listening to external TE
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* @Return: 1 if TE was originally connected, 0 if not, or -ERROR
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*/
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int (*connect_external_te)(struct sde_hw_intf *intf,
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bool enable_external_te);
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/**
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* provides the programmed and current
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* line_count
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*/
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int (*get_vsync_info)(struct sde_hw_intf *intf,
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struct sde_hw_pp_vsync_info *info);
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/**
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* configure and enable the autorefresh config
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*/
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int (*setup_autorefresh)(struct sde_hw_intf *intf,
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struct sde_hw_autorefresh *cfg);
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/**
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* retrieve autorefresh config from hardware
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*/
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int (*get_autorefresh)(struct sde_hw_intf *intf,
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struct sde_hw_autorefresh *cfg);
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/**
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* poll until write pointer transmission starts
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* @Return: 0 on success, -ETIMEDOUT on timeout
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*/
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int (*poll_timeout_wr_ptr)(struct sde_hw_intf *intf, u32 timeout_us);
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/**
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* Select vsync signal for tear-effect configuration
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*/
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void (*vsync_sel)(struct sde_hw_intf *intf, u32 vsync_source);
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/**
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* Program the AVR_TOTAL for min fps rate
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*/
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int (*avr_setup)(struct sde_hw_intf *intf,
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const struct intf_timing_params *params,
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const struct intf_avr_params *avr_params);
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/**
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* Signal the trigger on each commit for AVR
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*/
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void (*avr_trigger)(struct sde_hw_intf *ctx);
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/**
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* Enable AVR and select the mode
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*/
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void (*avr_ctrl)(struct sde_hw_intf *intf,
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const struct intf_avr_params *avr_params);
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/**
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* Enable/disable 64 bit compressed data input to interface block
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*/
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void (*enable_compressed_input)(struct sde_hw_intf *intf,
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bool compression_en, bool dsc_4hs_merge);
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};
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struct sde_hw_intf {
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struct sde_hw_blk base;
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struct sde_hw_blk_reg_map hw;
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/* intf */
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enum sde_intf idx;
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const struct sde_intf_cfg *cap;
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const struct sde_mdss_cfg *mdss;
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struct split_pipe_cfg cfg;
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/* ops */
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struct sde_hw_intf_ops ops;
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};
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/**
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* to_sde_hw_intf - convert base object sde_hw_base to container
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* @hw: Pointer to base hardware block
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* return: Pointer to hardware block container
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*/
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static inline struct sde_hw_intf *to_sde_hw_intf(struct sde_hw_blk *hw)
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{
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return container_of(hw, struct sde_hw_intf, base);
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}
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/**
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* sde_hw_intf_init(): Initializes the intf driver for the passed
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* interface idx.
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* @idx: interface index for which driver object is required
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* @addr: mapped register io address of MDP
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* @m : pointer to mdss catalog data
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*/
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struct sde_hw_intf *sde_hw_intf_init(enum sde_intf idx,
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void __iomem *addr,
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struct sde_mdss_cfg *m);
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/**
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* sde_hw_intf_destroy(): Destroys INTF driver context
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* @intf: Pointer to INTF driver context
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*/
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void sde_hw_intf_destroy(struct sde_hw_intf *intf);
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#endif /*_SDE_HW_INTF_H */
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