2019-04-29 18:20:26 -04:00
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2012-2019, The Linux Foundation. All rights reserved.
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*/
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#include <asm/dma-iommu.h>
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#include <linux/dma-buf.h>
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#include <linux/dma-direction.h>
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#include <linux/iommu.h>
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#include <linux/msm_dma_iommu_mapping.h>
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#include <linux/msm_ion.h>
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#include <linux/ion_kernel.h>
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#include <linux/slab.h>
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#include <linux/types.h>
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#include "msm_vidc.h"
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#include "msm_vidc_debug.h"
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#include "msm_vidc_resources.h"
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static int msm_dma_get_device_address(struct dma_buf *dbuf, unsigned long align,
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dma_addr_t *iova, unsigned long *buffer_size,
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unsigned long flags, enum hal_buffer buffer_type,
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unsigned long session_type, struct msm_vidc_platform_resources *res,
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struct dma_mapping_info *mapping_info)
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{
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int rc = 0;
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struct dma_buf_attachment *attach;
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struct sg_table *table = NULL;
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struct context_bank_info *cb = NULL;
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if (!dbuf || !iova || !buffer_size || !mapping_info) {
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dprintk(VIDC_ERR, "Invalid params: %pK, %pK, %pK, %pK\n",
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dbuf, iova, buffer_size, mapping_info);
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return -EINVAL;
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}
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if (is_iommu_present(res)) {
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cb = msm_smem_get_context_bank(
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session_type, (flags & SMEM_SECURE),
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res, buffer_type);
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if (!cb) {
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dprintk(VIDC_ERR,
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"%s: Failed to get context bank device\n",
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__func__);
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rc = -EIO;
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goto mem_map_failed;
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}
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/* Check if the dmabuf size matches expected size */
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if (dbuf->size < *buffer_size) {
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rc = -EINVAL;
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dprintk(VIDC_ERR,
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"Size mismatch: Dmabuf size: %zu Expected Size: %lu",
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dbuf->size, *buffer_size);
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msm_vidc_res_handle_fatal_hw_error(res,
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true);
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goto mem_buf_size_mismatch;
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}
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/* Prepare a dma buf for dma on the given device */
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attach = dma_buf_attach(dbuf, cb->dev);
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if (IS_ERR_OR_NULL(attach)) {
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rc = PTR_ERR(attach) ? PTR_ERR(attach) : -ENOMEM;
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dprintk(VIDC_ERR, "Failed to attach dmabuf\n");
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goto mem_buf_attach_failed;
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}
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/*
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* Get the scatterlist for the given attachment
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* Mapping of sg is taken care by map attachment
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*/
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attach->dma_map_attrs = DMA_ATTR_DELAYED_UNMAP;
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/*
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* We do not need dma_map function to perform cache operations
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* on the whole buffer size and hence pass skip sync flag.
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* We do the required cache operations separately for the
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* required buffer size
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*/
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attach->dma_map_attrs |= DMA_ATTR_SKIP_CPU_SYNC;
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if (res->sys_cache_present)
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attach->dma_map_attrs |=
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DMA_ATTR_IOMMU_USE_UPSTREAM_HINT;
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table = dma_buf_map_attachment(attach, DMA_BIDIRECTIONAL);
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if (IS_ERR_OR_NULL(table)) {
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rc = PTR_ERR(table) ? PTR_ERR(table) : -ENOMEM;
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dprintk(VIDC_ERR, "Failed to map table\n");
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goto mem_map_table_failed;
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}
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/* debug trace's need to be updated later */
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trace_msm_smem_buffer_iommu_op_start("MAP", 0, 0,
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align, *iova, *buffer_size);
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if (table->sgl) {
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*iova = table->sgl->dma_address;
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*buffer_size = table->sgl->dma_length;
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} else {
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dprintk(VIDC_ERR, "sgl is NULL\n");
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rc = -ENOMEM;
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goto mem_map_sg_failed;
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}
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mapping_info->dev = cb->dev;
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mapping_info->domain = cb->domain;
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mapping_info->table = table;
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mapping_info->attach = attach;
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mapping_info->buf = dbuf;
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mapping_info->cb_info = (void *)cb;
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trace_msm_smem_buffer_iommu_op_end("MAP", 0, 0,
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align, *iova, *buffer_size);
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} else {
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2019-05-20 05:21:49 -04:00
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dprintk(VIDC_HIGH, "iommu not present, use phys mem addr\n");
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2019-04-29 18:20:26 -04:00
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}
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return 0;
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mem_map_sg_failed:
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dma_buf_unmap_attachment(attach, table, DMA_BIDIRECTIONAL);
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mem_map_table_failed:
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dma_buf_detach(dbuf, attach);
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mem_buf_size_mismatch:
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mem_buf_attach_failed:
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mem_map_failed:
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return rc;
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}
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static int msm_dma_put_device_address(u32 flags,
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struct dma_mapping_info *mapping_info,
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enum hal_buffer buffer_type)
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{
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int rc = 0;
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if (!mapping_info) {
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2019-05-20 05:21:49 -04:00
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dprintk(VIDC_ERR, "Invalid mapping_info\n");
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2019-04-29 18:20:26 -04:00
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return -EINVAL;
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}
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if (!mapping_info->dev || !mapping_info->table ||
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!mapping_info->buf || !mapping_info->attach ||
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!mapping_info->cb_info) {
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2019-05-20 05:21:49 -04:00
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dprintk(VIDC_ERR, "Invalid params\n");
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2019-04-29 18:20:26 -04:00
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return -EINVAL;
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}
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trace_msm_smem_buffer_iommu_op_start("UNMAP", 0, 0, 0, 0, 0);
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dma_buf_unmap_attachment(mapping_info->attach,
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mapping_info->table, DMA_BIDIRECTIONAL);
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dma_buf_detach(mapping_info->buf, mapping_info->attach);
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trace_msm_smem_buffer_iommu_op_end("UNMAP", 0, 0, 0, 0, 0);
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mapping_info->dev = NULL;
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mapping_info->domain = NULL;
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mapping_info->table = NULL;
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mapping_info->attach = NULL;
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mapping_info->buf = NULL;
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mapping_info->cb_info = NULL;
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return rc;
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}
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struct dma_buf *msm_smem_get_dma_buf(int fd)
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{
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struct dma_buf *dma_buf;
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dma_buf = dma_buf_get(fd);
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if (IS_ERR_OR_NULL(dma_buf)) {
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dprintk(VIDC_ERR, "Failed to get dma_buf for %d, error %ld\n",
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fd, PTR_ERR(dma_buf));
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dma_buf = NULL;
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}
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return dma_buf;
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}
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void msm_smem_put_dma_buf(void *dma_buf)
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{
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if (!dma_buf) {
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dprintk(VIDC_ERR, "%s: NULL dma_buf\n", __func__);
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return;
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}
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dma_buf_put((struct dma_buf *)dma_buf);
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}
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int msm_smem_map_dma_buf(struct msm_vidc_inst *inst, struct msm_smem *smem)
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{
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int rc = 0;
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dma_addr_t iova = 0;
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u32 temp = 0;
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unsigned long buffer_size = 0;
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unsigned long align = SZ_4K;
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struct dma_buf *dbuf;
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unsigned long ion_flags = 0;
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if (!inst || !smem) {
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dprintk(VIDC_ERR, "%s: Invalid params: %pK %pK\n",
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__func__, inst, smem);
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rc = -EINVAL;
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goto exit;
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}
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if (smem->refcount) {
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smem->refcount++;
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goto exit;
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}
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dbuf = msm_smem_get_dma_buf(smem->fd);
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if (!dbuf) {
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rc = -EINVAL;
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goto exit;
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}
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smem->dma_buf = dbuf;
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rc = dma_buf_get_flags(dbuf, &ion_flags);
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if (rc) {
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dprintk(VIDC_ERR, "Failed to get dma buf flags: %d\n", rc);
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goto exit;
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}
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if (ion_flags & ION_FLAG_CACHED)
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smem->flags |= SMEM_CACHED;
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if (ion_flags & ION_FLAG_SECURE)
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smem->flags |= SMEM_SECURE;
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buffer_size = smem->size;
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rc = msm_dma_get_device_address(dbuf, align, &iova, &buffer_size,
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smem->flags, smem->buffer_type, inst->session_type,
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&(inst->core->resources), &smem->mapping_info);
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if (rc) {
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dprintk(VIDC_ERR, "Failed to get device address: %d\n", rc);
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goto exit;
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}
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temp = (u32)iova;
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if ((dma_addr_t)temp != iova) {
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dprintk(VIDC_ERR, "iova(%pa) truncated to %#x", &iova, temp);
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rc = -EINVAL;
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goto exit;
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}
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smem->device_addr = (u32)iova + smem->offset;
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smem->refcount++;
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exit:
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return rc;
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}
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int msm_smem_unmap_dma_buf(struct msm_vidc_inst *inst, struct msm_smem *smem)
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{
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int rc = 0;
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if (!inst || !smem) {
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dprintk(VIDC_ERR, "%s: Invalid params: %pK %pK\n",
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__func__, inst, smem);
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rc = -EINVAL;
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goto exit;
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}
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if (smem->refcount) {
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smem->refcount--;
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} else {
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2019-05-20 05:21:49 -04:00
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dprintk(VIDC_ERR,
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2019-04-29 18:20:26 -04:00
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"unmap called while refcount is zero already\n");
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return -EINVAL;
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}
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if (smem->refcount)
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goto exit;
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rc = msm_dma_put_device_address(smem->flags, &smem->mapping_info,
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smem->buffer_type);
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if (rc) {
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dprintk(VIDC_ERR, "Failed to put device address: %d\n", rc);
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goto exit;
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}
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msm_smem_put_dma_buf(smem->dma_buf);
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smem->device_addr = 0x0;
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smem->dma_buf = NULL;
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exit:
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return rc;
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}
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static int get_secure_flag_for_buffer_type(
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u32 session_type, enum hal_buffer buffer_type)
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{
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switch (buffer_type) {
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case HAL_BUFFER_INPUT:
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if (session_type == MSM_VIDC_ENCODER)
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return ION_FLAG_CP_PIXEL;
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else
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return ION_FLAG_CP_BITSTREAM;
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case HAL_BUFFER_OUTPUT:
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case HAL_BUFFER_OUTPUT2:
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if (session_type == MSM_VIDC_ENCODER)
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return ION_FLAG_CP_BITSTREAM;
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else
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return ION_FLAG_CP_PIXEL;
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case HAL_BUFFER_INTERNAL_SCRATCH:
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return ION_FLAG_CP_BITSTREAM;
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case HAL_BUFFER_INTERNAL_SCRATCH_1:
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return ION_FLAG_CP_NON_PIXEL;
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case HAL_BUFFER_INTERNAL_SCRATCH_2:
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return ION_FLAG_CP_PIXEL;
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case HAL_BUFFER_INTERNAL_PERSIST:
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if (session_type == MSM_VIDC_ENCODER)
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return ION_FLAG_CP_NON_PIXEL;
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else
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return ION_FLAG_CP_BITSTREAM;
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case HAL_BUFFER_INTERNAL_PERSIST_1:
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return ION_FLAG_CP_NON_PIXEL;
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default:
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WARN(1, "No matching secure flag for buffer type : %x\n",
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buffer_type);
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return -EINVAL;
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}
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}
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static int alloc_dma_mem(size_t size, u32 align, u32 flags,
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enum hal_buffer buffer_type, int map_kernel,
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struct msm_vidc_platform_resources *res, u32 session_type,
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struct msm_smem *mem)
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{
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dma_addr_t iova = 0;
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unsigned long buffer_size = 0;
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unsigned long heap_mask = 0;
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int rc = 0;
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int ion_flags = 0;
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struct dma_buf *dbuf = NULL;
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if (!res) {
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dprintk(VIDC_ERR, "%s: NULL res\n", __func__);
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return -EINVAL;
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}
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align = ALIGN(align, SZ_4K);
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size = ALIGN(size, SZ_4K);
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if (is_iommu_present(res)) {
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if (flags & SMEM_ADSP) {
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2019-05-20 05:21:49 -04:00
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dprintk(VIDC_HIGH, "Allocating from ADSP heap\n");
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2019-04-29 18:20:26 -04:00
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heap_mask = ION_HEAP(ION_ADSP_HEAP_ID);
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} else {
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heap_mask = ION_HEAP(ION_SYSTEM_HEAP_ID);
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}
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} else {
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2019-05-20 05:21:49 -04:00
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dprintk(VIDC_HIGH,
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2019-04-29 18:20:26 -04:00
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"allocate shared memory from adsp heap size %zx align %d\n",
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size, align);
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heap_mask = ION_HEAP(ION_ADSP_HEAP_ID);
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}
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|
|
if (flags & SMEM_CACHED)
|
|
|
|
ion_flags |= ION_FLAG_CACHED;
|
|
|
|
|
|
|
|
if ((flags & SMEM_SECURE) ||
|
|
|
|
(buffer_type == HAL_BUFFER_INTERNAL_PERSIST &&
|
|
|
|
session_type == MSM_VIDC_ENCODER)) {
|
|
|
|
int secure_flag =
|
|
|
|
get_secure_flag_for_buffer_type(
|
|
|
|
session_type, buffer_type);
|
|
|
|
if (secure_flag < 0) {
|
|
|
|
rc = secure_flag;
|
|
|
|
goto fail_shared_mem_alloc;
|
|
|
|
}
|
|
|
|
|
|
|
|
ion_flags |= ION_FLAG_SECURE | secure_flag;
|
|
|
|
heap_mask = ION_HEAP(ION_SECURE_HEAP_ID);
|
|
|
|
|
|
|
|
if (res->slave_side_cp) {
|
|
|
|
heap_mask = ION_HEAP(ION_CP_MM_HEAP_ID);
|
|
|
|
size = ALIGN(size, SZ_1M);
|
|
|
|
align = ALIGN(size, SZ_1M);
|
|
|
|
}
|
|
|
|
flags |= SMEM_SECURE;
|
|
|
|
}
|
|
|
|
|
|
|
|
trace_msm_smem_buffer_dma_op_start("ALLOC", (u32)buffer_type,
|
|
|
|
heap_mask, size, align, flags, map_kernel);
|
|
|
|
dbuf = ion_alloc(size, heap_mask, ion_flags);
|
|
|
|
if (IS_ERR_OR_NULL(dbuf)) {
|
|
|
|
dprintk(VIDC_ERR,
|
|
|
|
"Failed to allocate shared memory = %zx, %#x\n",
|
|
|
|
size, flags);
|
|
|
|
rc = -ENOMEM;
|
|
|
|
goto fail_shared_mem_alloc;
|
|
|
|
}
|
|
|
|
trace_msm_smem_buffer_dma_op_end("ALLOC", (u32)buffer_type,
|
|
|
|
heap_mask, size, align, flags, map_kernel);
|
|
|
|
|
|
|
|
mem->flags = flags;
|
|
|
|
mem->buffer_type = buffer_type;
|
|
|
|
mem->offset = 0;
|
|
|
|
mem->size = size;
|
|
|
|
mem->dma_buf = dbuf;
|
|
|
|
mem->kvaddr = NULL;
|
|
|
|
|
|
|
|
rc = msm_dma_get_device_address(dbuf, align, &iova,
|
|
|
|
&buffer_size, flags, buffer_type,
|
|
|
|
session_type, res, &mem->mapping_info);
|
|
|
|
if (rc) {
|
|
|
|
dprintk(VIDC_ERR, "Failed to get device address: %d\n",
|
|
|
|
rc);
|
|
|
|
goto fail_device_address;
|
|
|
|
}
|
|
|
|
mem->device_addr = (u32)iova;
|
|
|
|
if ((dma_addr_t)mem->device_addr != iova) {
|
|
|
|
dprintk(VIDC_ERR, "iova(%pa) truncated to %#x",
|
|
|
|
&iova, mem->device_addr);
|
|
|
|
goto fail_device_address;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (map_kernel) {
|
|
|
|
dma_buf_begin_cpu_access(dbuf, DMA_BIDIRECTIONAL);
|
|
|
|
mem->kvaddr = dma_buf_vmap(dbuf);
|
|
|
|
if (!mem->kvaddr) {
|
|
|
|
dprintk(VIDC_ERR,
|
|
|
|
"Failed to map shared mem in kernel\n");
|
|
|
|
rc = -EIO;
|
|
|
|
goto fail_map;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2019-05-20 05:21:49 -04:00
|
|
|
dprintk(VIDC_HIGH,
|
2019-04-29 18:20:26 -04:00
|
|
|
"%s: dma_buf = %pK, device_addr = %x, size = %d, kvaddr = %pK, buffer_type = %#x, flags = %#lx\n",
|
|
|
|
__func__, mem->dma_buf, mem->device_addr, mem->size,
|
|
|
|
mem->kvaddr, mem->buffer_type, mem->flags);
|
|
|
|
return rc;
|
|
|
|
|
|
|
|
fail_map:
|
|
|
|
if (map_kernel)
|
|
|
|
dma_buf_end_cpu_access(dbuf, DMA_BIDIRECTIONAL);
|
|
|
|
fail_device_address:
|
|
|
|
dma_buf_put(dbuf);
|
|
|
|
fail_shared_mem_alloc:
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int free_dma_mem(struct msm_smem *mem)
|
|
|
|
{
|
2019-05-20 05:21:49 -04:00
|
|
|
dprintk(VIDC_HIGH,
|
2019-04-29 18:20:26 -04:00
|
|
|
"%s: dma_buf = %pK, device_addr = %x, size = %d, kvaddr = %pK, buffer_type = %#x\n",
|
|
|
|
__func__, mem->dma_buf, mem->device_addr, mem->size,
|
|
|
|
mem->kvaddr, mem->buffer_type);
|
|
|
|
|
|
|
|
if (mem->device_addr) {
|
|
|
|
msm_dma_put_device_address(mem->flags,
|
|
|
|
&mem->mapping_info, mem->buffer_type);
|
|
|
|
mem->device_addr = 0x0;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (mem->kvaddr) {
|
|
|
|
dma_buf_vunmap(mem->dma_buf, mem->kvaddr);
|
|
|
|
mem->kvaddr = NULL;
|
|
|
|
dma_buf_end_cpu_access(mem->dma_buf, DMA_BIDIRECTIONAL);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (mem->dma_buf) {
|
|
|
|
trace_msm_smem_buffer_dma_op_start("FREE",
|
|
|
|
(u32)mem->buffer_type, -1, mem->size, -1,
|
|
|
|
mem->flags, -1);
|
|
|
|
dma_buf_put(mem->dma_buf);
|
|
|
|
mem->dma_buf = NULL;
|
|
|
|
trace_msm_smem_buffer_dma_op_end("FREE", (u32)mem->buffer_type,
|
|
|
|
-1, mem->size, -1, mem->flags, -1);
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
int msm_smem_alloc(size_t size, u32 align, u32 flags,
|
|
|
|
enum hal_buffer buffer_type, int map_kernel,
|
|
|
|
void *res, u32 session_type, struct msm_smem *smem)
|
|
|
|
{
|
|
|
|
int rc = 0;
|
|
|
|
|
|
|
|
if (!smem || !size) {
|
|
|
|
dprintk(VIDC_ERR, "%s: NULL smem or %d size\n",
|
|
|
|
__func__, (u32)size);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
rc = alloc_dma_mem(size, align, flags, buffer_type, map_kernel,
|
|
|
|
(struct msm_vidc_platform_resources *)res,
|
|
|
|
session_type, smem);
|
|
|
|
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
|
|
|
int msm_smem_free(struct msm_smem *smem)
|
|
|
|
{
|
|
|
|
int rc = 0;
|
|
|
|
|
|
|
|
if (!smem) {
|
|
|
|
dprintk(VIDC_ERR, "NULL smem passed\n");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
rc = free_dma_mem(smem);
|
|
|
|
|
|
|
|
return rc;
|
|
|
|
};
|
|
|
|
|
|
|
|
int msm_smem_cache_operations(struct dma_buf *dbuf,
|
|
|
|
enum smem_cache_ops cache_op, unsigned long offset, unsigned long size)
|
|
|
|
{
|
|
|
|
int rc = 0;
|
|
|
|
unsigned long flags = 0;
|
|
|
|
|
|
|
|
if (!dbuf) {
|
|
|
|
dprintk(VIDC_ERR, "%s: Invalid params\n", __func__);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Return if buffer doesn't support caching */
|
|
|
|
rc = dma_buf_get_flags(dbuf, &flags);
|
|
|
|
if (rc) {
|
|
|
|
dprintk(VIDC_ERR, "%s: dma_buf_get_flags failed, err %d\n",
|
|
|
|
__func__, rc);
|
|
|
|
return rc;
|
|
|
|
} else if (!(flags & ION_FLAG_CACHED)) {
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
|
|
|
switch (cache_op) {
|
|
|
|
case SMEM_CACHE_CLEAN:
|
|
|
|
case SMEM_CACHE_CLEAN_INVALIDATE:
|
|
|
|
rc = dma_buf_begin_cpu_access_partial(dbuf, DMA_TO_DEVICE,
|
|
|
|
offset, size);
|
|
|
|
if (rc)
|
|
|
|
break;
|
|
|
|
rc = dma_buf_end_cpu_access_partial(dbuf, DMA_TO_DEVICE,
|
|
|
|
offset, size);
|
|
|
|
break;
|
|
|
|
case SMEM_CACHE_INVALIDATE:
|
|
|
|
rc = dma_buf_begin_cpu_access_partial(dbuf, DMA_TO_DEVICE,
|
|
|
|
offset, size);
|
|
|
|
if (rc)
|
|
|
|
break;
|
|
|
|
rc = dma_buf_end_cpu_access_partial(dbuf, DMA_FROM_DEVICE,
|
|
|
|
offset, size);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
dprintk(VIDC_ERR, "%s: cache (%d) operation not supported\n",
|
|
|
|
__func__, cache_op);
|
|
|
|
rc = -EINVAL;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
|
|
|
struct context_bank_info *msm_smem_get_context_bank(u32 session_type,
|
|
|
|
bool is_secure, struct msm_vidc_platform_resources *res,
|
|
|
|
enum hal_buffer buffer_type)
|
|
|
|
{
|
|
|
|
struct context_bank_info *cb = NULL, *match = NULL;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* HAL_BUFFER_INPUT is directly mapped to bitstream CB in DT
|
|
|
|
* as the buffer type structure was initially designed
|
|
|
|
* just for decoder. For Encoder, input should be mapped to
|
|
|
|
* yuvpixel CB. Persist is mapped to nonpixel CB.
|
|
|
|
* So swap the buffer types just in this local scope.
|
|
|
|
*/
|
|
|
|
if (is_secure && session_type == MSM_VIDC_ENCODER) {
|
|
|
|
if (buffer_type == HAL_BUFFER_INPUT)
|
|
|
|
buffer_type = HAL_BUFFER_OUTPUT;
|
|
|
|
else if (buffer_type == HAL_BUFFER_OUTPUT)
|
|
|
|
buffer_type = HAL_BUFFER_INPUT;
|
|
|
|
else if (buffer_type == HAL_BUFFER_INTERNAL_PERSIST)
|
|
|
|
buffer_type = HAL_BUFFER_INTERNAL_PERSIST_1;
|
|
|
|
}
|
|
|
|
|
|
|
|
list_for_each_entry(cb, &res->context_banks, list) {
|
|
|
|
if (cb->is_secure == is_secure &&
|
|
|
|
cb->buffer_type & buffer_type) {
|
|
|
|
match = cb;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if (!match)
|
|
|
|
dprintk(VIDC_ERR,
|
|
|
|
"%s: cb not found for buffer_type %x, is_secure %d\n",
|
|
|
|
__func__, buffer_type, is_secure);
|
|
|
|
|
|
|
|
return match;
|
|
|
|
}
|
|
|
|
|