94 lines
2.7 KiB
C
94 lines
2.7 KiB
C
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/* psycho_common.c: Code common to PSYCHO and derivative PCI controllers.
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*
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* Copyright (C) 2008 David S. Miller <davem@davemloft.net>
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*/
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#include <linux/kernel.h>
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#include <asm/upa.h>
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#include "pci_impl.h"
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#include "psycho_common.h"
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#define PSYCHO_IOMMU_TAG 0xa580UL
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#define PSYCHO_IOMMU_DATA 0xa600UL
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static void psycho_iommu_flush(struct pci_pbm_info *pbm)
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{
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int i;
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for (i = 0; i < 16; i++) {
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unsigned long off = i * 8;
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upa_writeq(0, pbm->controller_regs + PSYCHO_IOMMU_TAG + off);
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upa_writeq(0, pbm->controller_regs + PSYCHO_IOMMU_DATA + off);
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}
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}
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#define PSYCHO_IOMMU_CONTROL 0x0200UL
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#define PSYCHO_IOMMU_CTRL_TSBSZ 0x0000000000070000UL
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#define PSYCHO_IOMMU_TSBSZ_1K 0x0000000000000000UL
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#define PSYCHO_IOMMU_TSBSZ_2K 0x0000000000010000UL
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#define PSYCHO_IOMMU_TSBSZ_4K 0x0000000000020000UL
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#define PSYCHO_IOMMU_TSBSZ_8K 0x0000000000030000UL
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#define PSYCHO_IOMMU_TSBSZ_16K 0x0000000000040000UL
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#define PSYCHO_IOMMU_TSBSZ_32K 0x0000000000050000UL
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#define PSYCHO_IOMMU_TSBSZ_64K 0x0000000000060000UL
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#define PSYCHO_IOMMU_TSBSZ_128K 0x0000000000070000UL
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#define PSYCHO_IOMMU_CTRL_TBWSZ 0x0000000000000004UL
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#define PSYCHO_IOMMU_CTRL_DENAB 0x0000000000000002UL
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#define PSYCHO_IOMMU_CTRL_ENAB 0x0000000000000001UL
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#define PSYCHO_IOMMU_FLUSH 0x0210UL
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#define PSYCHO_IOMMU_TSBBASE 0x0208UL
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int psycho_iommu_init(struct pci_pbm_info *pbm, int tsbsize,
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u32 dvma_offset, u32 dma_mask,
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unsigned long write_complete_offset)
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{
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struct iommu *iommu = pbm->iommu;
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u64 control;
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int err;
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iommu->iommu_control = pbm->controller_regs + PSYCHO_IOMMU_CONTROL;
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iommu->iommu_tsbbase = pbm->controller_regs + PSYCHO_IOMMU_TSBBASE;
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iommu->iommu_flush = pbm->controller_regs + PSYCHO_IOMMU_FLUSH;
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iommu->iommu_tags = pbm->controller_regs + PSYCHO_IOMMU_TAG;
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iommu->write_complete_reg = (pbm->controller_regs +
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write_complete_offset);
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iommu->iommu_ctxflush = 0;
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control = upa_readq(iommu->iommu_control);
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control |= PSYCHO_IOMMU_CTRL_DENAB;
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upa_writeq(control, iommu->iommu_control);
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psycho_iommu_flush(pbm);
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/* Leave diag mode enabled for full-flushing done in pci_iommu.c */
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err = iommu_table_init(iommu, tsbsize * 1024 * 8,
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dvma_offset, dma_mask, pbm->numa_node);
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if (err)
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return err;
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upa_writeq(__pa(iommu->page_table), iommu->iommu_tsbbase);
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control = upa_readq(iommu->iommu_control);
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control &= ~(PSYCHO_IOMMU_CTRL_TSBSZ | PSYCHO_IOMMU_CTRL_TBWSZ);
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control |= PSYCHO_IOMMU_CTRL_ENAB;
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switch (tsbsize) {
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case 64:
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control |= PSYCHO_IOMMU_TSBSZ_64K;
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break;
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case 128:
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control |= PSYCHO_IOMMU_TSBSZ_128K;
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break;
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default:
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return -EINVAL;
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}
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upa_writeq(control, iommu->iommu_control);
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return 0;
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}
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