android_kernel_xiaomi_sm8350/arch/powerpc/boot/dts/mpc8313erdb.dts

/*
 * MPC8313E RDB Device Tree Source
 *
 * Copyright 2005, 2006, 2007 Freescale Semiconductor Inc.
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
 * Free Software Foundation;  either version 2 of the  License, or (at your
 * option) any later version.
 */

/ {
	model = "MPC8313ERDB";
	compatible = "MPC8313ERDB", "MPC831xRDB", "MPC83xxRDB";
	#address-cells = <1>;
	#size-cells = <1>;

	aliases {
		ethernet0 = &enet0;
		ethernet1 = &enet1;
		serial0 = &serial0;
		serial1 = &serial1;
		pci0 = &pci0;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		PowerPC,8313@0 {
			device_type = "cpu";
			reg = <0>;
			d-cache-line-size = <20>;	// 32 bytes
			i-cache-line-size = <20>;	// 32 bytes
			d-cache-size = <4000>;		// L1, 16K
			i-cache-size = <4000>;		// L1, 16K
			timebase-frequency = <0>;	// from bootloader
			bus-frequency = <0>;		// from bootloader
			clock-frequency = <0>;		// from bootloader
		};
	};

	memory {
		device_type = "memory";
		reg = <00000000 08000000>;	// 128MB at 0
	};

	localbus@e0005000 {
		#address-cells = <2>;
		#size-cells = <1>;
		compatible = "fsl,mpc8313-elbc", "fsl,elbc", "simple-bus";
		reg = <e0005000 1000>;
		interrupts = <d#77 8>;
		interrupt-parent = <&ipic>;

		// CS0 and CS1 are swapped when
		// booting from nand, but the
		// addresses are the same.
		ranges = <0 0 fe000000 00800000
		          1 0 e2800000 00008000
		          2 0 f0000000 00020000
		          3 0 fa000000 00008000>;

		flash@0,0 {
			#address-cells = <1>;
			#size-cells = <1>;
			compatible = "cfi-flash";
			reg = <0 0 800000>;
			bank-width = <2>;
			device-width = <1>;
		};

		nand@1,0 {
			#address-cells = <1>;
			#size-cells = <1>;
			compatible = "fsl,mpc8313-fcm-nand",
			             "fsl,elbc-fcm-nand";
			reg = <1 0 2000>;

			u-boot@0 {
				reg = <0 100000>;
				read-only;
			};

			kernel@100000 {
				reg = <100000 300000>;
			};

			fs@400000 {
				reg = <400000 1c00000>;
			};
		};
	};

	soc8313@e0000000 {
		#address-cells = <1>;
		#size-cells = <1>;
		device_type = "soc";
		compatible = "simple-bus";
		ranges = <0 e0000000 00100000>;
		reg = <e0000000 00000200>;
		bus-frequency = <0>;

		wdt@200 {
			device_type = "watchdog";
			compatible = "mpc83xx_wdt";
			reg = <200 100>;
		};

		i2c@3000 {
			#address-cells = <1>;
			#size-cells = <0>;
			cell-index = <0>;
			compatible = "fsl-i2c";
			reg = <3000 100>;
			interrupts = <e 8>;
			interrupt-parent = < &ipic >;
			dfsrr;
		};

		i2c@3100 {
			#address-cells = <1>;
			#size-cells = <0>;
			cell-index = <1>;
			compatible = "fsl-i2c";
			reg = <3100 100>;
			interrupts = <f 8>;
			interrupt-parent = < &ipic >;
			dfsrr;
		};

		spi@7000 {
			cell-index = <0>;
			compatible = "fsl,spi";
			reg = <7000 1000>;
			interrupts = <10 8>;
			interrupt-parent = < &ipic >;
			mode = "cpu";
		};

		/* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
		usb@23000 {
			compatible = "fsl-usb2-dr";
			reg = <23000 1000>;
			#address-cells = <1>;
			#size-cells = <0>;
			interrupt-parent = < &ipic >;
			interrupts = <26 8>;
			phy_type = "utmi_wide";
		};

		mdio@24520 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "fsl,gianfar-mdio";
			reg = <24520 20>;
			phy1: ethernet-phy@1 {
				interrupt-parent = < &ipic >;
				interrupts = <13 8>;
				reg = <1>;
				device_type = "ethernet-phy";
			};
			phy4: ethernet-phy@4 {
				interrupt-parent = < &ipic >;
				interrupts = <14 8>;
				reg = <4>;
				device_type = "ethernet-phy";
			};
		};

		enet0: ethernet@24000 {
			cell-index = <0>;
			device_type = "network";
			model = "eTSEC";
			compatible = "gianfar";
			reg = <24000 1000>;
			local-mac-address = [ 00 00 00 00 00 00 ];
			interrupts = <25 8 24 8 23 8>;
			interrupt-parent = < &ipic >;
			phy-handle = < &phy1 >;
		};

		enet1: ethernet@25000 {
			cell-index = <1>;
			device_type = "network";
			model = "eTSEC";
			compatible = "gianfar";
			reg = <25000 1000>;
			local-mac-address = [ 00 00 00 00 00 00 ];
			interrupts = <22 8 21 8 20 8>;
			interrupt-parent = < &ipic >;
			phy-handle = < &phy4 >;
		};

		serial0: serial@4500 {
			cell-index = <0>;
			device_type = "serial";
			compatible = "ns16550";
			reg = <4500 100>;
			clock-frequency = <0>;
			interrupts = <9 8>;
			interrupt-parent = < &ipic >;
		};

		serial1: serial@4600 {
			cell-index = <1>;
			device_type = "serial";
			compatible = "ns16550";
			reg = <4600 100>;
			clock-frequency = <0>;
			interrupts = <a 8>;
			interrupt-parent = < &ipic >;
		};

		crypto@30000 {
			device_type = "crypto";
			model = "SEC2";
			compatible = "talitos";
			reg = <30000 7000>;
			interrupts = <b 8>;
			interrupt-parent = < &ipic >;
			/* Rev. 2.2 */
			num-channels = <1>;
			channel-fifo-len = <18>;
			exec-units-mask = <0000004c>;
			descriptor-types-mask = <0122003f>;
		};

		/* IPIC
		 * interrupts cell = <intr #, sense>
		 * sense values match linux IORESOURCE_IRQ_* defines:
		 * sense == 8: Level, low assertion
		 * sense == 2: Edge, high-to-low change
		 */
		ipic: pic@700 {
			interrupt-controller;
			#address-cells = <0>;
			#interrupt-cells = <2>;
			reg = <700 100>;
			device_type = "ipic";
		};
	};

	pci0: pci@e0008500 {
		cell-index = <1>;
		interrupt-map-mask = <f800 0 0 7>;
		interrupt-map = <

				/* IDSEL 0x0E -mini PCI */
				 7000 0 0 1 &ipic 12 8
				 7000 0 0 2 &ipic 12 8
				 7000 0 0 3 &ipic 12 8
				 7000 0 0 4 &ipic 12 8

				/* IDSEL 0x0F - PCI slot */
				 7800 0 0 1 &ipic 11 8
				 7800 0 0 2 &ipic 12 8
				 7800 0 0 3 &ipic 11 8
				 7800 0 0 4 &ipic 12 8>;
		interrupt-parent = < &ipic >;
		interrupts = <42 8>;
		bus-range = <0 0>;
		ranges = <02000000 0 90000000 90000000 0 10000000
			  42000000 0 80000000 80000000 0 10000000
			  01000000 0 00000000 e2000000 0 00100000>;
		clock-frequency = <3f940aa>;
		#interrupt-cells = <1>;
		#size-cells = <2>;
		#address-cells = <3>;
		reg = <e0008500 100>;
		compatible = "fsl,mpc8349-pci";
		device_type = "pci";
	};
};