541 lines
13 KiB
C
541 lines
13 KiB
C
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2012-2015, 2017-2019 The Linux Foundation. All rights reserved.
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*/
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/regulator/consumer.h>
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#include <linux/delay.h>
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#include <linux/sde_io_util.h>
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#define MAX_I2C_CMDS 16
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void dss_reg_w(struct dss_io_data *io, u32 offset, u32 value, u32 debug)
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{
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u32 in_val;
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if (!io || !io->base) {
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DEV_ERR("%pS->%s: invalid input\n",
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__builtin_return_address(0), __func__);
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return;
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}
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if (offset > io->len) {
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DEV_ERR("%pS->%s: offset out of range\n",
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__builtin_return_address(0), __func__);
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return;
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}
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writel_relaxed(value, io->base + offset);
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if (debug) {
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in_val = readl_relaxed(io->base + offset);
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DEV_DBG("[%08x] => %08x [%08x]\n",
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(u32)(unsigned long)(io->base + offset),
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value, in_val);
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}
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} /* dss_reg_w */
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EXPORT_SYMBOL(dss_reg_w);
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u32 dss_reg_r(struct dss_io_data *io, u32 offset, u32 debug)
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{
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u32 value;
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if (!io || !io->base) {
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DEV_ERR("%pS->%s: invalid input\n",
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__builtin_return_address(0), __func__);
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return -EINVAL;
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}
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if (offset > io->len) {
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DEV_ERR("%pS->%s: offset out of range\n",
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__builtin_return_address(0), __func__);
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return -EINVAL;
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}
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value = readl_relaxed(io->base + offset);
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if (debug)
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DEV_DBG("[%08x] <= %08x\n",
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(u32)(unsigned long)(io->base + offset), value);
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return value;
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} /* dss_reg_r */
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EXPORT_SYMBOL(dss_reg_r);
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void dss_reg_dump(void __iomem *base, u32 length, const char *prefix,
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u32 debug)
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{
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if (debug)
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print_hex_dump(KERN_INFO, prefix, DUMP_PREFIX_OFFSET, 32, 4,
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(void *)base, length, false);
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} /* dss_reg_dump */
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EXPORT_SYMBOL(dss_reg_dump);
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static struct resource *msm_dss_get_res_byname(struct platform_device *pdev,
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unsigned int type, const char *name)
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{
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struct resource *res = NULL;
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res = platform_get_resource_byname(pdev, type, name);
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if (!res)
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DEV_ERR("%s: '%s' resource not found\n", __func__, name);
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return res;
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} /* msm_dss_get_res_byname */
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EXPORT_SYMBOL(msm_dss_get_res_byname);
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int msm_dss_ioremap_byname(struct platform_device *pdev,
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struct dss_io_data *io_data, const char *name)
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{
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struct resource *res = NULL;
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if (!pdev || !io_data) {
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DEV_ERR("%pS->%s: invalid input\n",
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__builtin_return_address(0), __func__);
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return -EINVAL;
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}
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res = msm_dss_get_res_byname(pdev, IORESOURCE_MEM, name);
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if (!res) {
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DEV_ERR("%pS->%s: '%s' msm_dss_get_res_byname failed\n",
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__builtin_return_address(0), __func__, name);
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return -ENODEV;
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}
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io_data->len = (u32)resource_size(res);
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io_data->base = ioremap(res->start, io_data->len);
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if (!io_data->base) {
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DEV_ERR("%pS->%s: '%s' ioremap failed\n",
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__builtin_return_address(0), __func__, name);
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return -EIO;
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}
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return 0;
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} /* msm_dss_ioremap_byname */
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EXPORT_SYMBOL(msm_dss_ioremap_byname);
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void msm_dss_iounmap(struct dss_io_data *io_data)
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{
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if (!io_data) {
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DEV_ERR("%pS->%s: invalid input\n",
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__builtin_return_address(0), __func__);
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return;
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}
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if (io_data->base) {
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iounmap(io_data->base);
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io_data->base = NULL;
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}
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io_data->len = 0;
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} /* msm_dss_iounmap */
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EXPORT_SYMBOL(msm_dss_iounmap);
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int msm_dss_config_vreg(struct device *dev, struct dss_vreg *in_vreg,
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int num_vreg, int config)
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{
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int i = 0, rc = 0;
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struct dss_vreg *curr_vreg = NULL;
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enum dss_vreg_type type;
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if (!in_vreg || !num_vreg)
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return rc;
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if (config) {
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for (i = 0; i < num_vreg; i++) {
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curr_vreg = &in_vreg[i];
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curr_vreg->vreg = regulator_get(dev,
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curr_vreg->vreg_name);
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rc = PTR_RET(curr_vreg->vreg);
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if (rc) {
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DEV_ERR("%pS->%s: %s get failed. rc=%d\n",
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__builtin_return_address(0), __func__,
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curr_vreg->vreg_name, rc);
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curr_vreg->vreg = NULL;
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goto vreg_get_fail;
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}
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type = (regulator_count_voltages(curr_vreg->vreg) > 0)
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? DSS_REG_LDO : DSS_REG_VS;
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if (type == DSS_REG_LDO) {
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rc = regulator_set_voltage(
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curr_vreg->vreg,
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curr_vreg->min_voltage,
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curr_vreg->max_voltage);
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if (rc < 0) {
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DEV_ERR("%pS->%s: %s set vltg fail\n",
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__builtin_return_address(0),
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__func__,
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curr_vreg->vreg_name);
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goto vreg_set_voltage_fail;
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}
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}
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}
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} else {
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for (i = num_vreg-1; i >= 0; i--) {
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curr_vreg = &in_vreg[i];
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if (curr_vreg->vreg) {
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type = (regulator_count_voltages(
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curr_vreg->vreg) > 0)
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? DSS_REG_LDO : DSS_REG_VS;
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if (type == DSS_REG_LDO) {
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regulator_set_voltage(curr_vreg->vreg,
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0, curr_vreg->max_voltage);
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}
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regulator_put(curr_vreg->vreg);
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curr_vreg->vreg = NULL;
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}
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}
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}
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return 0;
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vreg_unconfig:
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if (type == DSS_REG_LDO)
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regulator_set_load(curr_vreg->vreg, 0);
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vreg_set_voltage_fail:
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regulator_put(curr_vreg->vreg);
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curr_vreg->vreg = NULL;
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vreg_get_fail:
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for (i--; i >= 0; i--) {
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curr_vreg = &in_vreg[i];
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type = (regulator_count_voltages(curr_vreg->vreg) > 0)
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? DSS_REG_LDO : DSS_REG_VS;
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goto vreg_unconfig;
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}
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return rc;
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} /* msm_dss_config_vreg */
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EXPORT_SYMBOL(msm_dss_config_vreg);
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static bool msm_dss_is_hw_controlled(struct dss_vreg in_vreg)
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{
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u32 mode = 0;
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char const *regulator_gdsc = "gdsc";
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/*
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* For gdsc-regulator devices only, REGULATOR_MODE_FAST specifies that
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* the GDSC is in HW controlled mode.
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*/
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mode = regulator_get_mode(in_vreg.vreg);
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if (!strcmp(regulator_gdsc, in_vreg.vreg_name) &&
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mode == REGULATOR_MODE_FAST) {
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DEV_DBG("%pS->%s: %s is HW controlled\n",
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__builtin_return_address(0), __func__,
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in_vreg.vreg_name);
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return true;
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}
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return false;
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}
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int msm_dss_enable_vreg(struct dss_vreg *in_vreg, int num_vreg, int enable)
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{
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int i = 0, rc = 0;
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bool need_sleep;
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if (enable) {
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for (i = 0; i < num_vreg; i++) {
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rc = PTR_RET(in_vreg[i].vreg);
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if (rc) {
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DEV_ERR("%pS->%s: %s regulator error. rc=%d\n",
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__builtin_return_address(0), __func__,
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in_vreg[i].vreg_name, rc);
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goto vreg_set_opt_mode_fail;
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}
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if (msm_dss_is_hw_controlled(in_vreg[i]))
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continue;
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need_sleep = !regulator_is_enabled(in_vreg[i].vreg);
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if (in_vreg[i].pre_on_sleep && need_sleep)
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usleep_range(in_vreg[i].pre_on_sleep * 1000,
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(in_vreg[i].pre_on_sleep * 1000) + 10);
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rc = regulator_set_load(in_vreg[i].vreg,
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in_vreg[i].enable_load);
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if (rc < 0) {
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DEV_ERR("%pS->%s: %s set opt m fail\n",
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__builtin_return_address(0), __func__,
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in_vreg[i].vreg_name);
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goto vreg_set_opt_mode_fail;
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}
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rc = regulator_enable(in_vreg[i].vreg);
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if (in_vreg[i].post_on_sleep && need_sleep)
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usleep_range(in_vreg[i].post_on_sleep * 1000,
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(in_vreg[i].post_on_sleep * 1000) + 10);
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if (rc < 0) {
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DEV_ERR("%pS->%s: %s enable failed\n",
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__builtin_return_address(0), __func__,
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in_vreg[i].vreg_name);
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goto disable_vreg;
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}
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}
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} else {
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for (i = num_vreg-1; i >= 0; i--) {
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if (msm_dss_is_hw_controlled(in_vreg[i]))
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continue;
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if (in_vreg[i].pre_off_sleep)
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usleep_range(in_vreg[i].pre_off_sleep * 1000,
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(in_vreg[i].pre_off_sleep * 1000) + 10);
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regulator_set_load(in_vreg[i].vreg,
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in_vreg[i].disable_load);
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regulator_disable(in_vreg[i].vreg);
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if (in_vreg[i].post_off_sleep)
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usleep_range(in_vreg[i].post_off_sleep * 1000,
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(in_vreg[i].post_off_sleep * 1000) + 10);
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}
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}
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return rc;
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disable_vreg:
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regulator_set_load(in_vreg[i].vreg, in_vreg[i].disable_load);
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vreg_set_opt_mode_fail:
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for (i--; i >= 0; i--) {
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if (in_vreg[i].pre_off_sleep)
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usleep_range(in_vreg[i].pre_off_sleep * 1000,
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(in_vreg[i].pre_off_sleep * 1000) + 10);
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regulator_set_load(in_vreg[i].vreg,
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in_vreg[i].disable_load);
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regulator_disable(in_vreg[i].vreg);
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if (in_vreg[i].post_off_sleep)
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usleep_range(in_vreg[i].post_off_sleep * 1000,
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(in_vreg[i].post_off_sleep * 1000) + 10);
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}
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return rc;
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} /* msm_dss_enable_vreg */
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EXPORT_SYMBOL(msm_dss_enable_vreg);
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int msm_dss_enable_gpio(struct dss_gpio *in_gpio, int num_gpio, int enable)
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{
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int i = 0, rc = 0;
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if (enable) {
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for (i = 0; i < num_gpio; i++) {
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DEV_DBG("%pS->%s: %s enable\n",
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__builtin_return_address(0), __func__,
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in_gpio[i].gpio_name);
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rc = gpio_request(in_gpio[i].gpio,
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in_gpio[i].gpio_name);
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if (rc < 0) {
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DEV_ERR("%pS->%s: %s enable failed\n",
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__builtin_return_address(0), __func__,
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in_gpio[i].gpio_name);
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goto disable_gpio;
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}
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gpio_set_value(in_gpio[i].gpio, in_gpio[i].value);
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}
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} else {
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for (i = num_gpio-1; i >= 0; i--) {
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DEV_DBG("%pS->%s: %s disable\n",
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__builtin_return_address(0), __func__,
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in_gpio[i].gpio_name);
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if (in_gpio[i].gpio)
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gpio_free(in_gpio[i].gpio);
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}
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}
|
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return rc;
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|
|
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disable_gpio:
|
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for (i--; i >= 0; i--)
|
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if (in_gpio[i].gpio)
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gpio_free(in_gpio[i].gpio);
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|
|
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return rc;
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} /* msm_dss_enable_gpio */
|
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EXPORT_SYMBOL(msm_dss_enable_gpio);
|
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|
|
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void msm_dss_put_clk(struct dss_clk *clk_arry, int num_clk)
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|
{
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int i;
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|
|
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for (i = num_clk - 1; i >= 0; i--) {
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if (clk_arry[i].clk)
|
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clk_put(clk_arry[i].clk);
|
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clk_arry[i].clk = NULL;
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|
}
|
||
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} /* msm_dss_put_clk */
|
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EXPORT_SYMBOL(msm_dss_put_clk);
|
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|
|
||
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int msm_dss_get_clk(struct device *dev, struct dss_clk *clk_arry, int num_clk)
|
||
|
{
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int i, rc = 0;
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|
|
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for (i = 0; i < num_clk; i++) {
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clk_arry[i].clk = clk_get(dev, clk_arry[i].clk_name);
|
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rc = PTR_RET(clk_arry[i].clk);
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|
if (rc) {
|
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DEV_ERR("%pS->%s: '%s' get failed. rc=%d\n",
|
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|
__builtin_return_address(0), __func__,
|
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|
clk_arry[i].clk_name, rc);
|
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|
goto error;
|
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|
}
|
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|
}
|
||
|
|
||
|
return rc;
|
||
|
|
||
|
error:
|
||
|
for (i--; i >= 0; i--) {
|
||
|
if (clk_arry[i].clk)
|
||
|
clk_put(clk_arry[i].clk);
|
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|
clk_arry[i].clk = NULL;
|
||
|
}
|
||
|
|
||
|
return rc;
|
||
|
} /* msm_dss_get_clk */
|
||
|
EXPORT_SYMBOL(msm_dss_get_clk);
|
||
|
|
||
|
int msm_dss_single_clk_set_rate(struct dss_clk *clk)
|
||
|
{
|
||
|
int rc = 0;
|
||
|
|
||
|
if (!clk) {
|
||
|
DEV_ERR("invalid clk struct\n");
|
||
|
return -EINVAL;
|
||
|
}
|
||
|
|
||
|
DEV_DBG("%pS->%s: set_rate '%s'\n",
|
||
|
__builtin_return_address(0), __func__,
|
||
|
clk->clk_name);
|
||
|
|
||
|
if (clk->type != DSS_CLK_AHB) {
|
||
|
rc = clk_set_rate(clk->clk, clk->rate);
|
||
|
if (rc)
|
||
|
DEV_ERR("%pS->%s: %s failed. rc=%d\n",
|
||
|
__builtin_return_address(0),
|
||
|
__func__,
|
||
|
clk->clk_name, rc);
|
||
|
}
|
||
|
|
||
|
return rc;
|
||
|
} /* msm_dss_single_clk_set_rate */
|
||
|
EXPORT_SYMBOL(msm_dss_single_clk_set_rate);
|
||
|
|
||
|
int msm_dss_clk_set_rate(struct dss_clk *clk_arry, int num_clk)
|
||
|
{
|
||
|
int i, rc = 0;
|
||
|
|
||
|
for (i = 0; i < num_clk; i++) {
|
||
|
if (clk_arry[i].clk) {
|
||
|
rc = msm_dss_single_clk_set_rate(&clk_arry[i]);
|
||
|
if (rc)
|
||
|
break;
|
||
|
} else {
|
||
|
DEV_ERR("%pS->%s: '%s' is not available\n",
|
||
|
__builtin_return_address(0), __func__,
|
||
|
clk_arry[i].clk_name);
|
||
|
rc = -EPERM;
|
||
|
break;
|
||
|
}
|
||
|
}
|
||
|
|
||
|
return rc;
|
||
|
} /* msm_dss_clk_set_rate */
|
||
|
EXPORT_SYMBOL(msm_dss_clk_set_rate);
|
||
|
|
||
|
int msm_dss_enable_clk(struct dss_clk *clk_arry, int num_clk, int enable)
|
||
|
{
|
||
|
int i, rc = 0;
|
||
|
|
||
|
if (enable) {
|
||
|
for (i = 0; i < num_clk; i++) {
|
||
|
DEV_DBG("%pS->%s: enable '%s'\n",
|
||
|
__builtin_return_address(0), __func__,
|
||
|
clk_arry[i].clk_name);
|
||
|
if (clk_arry[i].clk) {
|
||
|
rc = clk_prepare_enable(clk_arry[i].clk);
|
||
|
if (rc)
|
||
|
DEV_ERR("%pS->%s: %s en fail. rc=%d\n",
|
||
|
__builtin_return_address(0),
|
||
|
__func__,
|
||
|
clk_arry[i].clk_name, rc);
|
||
|
} else {
|
||
|
DEV_ERR("%pS->%s: '%s' is not available\n",
|
||
|
__builtin_return_address(0), __func__,
|
||
|
clk_arry[i].clk_name);
|
||
|
rc = -EPERM;
|
||
|
}
|
||
|
|
||
|
if (rc) {
|
||
|
msm_dss_enable_clk(&clk_arry[i],
|
||
|
i, false);
|
||
|
break;
|
||
|
}
|
||
|
}
|
||
|
} else {
|
||
|
for (i = num_clk - 1; i >= 0; i--) {
|
||
|
DEV_DBG("%pS->%s: disable '%s'\n",
|
||
|
__builtin_return_address(0), __func__,
|
||
|
clk_arry[i].clk_name);
|
||
|
|
||
|
if (clk_arry[i].clk)
|
||
|
clk_disable_unprepare(clk_arry[i].clk);
|
||
|
else
|
||
|
DEV_ERR("%pS->%s: '%s' is not available\n",
|
||
|
__builtin_return_address(0), __func__,
|
||
|
clk_arry[i].clk_name);
|
||
|
}
|
||
|
}
|
||
|
|
||
|
return rc;
|
||
|
} /* msm_dss_enable_clk */
|
||
|
EXPORT_SYMBOL(msm_dss_enable_clk);
|
||
|
|
||
|
|
||
|
int sde_i2c_byte_read(struct i2c_client *client, uint8_t slave_addr,
|
||
|
uint8_t reg_offset, uint8_t *read_buf)
|
||
|
{
|
||
|
struct i2c_msg msgs[2];
|
||
|
int ret = -1;
|
||
|
|
||
|
pr_debug("%s: reading from slave_addr=[%x] and offset=[%x]\n",
|
||
|
__func__, slave_addr, reg_offset);
|
||
|
|
||
|
msgs[0].addr = slave_addr >> 1;
|
||
|
msgs[0].flags = 0;
|
||
|
msgs[0].buf = ®_offset;
|
||
|
msgs[0].len = 1;
|
||
|
|
||
|
msgs[1].addr = slave_addr >> 1;
|
||
|
msgs[1].flags = I2C_M_RD;
|
||
|
msgs[1].buf = read_buf;
|
||
|
msgs[1].len = 1;
|
||
|
|
||
|
ret = i2c_transfer(client->adapter, msgs, 2);
|
||
|
if (ret < 1) {
|
||
|
pr_err("%s: I2C READ FAILED=[%d]\n", __func__, ret);
|
||
|
return -EACCES;
|
||
|
}
|
||
|
pr_debug("%s: i2c buf is [%x]\n", __func__, *read_buf);
|
||
|
return 0;
|
||
|
}
|
||
|
EXPORT_SYMBOL(sde_i2c_byte_read);
|
||
|
|
||
|
int sde_i2c_byte_write(struct i2c_client *client, uint8_t slave_addr,
|
||
|
uint8_t reg_offset, uint8_t *value)
|
||
|
{
|
||
|
struct i2c_msg msgs[1];
|
||
|
uint8_t data[2];
|
||
|
int status = -EACCES;
|
||
|
|
||
|
pr_debug("%s: writing from slave_addr=[%x] and offset=[%x]\n",
|
||
|
__func__, slave_addr, reg_offset);
|
||
|
|
||
|
data[0] = reg_offset;
|
||
|
data[1] = *value;
|
||
|
|
||
|
msgs[0].addr = slave_addr >> 1;
|
||
|
msgs[0].flags = 0;
|
||
|
msgs[0].len = 2;
|
||
|
msgs[0].buf = data;
|
||
|
|
||
|
status = i2c_transfer(client->adapter, msgs, 1);
|
||
|
if (status < 1) {
|
||
|
pr_err("I2C WRITE FAILED=[%d]\n", status);
|
||
|
return -EACCES;
|
||
|
}
|
||
|
pr_debug("%s: I2C write status=%x\n", __func__, status);
|
||
|
return status;
|
||
|
}
|
||
|
EXPORT_SYMBOL(sde_i2c_byte_write);
|