[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-26 02:32:13 -04:00
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/*
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* Atomic operations that C can't guarantee us. Useful for
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* resource counting etc.
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*
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* But use these as seldom as possible since they are slower than
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* regular operations.
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*
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* Copyright (C) 2004-2006 Atmel Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_AVR32_ATOMIC_H
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#define __ASM_AVR32_ATOMIC_H
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#include <asm/system.h>
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typedef struct { volatile int counter; } atomic_t;
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#define ATOMIC_INIT(i) { (i) }
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#define atomic_read(v) ((v)->counter)
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#define atomic_set(v, i) (((v)->counter) = i)
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/*
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* atomic_sub_return - subtract the atomic variable
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* @i: integer value to subtract
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* @v: pointer of type atomic_t
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*
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* Atomically subtracts @i from @v. Returns the resulting value.
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*/
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static inline int atomic_sub_return(int i, atomic_t *v)
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{
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int result;
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asm volatile(
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"/* atomic_sub_return */\n"
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"1: ssrf 5\n"
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" ld.w %0, %2\n"
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" sub %0, %3\n"
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" stcond %1, %0\n"
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" brne 1b"
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: "=&r"(result), "=o"(v->counter)
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2006-10-24 04:12:42 -04:00
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: "m"(v->counter), "rKs21"(i)
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[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-26 02:32:13 -04:00
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: "cc");
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return result;
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}
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/*
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* atomic_add_return - add integer to atomic variable
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* @i: integer value to add
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* @v: pointer of type atomic_t
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*
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* Atomically adds @i to @v. Returns the resulting value.
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*/
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static inline int atomic_add_return(int i, atomic_t *v)
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{
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int result;
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2006-10-24 04:12:42 -04:00
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if (__builtin_constant_p(i) && (i >= -1048575) && (i <= 1048576))
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[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-26 02:32:13 -04:00
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result = atomic_sub_return(-i, v);
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else
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asm volatile(
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"/* atomic_add_return */\n"
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"1: ssrf 5\n"
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" ld.w %0, %1\n"
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" add %0, %3\n"
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" stcond %2, %0\n"
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" brne 1b"
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: "=&r"(result), "=o"(v->counter)
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: "m"(v->counter), "r"(i)
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: "cc", "memory");
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return result;
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}
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/*
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* atomic_sub_unless - sub unless the number is a given value
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* @v: pointer of type atomic_t
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* @a: the amount to add to v...
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* @u: ...unless v is equal to u.
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*
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* If the atomic value v is not equal to u, this function subtracts a
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* from v, and returns non zero. If v is equal to u then it returns
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* zero. This is done as an atomic operation.
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*/
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static inline int atomic_sub_unless(atomic_t *v, int a, int u)
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{
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int tmp, result = 0;
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asm volatile(
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"/* atomic_sub_unless */\n"
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"1: ssrf 5\n"
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" ld.w %0, %3\n"
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" cp.w %0, %5\n"
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" breq 1f\n"
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" sub %0, %4\n"
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" stcond %2, %0\n"
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" brne 1b\n"
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" mov %1, 1\n"
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"1:"
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: "=&r"(tmp), "=&r"(result), "=o"(v->counter)
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2006-10-24 04:12:42 -04:00
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: "m"(v->counter), "rKs21"(a), "rKs21"(u)
|
[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-26 02:32:13 -04:00
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: "cc", "memory");
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return result;
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}
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/*
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* atomic_add_unless - add unless the number is a given value
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* @v: pointer of type atomic_t
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* @a: the amount to add to v...
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* @u: ...unless v is equal to u.
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*
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* If the atomic value v is not equal to u, this function adds a to v,
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* and returns non zero. If v is equal to u then it returns zero. This
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* is done as an atomic operation.
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*/
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static inline int atomic_add_unless(atomic_t *v, int a, int u)
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{
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int tmp, result;
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2006-10-24 04:12:42 -04:00
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if (__builtin_constant_p(a) && (a >= -1048575) && (a <= 1048576))
|
[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-26 02:32:13 -04:00
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result = atomic_sub_unless(v, -a, u);
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else {
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result = 0;
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asm volatile(
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"/* atomic_add_unless */\n"
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"1: ssrf 5\n"
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" ld.w %0, %3\n"
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" cp.w %0, %5\n"
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" breq 1f\n"
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" add %0, %4\n"
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" stcond %2, %0\n"
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" brne 1b\n"
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" mov %1, 1\n"
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"1:"
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: "=&r"(tmp), "=&r"(result), "=o"(v->counter)
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: "m"(v->counter), "r"(a), "ir"(u)
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: "cc", "memory");
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}
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return result;
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}
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/*
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* atomic_sub_if_positive - conditionally subtract integer from atomic variable
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* @i: integer value to subtract
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* @v: pointer of type atomic_t
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*
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* Atomically test @v and subtract @i if @v is greater or equal than @i.
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* The function returns the old value of @v minus @i.
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*/
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static inline int atomic_sub_if_positive(int i, atomic_t *v)
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{
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int result;
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asm volatile(
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"/* atomic_sub_if_positive */\n"
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"1: ssrf 5\n"
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" ld.w %0, %2\n"
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" sub %0, %3\n"
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" brlt 1f\n"
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" stcond %1, %0\n"
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" brne 1b\n"
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"1:"
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: "=&r"(result), "=o"(v->counter)
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: "m"(v->counter), "ir"(i)
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: "cc", "memory");
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return result;
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}
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#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
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#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n)))
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#define atomic_sub(i, v) (void)atomic_sub_return(i, v)
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#define atomic_add(i, v) (void)atomic_add_return(i, v)
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#define atomic_dec(v) atomic_sub(1, (v))
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#define atomic_inc(v) atomic_add(1, (v))
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#define atomic_dec_return(v) atomic_sub_return(1, v)
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#define atomic_inc_return(v) atomic_add_return(1, v)
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#define atomic_sub_and_test(i, v) (atomic_sub_return(i, v) == 0)
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#define atomic_inc_and_test(v) (atomic_add_return(1, v) == 0)
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#define atomic_dec_and_test(v) (atomic_sub_return(1, v) == 0)
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#define atomic_add_negative(i, v) (atomic_add_return(i, v) < 0)
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#define atomic_inc_not_zero(v) atomic_add_unless(v, 1, 0)
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#define atomic_dec_if_positive(v) atomic_sub_if_positive(1, v)
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#define smp_mb__before_atomic_dec() barrier()
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#define smp_mb__after_atomic_dec() barrier()
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#define smp_mb__before_atomic_inc() barrier()
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#define smp_mb__after_atomic_inc() barrier()
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#include <asm-generic/atomic.h>
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#endif /* __ASM_AVR32_ATOMIC_H */
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