2005-12-04 02:39:43 -05:00
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/*
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* Architecture specific (PPC64) functions for kexec based crash dumps.
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*
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* Copyright (C) 2005, IBM Corp.
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*
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* Created by: Haren Myneni
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*
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* This source code is licensed under the GNU General Public License,
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* Version 2. See the file COPYING for more details.
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*
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*/
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#undef DEBUG
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#include <linux/kernel.h>
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#include <linux/smp.h>
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#include <linux/reboot.h>
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#include <linux/kexec.h>
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#include <linux/bootmem.h>
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#include <linux/crash_dump.h>
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#include <linux/delay.h>
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#include <linux/elf.h>
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#include <linux/elfcore.h>
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#include <linux/init.h>
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2006-04-04 07:43:01 -04:00
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#include <linux/irq.h>
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2005-12-04 02:39:43 -05:00
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#include <linux/types.h>
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#include <asm/processor.h>
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#include <asm/machdep.h>
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2006-06-23 18:29:34 -04:00
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#include <asm/kexec.h>
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2005-12-04 02:39:43 -05:00
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#include <asm/kdump.h>
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#include <asm/lmb.h>
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#include <asm/firmware.h>
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2006-01-10 22:25:25 -05:00
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#include <asm/smp.h>
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2005-12-04 02:39:43 -05:00
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#ifdef DEBUG
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#include <asm/udbg.h>
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#define DBG(fmt...) udbg_printf(fmt)
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#else
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#define DBG(fmt...)
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#endif
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/* This keeps a track of which one is crashing cpu. */
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int crashing_cpu = -1;
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2006-06-23 18:29:34 -04:00
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static cpumask_t cpus_in_crash = CPU_MASK_NONE;
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2006-07-05 00:39:43 -04:00
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cpumask_t cpus_in_sr = CPU_MASK_NONE;
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2005-12-04 02:39:43 -05:00
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#ifdef CONFIG_SMP
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2006-06-23 18:29:34 -04:00
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static atomic_t enter_on_soft_reset = ATOMIC_INIT(0);
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2005-12-04 02:39:43 -05:00
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void crash_ipi_callback(struct pt_regs *regs)
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{
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int cpu = smp_processor_id();
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if (!cpu_online(cpu))
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return;
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[POWERPC] Lazy interrupt disabling for 64-bit machines
This implements a lazy strategy for disabling interrupts. This means
that local_irq_disable() et al. just clear the 'interrupts are
enabled' flag in the paca. If an interrupt comes along, the interrupt
entry code notices that interrupts are supposed to be disabled, and
clears the EE bit in SRR1, clears the 'interrupts are hard-enabled'
flag in the paca, and returns. This means that interrupts only
actually get disabled in the processor when an interrupt comes along.
When interrupts are enabled by local_irq_enable() et al., the code
sets the interrupts-enabled flag in the paca, and then checks whether
interrupts got hard-disabled. If so, it also sets the EE bit in the
MSR to hard-enable the interrupts.
This has the potential to improve performance, and also makes it
easier to make a kernel that can boot on iSeries and on other 64-bit
machines, since this lazy-disable strategy is very similar to the
soft-disable strategy that iSeries already uses.
This version renames paca->proc_enabled to paca->soft_enabled, and
changes a couple of soft-disables in the kexec code to hard-disables,
which should fix the crash that Michael Ellerman saw. This doesn't
yet use a reserved CR field for the soft_enabled and hard_enabled
flags. This applies on top of Stephen Rothwell's patches to make it
possible to build a combined iSeries/other kernel.
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-10-04 02:47:49 -04:00
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hard_irq_disable();
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2006-06-23 18:29:34 -04:00
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if (!cpu_isset(cpu, cpus_in_crash))
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2006-12-06 23:40:41 -05:00
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crash_save_cpu(regs, cpu);
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2006-06-23 18:29:34 -04:00
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cpu_set(cpu, cpus_in_crash);
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2005-12-04 02:39:43 -05:00
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2006-06-23 18:29:34 -04:00
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/*
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* Entered via soft-reset - could be the kdump
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* process is invoked using soft-reset or user activated
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* it if some CPU did not respond to an IPI.
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* For soft-reset, the secondary CPU can enter this func
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* twice. 1 - using IPI, and 2. soft-reset.
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* Tell the kexec CPU that entered via soft-reset and ready
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* to go down.
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*/
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if (cpu_isset(cpu, cpus_in_sr)) {
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cpu_clear(cpu, cpus_in_sr);
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atomic_inc(&enter_on_soft_reset);
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}
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/*
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* Starting the kdump boot.
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* This barrier is needed to make sure that all CPUs are stopped.
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* If not, soft-reset will be invoked to bring other CPUs.
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*/
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while (!cpu_isset(crashing_cpu, cpus_in_crash))
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cpu_relax();
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if (ppc_md.kexec_cpu_down)
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ppc_md.kexec_cpu_down(1, 1);
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2006-07-05 00:39:43 -04:00
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#ifdef CONFIG_PPC64
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2005-12-04 02:39:43 -05:00
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kexec_smp_wait();
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2006-07-05 00:39:43 -04:00
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#else
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for (;;); /* FIXME */
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#endif
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2005-12-04 02:39:43 -05:00
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/* NOTREACHED */
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}
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2006-06-23 18:29:34 -04:00
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/*
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* Wait until all CPUs are entered via soft-reset.
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*/
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static void crash_soft_reset_check(int cpu)
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{
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unsigned int ncpus = num_online_cpus() - 1;/* Excluding the panic cpu */
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cpu_clear(cpu, cpus_in_sr);
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while (atomic_read(&enter_on_soft_reset) != ncpus)
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cpu_relax();
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}
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static void crash_kexec_prepare_cpus(int cpu)
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2005-12-04 02:39:43 -05:00
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{
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unsigned int msecs;
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2006-06-23 18:29:34 -04:00
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unsigned int ncpus = num_online_cpus() - 1;/* Excluding the panic cpu */
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2005-12-04 02:39:43 -05:00
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crash_send_ipi(crash_ipi_callback);
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smp_wmb();
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/*
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* FIXME: Until we will have the way to stop other CPUSs reliabally,
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* the crash CPU will send an IPI and wait for other CPUs to
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2006-06-23 18:29:34 -04:00
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* respond.
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2006-02-07 18:47:03 -05:00
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* Delay of at least 10 seconds.
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2005-12-04 02:39:43 -05:00
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*/
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2006-06-23 18:29:34 -04:00
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printk(KERN_EMERG "Sending IPI to other cpus...\n");
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2006-02-07 18:47:03 -05:00
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msecs = 10000;
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2006-06-23 18:29:34 -04:00
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while ((cpus_weight(cpus_in_crash) < ncpus) && (--msecs > 0)) {
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cpu_relax();
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2005-12-04 02:39:43 -05:00
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mdelay(1);
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}
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/* Would it be better to replace the trap vector here? */
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/*
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* FIXME: In case if we do not get all CPUs, one possibility: ask the
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* user to do soft reset such that we get all.
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2006-06-23 18:29:34 -04:00
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* Soft-reset will be used until better mechanism is implemented.
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*/
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if (cpus_weight(cpus_in_crash) < ncpus) {
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printk(KERN_EMERG "done waiting: %d cpu(s) not responding\n",
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ncpus - cpus_weight(cpus_in_crash));
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printk(KERN_EMERG "Activate soft-reset to stop other cpu(s)\n");
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cpus_in_sr = CPU_MASK_NONE;
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atomic_set(&enter_on_soft_reset, 0);
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while (cpus_weight(cpus_in_crash) < ncpus)
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cpu_relax();
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}
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/*
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* Make sure all CPUs are entered via soft-reset if the kdump is
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* invoked using soft-reset.
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2005-12-04 02:39:43 -05:00
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*/
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2006-06-23 18:29:34 -04:00
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if (cpu_isset(cpu, cpus_in_sr))
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crash_soft_reset_check(cpu);
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2005-12-04 02:39:43 -05:00
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/* Leave the IPI callback set */
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}
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2006-06-23 18:29:34 -04:00
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/*
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* This function will be called by secondary cpus or by kexec cpu
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* if soft-reset is activated to stop some CPUs.
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*/
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void crash_kexec_secondary(struct pt_regs *regs)
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{
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int cpu = smp_processor_id();
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unsigned long flags;
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int msecs = 5;
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local_irq_save(flags);
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/* Wait 5ms if the kexec CPU is not entered yet. */
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while (crashing_cpu < 0) {
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if (--msecs < 0) {
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/*
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* Either kdump image is not loaded or
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* kdump process is not started - Probably xmon
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* exited using 'x'(exit and recover) or
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* kexec_should_crash() failed for all running tasks.
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*/
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cpu_clear(cpu, cpus_in_sr);
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local_irq_restore(flags);
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return;
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}
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mdelay(1);
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cpu_relax();
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}
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if (cpu == crashing_cpu) {
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/*
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* Panic CPU will enter this func only via soft-reset.
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* Wait until all secondary CPUs entered and
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* then start kexec boot.
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*/
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crash_soft_reset_check(cpu);
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cpu_set(crashing_cpu, cpus_in_crash);
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if (ppc_md.kexec_cpu_down)
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ppc_md.kexec_cpu_down(1, 0);
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machine_kexec(kexec_crash_image);
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/* NOTREACHED */
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}
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crash_ipi_callback(regs);
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}
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2005-12-04 02:39:43 -05:00
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#else
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2006-06-23 18:29:34 -04:00
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static void crash_kexec_prepare_cpus(int cpu)
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2005-12-04 02:39:43 -05:00
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{
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/*
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* move the secondarys to us so that we can copy
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* the new kernel 0-0x100 safely
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*
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* do this if kexec in setup.c ?
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*/
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2006-07-05 00:39:43 -04:00
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#ifdef CONFIG_PPC64
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2005-12-04 02:39:43 -05:00
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smp_release_cpus();
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2006-07-05 00:39:43 -04:00
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#else
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/* FIXME */
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#endif
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2005-12-04 02:39:43 -05:00
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}
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2006-06-23 18:29:34 -04:00
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void crash_kexec_secondary(struct pt_regs *regs)
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{
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cpus_in_sr = CPU_MASK_NONE;
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}
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2005-12-04 02:39:43 -05:00
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#endif
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2007-07-20 15:39:27 -04:00
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#ifdef CONFIG_SPU_BASE
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#include <asm/spu.h>
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#include <asm/spu_priv1.h>
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struct crash_spu_info {
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struct spu *spu;
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u32 saved_spu_runcntl_RW;
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u32 saved_spu_status_R;
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u32 saved_spu_npc_RW;
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u64 saved_mfc_sr1_RW;
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u64 saved_mfc_dar;
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u64 saved_mfc_dsisr;
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};
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#define CRASH_NUM_SPUS 16 /* Enough for current hardware */
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static struct crash_spu_info crash_spu_info[CRASH_NUM_SPUS];
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static void crash_kexec_stop_spus(void)
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{
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struct spu *spu;
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int i;
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u64 tmp;
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for (i = 0; i < CRASH_NUM_SPUS; i++) {
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if (!crash_spu_info[i].spu)
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continue;
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spu = crash_spu_info[i].spu;
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crash_spu_info[i].saved_spu_runcntl_RW =
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in_be32(&spu->problem->spu_runcntl_RW);
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crash_spu_info[i].saved_spu_status_R =
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in_be32(&spu->problem->spu_status_R);
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crash_spu_info[i].saved_spu_npc_RW =
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in_be32(&spu->problem->spu_npc_RW);
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crash_spu_info[i].saved_mfc_dar = spu_mfc_dar_get(spu);
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crash_spu_info[i].saved_mfc_dsisr = spu_mfc_dsisr_get(spu);
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tmp = spu_mfc_sr1_get(spu);
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crash_spu_info[i].saved_mfc_sr1_RW = tmp;
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tmp &= ~MFC_STATE1_MASTER_RUN_CONTROL_MASK;
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spu_mfc_sr1_set(spu, tmp);
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__delay(200);
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}
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}
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void crash_register_spus(struct list_head *list)
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{
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struct spu *spu;
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list_for_each_entry(spu, list, full_list) {
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if (WARN_ON(spu->number >= CRASH_NUM_SPUS))
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continue;
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crash_spu_info[spu->number].spu = spu;
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}
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}
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#else
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static inline void crash_kexec_stop_spus(void)
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{
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}
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#endif /* CONFIG_SPU_BASE */
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2005-12-04 02:39:43 -05:00
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void default_machine_crash_shutdown(struct pt_regs *regs)
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{
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2006-04-04 07:43:01 -04:00
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unsigned int irq;
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2005-12-04 02:39:43 -05:00
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/*
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* This function is only called after the system
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2006-06-26 12:30:00 -04:00
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* has panicked or is otherwise in a critical state.
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2005-12-04 02:39:43 -05:00
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* The minimum amount of code to allow a kexec'd kernel
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* to run successfully needs to happen here.
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*
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* In practice this means stopping other cpus in
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* an SMP system.
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* The kernel is broken so disable interrupts.
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*/
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[POWERPC] Lazy interrupt disabling for 64-bit machines
This implements a lazy strategy for disabling interrupts. This means
that local_irq_disable() et al. just clear the 'interrupts are
enabled' flag in the paca. If an interrupt comes along, the interrupt
entry code notices that interrupts are supposed to be disabled, and
clears the EE bit in SRR1, clears the 'interrupts are hard-enabled'
flag in the paca, and returns. This means that interrupts only
actually get disabled in the processor when an interrupt comes along.
When interrupts are enabled by local_irq_enable() et al., the code
sets the interrupts-enabled flag in the paca, and then checks whether
interrupts got hard-disabled. If so, it also sets the EE bit in the
MSR to hard-enable the interrupts.
This has the potential to improve performance, and also makes it
easier to make a kernel that can boot on iSeries and on other 64-bit
machines, since this lazy-disable strategy is very similar to the
soft-disable strategy that iSeries already uses.
This version renames paca->proc_enabled to paca->soft_enabled, and
changes a couple of soft-disables in the kexec code to hard-disables,
which should fix the crash that Michael Ellerman saw. This doesn't
yet use a reserved CR field for the soft_enabled and hard_enabled
flags. This applies on top of Stephen Rothwell's patches to make it
possible to build a combined iSeries/other kernel.
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-10-04 02:47:49 -04:00
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|
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hard_irq_disable();
|
2005-12-04 02:39:43 -05:00
|
|
|
|
2006-04-04 07:43:01 -04:00
|
|
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for_each_irq(irq) {
|
2006-06-29 05:24:38 -04:00
|
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struct irq_desc *desc = irq_desc + irq;
|
2006-04-04 07:43:01 -04:00
|
|
|
|
|
|
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if (desc->status & IRQ_INPROGRESS)
|
2006-09-12 08:18:21 -04:00
|
|
|
desc->chip->eoi(irq);
|
2006-04-04 07:43:01 -04:00
|
|
|
|
|
|
|
if (!(desc->status & IRQ_DISABLED))
|
[PATCH] genirq: rename desc->handler to desc->chip
This patch-queue improves the generic IRQ layer to be truly generic, by adding
various abstractions and features to it, without impacting existing
functionality.
While the queue can be best described as "fix and improve everything in the
generic IRQ layer that we could think of", and thus it consists of many
smaller features and lots of cleanups, the one feature that stands out most is
the new 'irq chip' abstraction.
The irq-chip abstraction is about describing and coding and IRQ controller
driver by mapping its raw hardware capabilities [and quirks, if needed] in a
straightforward way, without having to think about "IRQ flow"
(level/edge/etc.) type of details.
This stands in contrast with the current 'irq-type' model of genirq
architectures, which 'mixes' raw hardware capabilities with 'flow' details.
The patchset supports both types of irq controller designs at once, and
converts i386 and x86_64 to the new irq-chip design.
As a bonus side-effect of the irq-chip approach, chained interrupt controllers
(master/slave PIC constructs, etc.) are now supported by design as well.
The end result of this patchset intends to be simpler architecture-level code
and more consolidation between architectures.
We reused many bits of code and many concepts from Russell King's ARM IRQ
layer, the merging of which was one of the motivations for this patchset.
This patch:
rename desc->handler to desc->chip.
Originally i did not want to do this, because it's a big patch. But having
both "desc->handler", "desc->handle_irq" and "action->handler" caused a
large degree of confusion and made the code appear alot less clean than it
truly is.
I have also attempted a dual approach as well by introducing a
desc->chip alias - but that just wasnt robust enough and broke
frequently.
So lets get over with this quickly. The conversion was done automatically
via scripts and converts all the code in the kernel.
This renaming patch is the first one amongst the patches, so that the
remaining patches can stay flexible and can be merged and split up
without having some big monolithic patch act as a merge barrier.
[akpm@osdl.org: build fix]
[akpm@osdl.org: another build fix]
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-06-29 05:24:36 -04:00
|
|
|
desc->chip->disable(irq);
|
2006-04-04 07:43:01 -04:00
|
|
|
}
|
|
|
|
|
2005-12-04 02:39:43 -05:00
|
|
|
/*
|
|
|
|
* Make a note of crashing cpu. Will be used in machine_kexec
|
|
|
|
* such that another IPI will not be sent.
|
|
|
|
*/
|
|
|
|
crashing_cpu = smp_processor_id();
|
2006-12-06 23:40:41 -05:00
|
|
|
crash_save_cpu(regs, crashing_cpu);
|
2006-06-23 18:29:34 -04:00
|
|
|
crash_kexec_prepare_cpus(crashing_cpu);
|
|
|
|
cpu_set(crashing_cpu, cpus_in_crash);
|
2007-07-20 15:39:27 -04:00
|
|
|
crash_kexec_stop_spus();
|
2006-06-23 18:29:34 -04:00
|
|
|
if (ppc_md.kexec_cpu_down)
|
|
|
|
ppc_md.kexec_cpu_down(1, 0);
|
2005-12-04 02:39:43 -05:00
|
|
|
}
|