2005-04-16 18:20:36 -04:00
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/*
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TDA10021 - Single Chip Cable Channel Receiver driver module
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used on the the Siemens DVB-C cards
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Copyright (C) 1999 Convergence Integrated Media GmbH <ralph@convergence.de>
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Copyright (C) 2004 Markus Schulz <msc@antzsystem.de>
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Support for TDA10021
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/config.h>
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#include <linux/delay.h>
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#include <linux/errno.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/string.h>
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#include <linux/slab.h>
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#include "dvb_frontend.h"
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#include "tda10021.h"
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struct tda10021_state {
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struct i2c_adapter* i2c;
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struct dvb_frontend_ops ops;
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/* configuration settings */
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const struct tda10021_config* config;
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struct dvb_frontend frontend;
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u8 pwm;
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u8 reg0;
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};
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#if 0
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#define dprintk(x...) printk(x)
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#else
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#define dprintk(x...)
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#endif
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static int verbose;
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#define XIN 57840000UL
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#define DISABLE_INVERSION(reg0) do { reg0 |= 0x20; } while (0)
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#define ENABLE_INVERSION(reg0) do { reg0 &= ~0x20; } while (0)
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#define HAS_INVERSION(reg0) (!(reg0 & 0x20))
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#define FIN (XIN >> 4)
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static int tda10021_inittab_size = 0x40;
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static u8 tda10021_inittab[0x40]=
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{
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0x73, 0x6a, 0x23, 0x0a, 0x02, 0x37, 0x77, 0x1a,
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0x37, 0x6a, 0x17, 0x8a, 0x1e, 0x86, 0x43, 0x40,
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0xb8, 0x3f, 0xa0, 0x00, 0xcd, 0x01, 0x00, 0xff,
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0x11, 0x00, 0x7c, 0x31, 0x30, 0x20, 0x00, 0x00,
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0x02, 0x00, 0x00, 0x7d, 0x00, 0x00, 0x00, 0x00,
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0x07, 0x00, 0x33, 0x11, 0x0d, 0x95, 0x08, 0x58,
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0x00, 0x00, 0x80, 0x00, 0x80, 0xff, 0x00, 0x00,
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0x04, 0x2d, 0x2f, 0xff, 0x00, 0x00, 0x00, 0x00,
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};
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static int tda10021_writereg (struct tda10021_state* state, u8 reg, u8 data)
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{
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u8 buf[] = { reg, data };
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struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = 2 };
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int ret;
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ret = i2c_transfer (state->i2c, &msg, 1);
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if (ret != 1)
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printk("DVB: TDA10021(%d): %s, writereg error "
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"(reg == 0x%02x, val == 0x%02x, ret == %i)\n",
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state->frontend.dvb->num, __FUNCTION__, reg, data, ret);
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msleep(10);
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return (ret != 1) ? -EREMOTEIO : 0;
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}
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static u8 tda10021_readreg (struct tda10021_state* state, u8 reg)
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{
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u8 b0 [] = { reg };
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u8 b1 [] = { 0 };
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struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 1 },
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{ .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b1, .len = 1 } };
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int ret;
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ret = i2c_transfer (state->i2c, msg, 2);
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if (ret != 2)
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printk("DVB: TDA10021(%d): %s: readreg error (ret == %i)\n",
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state->frontend.dvb->num, __FUNCTION__, ret);
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return b1[0];
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}
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//get access to tuner
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static int lock_tuner(struct tda10021_state* state)
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{
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u8 buf[2] = { 0x0f, tda10021_inittab[0x0f] | 0x80 };
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struct i2c_msg msg = {.addr=state->config->demod_address, .flags=0, .buf=buf, .len=2};
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if(i2c_transfer(state->i2c, &msg, 1) != 1)
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{
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printk("tda10021: lock tuner fails\n");
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return -EREMOTEIO;
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}
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return 0;
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}
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//release access from tuner
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static int unlock_tuner(struct tda10021_state* state)
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{
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u8 buf[2] = { 0x0f, tda10021_inittab[0x0f] & 0x7f };
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struct i2c_msg msg_post={.addr=state->config->demod_address, .flags=0, .buf=buf, .len=2};
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if(i2c_transfer(state->i2c, &msg_post, 1) != 1)
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{
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printk("tda10021: unlock tuner fails\n");
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return -EREMOTEIO;
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}
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return 0;
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}
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static int tda10021_setup_reg0 (struct tda10021_state* state, u8 reg0,
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fe_spectral_inversion_t inversion)
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{
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reg0 |= state->reg0 & 0x63;
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if (INVERSION_ON == inversion)
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ENABLE_INVERSION(reg0);
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else if (INVERSION_OFF == inversion)
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DISABLE_INVERSION(reg0);
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tda10021_writereg (state, 0x00, reg0 & 0xfe);
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tda10021_writereg (state, 0x00, reg0 | 0x01);
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state->reg0 = reg0;
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return 0;
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}
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static int tda10021_set_symbolrate (struct tda10021_state* state, u32 symbolrate)
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{
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s32 BDR;
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s32 BDRI;
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s16 SFIL=0;
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u16 NDEC = 0;
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u32 tmp, ratio;
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if (symbolrate > XIN/2)
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symbolrate = XIN/2;
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if (symbolrate < 500000)
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symbolrate = 500000;
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if (symbolrate < XIN/16) NDEC = 1;
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if (symbolrate < XIN/32) NDEC = 2;
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if (symbolrate < XIN/64) NDEC = 3;
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if (symbolrate < (u32)(XIN/12.3)) SFIL = 1;
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if (symbolrate < (u32)(XIN/16)) SFIL = 0;
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if (symbolrate < (u32)(XIN/24.6)) SFIL = 1;
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if (symbolrate < (u32)(XIN/32)) SFIL = 0;
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if (symbolrate < (u32)(XIN/49.2)) SFIL = 1;
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if (symbolrate < (u32)(XIN/64)) SFIL = 0;
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if (symbolrate < (u32)(XIN/98.4)) SFIL = 1;
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symbolrate <<= NDEC;
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ratio = (symbolrate << 4) / FIN;
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tmp = ((symbolrate << 4) % FIN) << 8;
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ratio = (ratio << 8) + tmp / FIN;
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tmp = (tmp % FIN) << 8;
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ratio = (ratio << 8) + (tmp + FIN/2) / FIN;
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BDR = ratio;
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BDRI = (((XIN << 5) / symbolrate) + 1) / 2;
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if (BDRI > 0xFF)
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BDRI = 0xFF;
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SFIL = (SFIL << 4) | tda10021_inittab[0x0E];
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NDEC = (NDEC << 6) | tda10021_inittab[0x03];
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tda10021_writereg (state, 0x03, NDEC);
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tda10021_writereg (state, 0x0a, BDR&0xff);
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tda10021_writereg (state, 0x0b, (BDR>> 8)&0xff);
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tda10021_writereg (state, 0x0c, (BDR>>16)&0x3f);
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tda10021_writereg (state, 0x0d, BDRI);
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tda10021_writereg (state, 0x0e, SFIL);
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return 0;
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}
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static int tda10021_init (struct dvb_frontend *fe)
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{
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2005-05-17 00:54:31 -04:00
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struct tda10021_state* state = fe->demodulator_priv;
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2005-04-16 18:20:36 -04:00
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int i;
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dprintk("DVB: TDA10021(%d): init chip\n", fe->adapter->num);
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//tda10021_writereg (fe, 0, 0);
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for (i=0; i<tda10021_inittab_size; i++)
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tda10021_writereg (state, i, tda10021_inittab[i]);
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tda10021_writereg (state, 0x34, state->pwm);
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//Comment by markus
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//0x2A[3-0] == PDIV -> P multiplaying factor (P=PDIV+1)(default 0)
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//0x2A[4] == BYPPLL -> Power down mode (default 1)
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//0x2A[5] == LCK -> PLL Lock Flag
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//0x2A[6] == POLAXIN -> Polarity of the input reference clock (default 0)
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//Activate PLL
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tda10021_writereg(state, 0x2a, tda10021_inittab[0x2a] & 0xef);
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if (state->config->pll_init) {
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lock_tuner(state);
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state->config->pll_init(fe);
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unlock_tuner(state);
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}
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return 0;
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}
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static int tda10021_set_parameters (struct dvb_frontend *fe,
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struct dvb_frontend_parameters *p)
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{
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2005-05-17 00:54:31 -04:00
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struct tda10021_state* state = fe->demodulator_priv;
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2005-04-16 18:20:36 -04:00
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//table for QAM4-QAM256 ready QAM4 QAM16 QAM32 QAM64 QAM128 QAM256
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//CONF
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static const u8 reg0x00 [] = { 0x14, 0x00, 0x04, 0x08, 0x0c, 0x10 };
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//AGCREF value
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static const u8 reg0x01 [] = { 0x78, 0x8c, 0x8c, 0x6a, 0x78, 0x5c };
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//LTHR value
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static const u8 reg0x05 [] = { 0x78, 0x87, 0x64, 0x46, 0x36, 0x26 };
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//MSETH
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static const u8 reg0x08 [] = { 0x8c, 0xa2, 0x74, 0x43, 0x34, 0x23 };
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//AREF
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static const u8 reg0x09 [] = { 0x96, 0x91, 0x96, 0x6a, 0x7e, 0x6b };
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int qam = p->u.qam.modulation;
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if (qam < 0 || qam > 5)
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return -EINVAL;
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//printk("tda10021: set frequency to %d qam=%d symrate=%d\n", p->frequency,qam,p->u.qam.symbol_rate);
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lock_tuner(state);
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state->config->pll_set(fe, p);
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unlock_tuner(state);
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tda10021_set_symbolrate (state, p->u.qam.symbol_rate);
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tda10021_writereg (state, 0x34, state->pwm);
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tda10021_writereg (state, 0x01, reg0x01[qam]);
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tda10021_writereg (state, 0x05, reg0x05[qam]);
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tda10021_writereg (state, 0x08, reg0x08[qam]);
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tda10021_writereg (state, 0x09, reg0x09[qam]);
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tda10021_setup_reg0 (state, reg0x00[qam], p->inversion);
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return 0;
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}
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static int tda10021_read_status(struct dvb_frontend* fe, fe_status_t* status)
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{
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2005-05-17 00:54:31 -04:00
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struct tda10021_state* state = fe->demodulator_priv;
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2005-04-16 18:20:36 -04:00
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int sync;
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*status = 0;
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//0x11[0] == EQALGO -> Equalizer algorithms state
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//0x11[1] == CARLOCK -> Carrier locked
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//0x11[2] == FSYNC -> Frame synchronisation
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//0x11[3] == FEL -> Front End locked
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//0x11[6] == NODVB -> DVB Mode Information
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sync = tda10021_readreg (state, 0x11);
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if (sync & 2)
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*status |= FE_HAS_SIGNAL|FE_HAS_CARRIER;
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if (sync & 4)
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*status |= FE_HAS_SYNC|FE_HAS_VITERBI;
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if (sync & 8)
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*status |= FE_HAS_LOCK;
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return 0;
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}
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static int tda10021_read_ber(struct dvb_frontend* fe, u32* ber)
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{
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2005-05-17 00:54:31 -04:00
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struct tda10021_state* state = fe->demodulator_priv;
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2005-04-16 18:20:36 -04:00
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u32 _ber = tda10021_readreg(state, 0x14) |
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(tda10021_readreg(state, 0x15) << 8) |
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((tda10021_readreg(state, 0x16) & 0x0f) << 16);
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*ber = 10 * _ber;
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return 0;
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}
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static int tda10021_read_signal_strength(struct dvb_frontend* fe, u16* strength)
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{
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2005-05-17 00:54:31 -04:00
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struct tda10021_state* state = fe->demodulator_priv;
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2005-04-16 18:20:36 -04:00
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u8 gain = tda10021_readreg(state, 0x17);
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*strength = (gain << 8) | gain;
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return 0;
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}
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static int tda10021_read_snr(struct dvb_frontend* fe, u16* snr)
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{
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2005-05-17 00:54:31 -04:00
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struct tda10021_state* state = fe->demodulator_priv;
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2005-04-16 18:20:36 -04:00
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u8 quality = ~tda10021_readreg(state, 0x18);
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*snr = (quality << 8) | quality;
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|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int tda10021_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
|
|
|
|
{
|
2005-05-17 00:54:31 -04:00
|
|
|
struct tda10021_state* state = fe->demodulator_priv;
|
2005-04-16 18:20:36 -04:00
|
|
|
|
|
|
|
*ucblocks = tda10021_readreg (state, 0x13) & 0x7f;
|
|
|
|
if (*ucblocks == 0x7f)
|
|
|
|
*ucblocks = 0xffffffff;
|
|
|
|
|
|
|
|
/* reset uncorrected block counter */
|
|
|
|
tda10021_writereg (state, 0x10, tda10021_inittab[0x10] & 0xdf);
|
|
|
|
tda10021_writereg (state, 0x10, tda10021_inittab[0x10]);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int tda10021_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p)
|
|
|
|
{
|
2005-05-17 00:54:31 -04:00
|
|
|
struct tda10021_state* state = fe->demodulator_priv;
|
2005-04-16 18:20:36 -04:00
|
|
|
int sync;
|
|
|
|
s8 afc = 0;
|
|
|
|
|
|
|
|
sync = tda10021_readreg(state, 0x11);
|
|
|
|
afc = tda10021_readreg(state, 0x19);
|
|
|
|
if (verbose) {
|
|
|
|
/* AFC only valid when carrier has been recovered */
|
|
|
|
printk(sync & 2 ? "DVB: TDA10021(%d): AFC (%d) %dHz\n" :
|
|
|
|
"DVB: TDA10021(%d): [AFC (%d) %dHz]\n",
|
|
|
|
state->frontend.dvb->num, afc,
|
|
|
|
-((s32)p->u.qam.symbol_rate * afc) >> 10);
|
|
|
|
}
|
|
|
|
|
|
|
|
p->inversion = HAS_INVERSION(state->reg0) ? INVERSION_ON : INVERSION_OFF;
|
|
|
|
p->u.qam.modulation = ((state->reg0 >> 2) & 7) + QAM_16;
|
|
|
|
|
|
|
|
p->u.qam.fec_inner = FEC_NONE;
|
|
|
|
p->frequency = ((p->frequency + 31250) / 62500) * 62500;
|
|
|
|
|
|
|
|
if (sync & 2)
|
|
|
|
p->frequency -= ((s32)p->u.qam.symbol_rate * afc) >> 10;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int tda10021_sleep(struct dvb_frontend* fe)
|
|
|
|
{
|
2005-05-17 00:54:31 -04:00
|
|
|
struct tda10021_state* state = fe->demodulator_priv;
|
2005-04-16 18:20:36 -04:00
|
|
|
|
|
|
|
tda10021_writereg (state, 0x1b, 0x02); /* pdown ADC */
|
|
|
|
tda10021_writereg (state, 0x00, 0x80); /* standby */
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void tda10021_release(struct dvb_frontend* fe)
|
|
|
|
{
|
2005-05-17 00:54:31 -04:00
|
|
|
struct tda10021_state* state = fe->demodulator_priv;
|
2005-04-16 18:20:36 -04:00
|
|
|
kfree(state);
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct dvb_frontend_ops tda10021_ops;
|
|
|
|
|
|
|
|
struct dvb_frontend* tda10021_attach(const struct tda10021_config* config,
|
|
|
|
struct i2c_adapter* i2c,
|
|
|
|
u8 pwm)
|
|
|
|
{
|
|
|
|
struct tda10021_state* state = NULL;
|
|
|
|
|
|
|
|
/* allocate memory for the internal state */
|
2005-05-17 00:54:31 -04:00
|
|
|
state = kmalloc(sizeof(struct tda10021_state), GFP_KERNEL);
|
2005-04-16 18:20:36 -04:00
|
|
|
if (state == NULL) goto error;
|
|
|
|
|
|
|
|
/* setup the state */
|
|
|
|
state->config = config;
|
|
|
|
state->i2c = i2c;
|
|
|
|
memcpy(&state->ops, &tda10021_ops, sizeof(struct dvb_frontend_ops));
|
|
|
|
state->pwm = pwm;
|
|
|
|
state->reg0 = tda10021_inittab[0];
|
|
|
|
|
|
|
|
/* check if the demod is there */
|
|
|
|
if ((tda10021_readreg(state, 0x1a) & 0xf0) != 0x70) goto error;
|
|
|
|
|
|
|
|
/* create dvb_frontend */
|
|
|
|
state->frontend.ops = &state->ops;
|
|
|
|
state->frontend.demodulator_priv = state;
|
|
|
|
return &state->frontend;
|
|
|
|
|
|
|
|
error:
|
|
|
|
kfree(state);
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct dvb_frontend_ops tda10021_ops = {
|
|
|
|
|
|
|
|
.info = {
|
|
|
|
.name = "Philips TDA10021 DVB-C",
|
|
|
|
.type = FE_QAM,
|
|
|
|
.frequency_stepsize = 62500,
|
|
|
|
.frequency_min = 51000000,
|
|
|
|
.frequency_max = 858000000,
|
|
|
|
.symbol_rate_min = (XIN/2)/64, /* SACLK/64 == (XIN/2)/64 */
|
|
|
|
.symbol_rate_max = (XIN/2)/4, /* SACLK/4 */
|
|
|
|
#if 0
|
|
|
|
.frequency_tolerance = ???,
|
|
|
|
.symbol_rate_tolerance = ???, /* ppm */ /* == 8% (spec p. 5) */
|
|
|
|
#endif
|
|
|
|
.caps = 0x400 | //FE_CAN_QAM_4
|
|
|
|
FE_CAN_QAM_16 | FE_CAN_QAM_32 | FE_CAN_QAM_64 |
|
|
|
|
FE_CAN_QAM_128 | FE_CAN_QAM_256 |
|
|
|
|
FE_CAN_FEC_AUTO
|
|
|
|
},
|
|
|
|
|
|
|
|
.release = tda10021_release,
|
|
|
|
|
|
|
|
.init = tda10021_init,
|
|
|
|
.sleep = tda10021_sleep,
|
|
|
|
|
|
|
|
.set_frontend = tda10021_set_parameters,
|
|
|
|
.get_frontend = tda10021_get_frontend,
|
|
|
|
|
|
|
|
.read_status = tda10021_read_status,
|
|
|
|
.read_ber = tda10021_read_ber,
|
|
|
|
.read_signal_strength = tda10021_read_signal_strength,
|
|
|
|
.read_snr = tda10021_read_snr,
|
|
|
|
.read_ucblocks = tda10021_read_ucblocks,
|
|
|
|
};
|
|
|
|
|
|
|
|
module_param(verbose, int, 0644);
|
|
|
|
MODULE_PARM_DESC(verbose, "print AFC offset after tuning for debugging the PWM setting");
|
|
|
|
|
|
|
|
MODULE_DESCRIPTION("Philips TDA10021 DVB-C demodulator driver");
|
|
|
|
MODULE_AUTHOR("Ralph Metzler, Holger Waechtler, Markus Schulz");
|
|
|
|
MODULE_LICENSE("GPL");
|
|
|
|
|
|
|
|
EXPORT_SYMBOL(tda10021_attach);
|