android_kernel_xiaomi_sm8350/include/asm-mips/mach-mips/irq.h

#ifndef __ASM_MACH_MIPS_IRQ_H
#define __ASM_MACH_MIPS_IRQ_H


#define NR_IRQS	256

#include_next <irq.h>

#endif /* __ASM_MACH_MIPS_IRQ_H */
SMP on Malta needs to define ARCH_HAS_IRQ_PER_CPU since 2.6.14-rc1. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> diff --git a/include/asm-mips/mach-mips/irq.h b/include/asm-mips/mach-mips/irq.h new file mode 100644 2005-09-22 10:55:21 -04:00			`#ifndef __ASM_MACH_MIPS_IRQ_H`
			`#define __ASM_MACH_MIPS_IRQ_H`


			`#define NR_IRQS 256`

[MIPS] Define MIPS_CPU_IRQ_BASE in generic header The irq_base for {mips,rm7k,rm9k}_cpu_irq_init() are constant on all platforms and are same value on most platforms (0 or 16, depends on CONFIG_I8259). Define them in asm-mips/mach-generic/irq.h and make them customizable. This will save a few cycle on each CPU interrupt. A good side effect is removing some dependencies to MALTA in generic SMTC code. Although MIPS_CPU_IRQ_BASE is customizable, this patch changes irq mappings on DDB5477, EMMA2RH and MIPS_SIM, since really customizing them might cause some header dependency problem and there seems no good reason to customize it. So currently only VR41XX is using custom MIPS_CPU_IRQ_BASE value, which is 0 regardless of CONFIG_I8259. Testing this patch on those platforms is greatly appreciated. Thank you. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> 2007-01-07 12:14:29 -05:00			`#include_next <irq.h>`

SMP on Malta needs to define ARCH_HAS_IRQ_PER_CPU since 2.6.14-rc1. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> diff --git a/include/asm-mips/mach-mips/irq.h b/include/asm-mips/mach-mips/irq.h new file mode 100644 2005-09-22 10:55:21 -04:00			`#endif /* __ASM_MACH_MIPS_IRQ_H */`