114 lines
1.7 KiB
ArmAsm
114 lines
1.7 KiB
ArmAsm
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/*
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* int-handler.S
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*
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* Based on the cobalt handler.
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*/
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#include <asm/asm.h>
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#include <asm/mipsregs.h>
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#include <asm/addrspace.h>
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#include <asm/regdef.h>
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#include <asm/stackframe.h>
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/*
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* galileo_handle_int -
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* We check for the timer first, then check PCI ints A and D.
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* Then check for serial IRQ and fall through.
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*/
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.align 5
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.set reorder
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.set noat
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NESTED(galileo_handle_int, PT_SIZE, sp)
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SAVE_ALL
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CLI
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.set at
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mfc0 t0,CP0_CAUSE
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mfc0 t2,CP0_STATUS
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and t0,t2
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andi t1,t0,STATUSF_IP4 /* int2 hardware line (timer) */
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bnez t1,ll_gt64120_irq
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andi t1,t0,STATUSF_IP2 /* int0 hardware line */
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bnez t1,ll_pci_intA
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andi t1,t0,STATUSF_IP5 /* int3 hardware line */
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bnez t1,ll_pci_intD
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andi t1,t0,STATUSF_IP6 /* int4 hardware line */
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bnez t1,ll_serial_irq
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andi t1,t0,STATUSF_IP7 /* compare int */
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bnez t1,ll_compare_irq
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nop
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/* wrong alarm or masked ... */
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j spurious_interrupt
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nop
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END(galileo_handle_int)
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.align 5
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.set reorder
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ll_gt64120_irq:
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li a0,4
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move a1,sp
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jal do_IRQ
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nop
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j ret_from_irq
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nop
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.align 5
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.set reorder
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ll_compare_irq:
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li a0,7
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move a1,sp
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jal do_IRQ
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nop
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j ret_from_irq
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nop
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.align 5
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.set reorder
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ll_pci_intA:
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move a0,sp
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jal pci_intA
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nop
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j ret_from_irq
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nop
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#if 0
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.align 5
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.set reorder
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ll_pci_intB:
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move a0,sp
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jal pci_intB
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nop
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j ret_from_irq
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nop
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.align 5
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.set reorder
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ll_pci_intC:
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move a0,sp
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jal pci_intC
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nop
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j ret_from_irq
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nop
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#endif
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.align 5
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.set reorder
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ll_pci_intD:
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move a0,sp
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jal pci_intD
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nop
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j ret_from_irq
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nop
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.align 5
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.set reorder
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ll_serial_irq:
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li a0,6
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move a1,sp
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jal do_IRQ
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nop
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j ret_from_irq
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nop
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