irqchip: Declare the msm_show_resume_irq_mask in a header

msm_show_resume_irq_mask is currently being declared by individual
drivers as needed. However, it creates scalability issues and looks
ugly. Hence, place the variable in a common header file so that the
drivers can just include it.

Change-Id: I35348a6a280c15a5ad4744097f1075f165af1bc8
Signed-off-by: Raghavendra Rao Ananta <rananta@codeaurora.org>
This commit is contained in:
Raghavendra Rao Ananta 2020-04-15 14:15:53 -07:00
parent 7e5cfaa6da
commit 03dbd6813c
3 changed files with 20 additions and 12 deletions

View File

@ -1,5 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0 */
#include <linux/pm_qos.h>
#include <linux/msm_show_resume_irq.h>
static inline void device_pm_init_common(struct device *dev)
{
@ -99,12 +100,6 @@ extern int pm_async_enabled;
/* drivers/base/power/main.c */
extern struct list_head dpm_list; /* The active device list */
#ifdef CONFIG_QCOM_SHOW_RESUME_IRQ
extern int msm_show_resume_irq_mask;
#else
#define msm_show_resume_irq_mask 0
#endif
static inline struct device *to_device(struct list_head *entry)
{
return container_of(entry, struct device, power.entry);

View File

@ -10,6 +10,8 @@
#include <linux/irqdomain.h>
#include <linux/irqchip/arm-gic-common.h>
#include <linux/msm_show_resume_irq.h>
struct gic_quirk {
const char *desc;
const char *compatible;
@ -18,12 +20,6 @@ struct gic_quirk {
u32 mask;
};
#ifdef CONFIG_QCOM_SHOW_RESUME_IRQ
extern int msm_show_resume_irq_mask;
#else
#define msm_show_resume_irq_mask 0
#endif
int gic_configure_irq(unsigned int irq, unsigned int type,
void __iomem *base, void (*sync_access)(void));
void gic_dist_config(void __iomem *base, int gic_irqs,

View File

@ -0,0 +1,17 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2020, The Linux Foundation. All rights reserved.
*/
#ifndef __MSM_SHOW_RESUME_IRQ_H
#define __MSM_SHOW_RESUME_IRQ_H
#ifdef CONFIG_QCOM_SHOW_RESUME_IRQ
extern int msm_show_resume_irq_mask;
#else
#define msm_show_resume_irq_mask 0
#endif
#endif