This is the 5.4.66 stable release
-----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEZH8oZUiU471FcZm+ONu9yGCSaT4FAl9jToQACgkQONu9yGCS aT7abRAAieOxiSqzUwek0llfhVPbTJTvbGLqbIUREOz9wyoAKhOSoz6kgqYdFKtB RlgmpuUcuZ/tsUXD8SUtjxdhEpJWBT9Gqj56yTG5ncScd+aAV9DJn8MzUAoGi47t x33TUZ+7Xab018dt111IAD9SkYLJfe8rtJLVobeQTtKdggoEG6mvEwhoquur5CHd 2NdF+sW8f5eY+oa8qGJ9hywVlH9szqSnJjF5PdzG5A2fRtmjlwn+ZWuifNAH1wNy /KOgzxNuWnpU5apSWTkTEAv2uqePlHNlnj9XeUNKYoMhXUW2dOD9GCj8YdZSK7fv 6KvX5Ke3NEG+zo78ue8OaxWhzoZXh0cjfzq4krOhZGF0w8+AF3GDG3Z6EunLhxQa lXn/VNcZkHy0nOQ5qQE0LZUw7bZdYMIEdnI/N2cpRuGbtMfHFROJ53hqC/IpCcFE q6YB/zB2BhV/OinM1wgOTmAiI5s+7HBdwoautrpbCG0hSLm/NqpQY2o175ffgYhJ UDHx8L6khNe1D3b6i6ePKWibA3JWdatUUqIdJ/WAgHbYs6HFq0rpCCAYNf4lY4kn zI7qIck6Jd9Y0xWwTdxV215pWwLhGpNWhG96JqocRixtoDNbbB8PEs/qvqWuLYLl S2/zZ29fD3bwBbeUxZKdZGn7dVYxs5nqnOARkqNdR6dgrN1DSo4= =+jhc -----END PGP SIGNATURE----- Merge 5.4.66 into android11-5.4-lts Changes in 5.4.66 ARM: dts: logicpd-torpedo-baseboard: Fix broken audio ARM: dts: logicpd-som-lv-baseboard: Fix broken audio ARM: dts: logicpd-som-lv-baseboard: Fix missing video regulator: push allocation in regulator_ena_gpio_request() out of lock regulator: remove superfluous lock in regulator_resolve_coupling() ARM: dts: socfpga: fix register entry for timer3 on Arria10 selftests/timers: Turn off timeout setting ARM: dts: ls1021a: fix QuadSPI-memory reg range ARM: dts: imx7ulp: Correct gpio ranges RDMA/rxe: Fix memleak in rxe_mem_init_user RDMA/rxe: Drop pointless checks in rxe_init_ports RDMA/rxe: Fix panic when calling kmem_cache_create() RDMA/bnxt_re: Do not report transparent vlan from QP1 drm/sun4i: add missing put_device() call in sun8i_r40_tcon_tv_set_mux() arm64: dts: imx8mq: Fix TMU interrupt property drm/sun4i: Fix dsi dcs long write function iio: adc: mcp3422: fix locking on error path iio: adc: mcp3422: fix locking scope scsi: libsas: Set data_dir as DMA_NONE if libata marks qc as NODATA RDMA/core: Fix reported speed and width scsi: megaraid_sas: Don't call disable_irq from process IRQ poll scsi: mpt3sas: Don't call disable_irq from IRQ poll handler soundwire: fix double free of dangling pointer drm/sun4i: backend: Support alpha property on lowest plane drm/sun4i: backend: Disable alpha on the lowest plane on the A20 mmc: sdhci-acpi: Clear amd_sdhci_host on reset mmc: sdhci-msm: Add retries when all tuning phases are found valid spi: stm32: Rate-limit the 'Communication suspended' message nvme-fabrics: allow to queue requests for live queues spi: stm32: fix pm_runtime_get_sync() error checking block: Set same_page to false in __bio_try_merge_page if ret is false IB/isert: Fix unaligned immediate-data handling ARM: dts: bcm: HR2: Fixed QSPI compatible string ARM: dts: NSP: Fixed QSPI compatible string ARM: dts: BCM5301X: Fixed QSPI compatible string arm64: dts: ns2: Fixed QSPI compatible string ARC: HSDK: wireup perf irq dmaengine: acpi: Put the CSRT table after using it netfilter: conntrack: allow sctp hearbeat after connection re-use drivers/net/wan/lapbether: Added needed_tailroom NFC: st95hf: Fix memleak in st95hf_in_send_cmd firestream: Fix memleak in fs_open ALSA: hda: Fix 2 channel swapping for Tegra ALSA: hda/tegra: Program WAKEEN register for Tegra drivers/dma/dma-jz4780: Fix race condition between probe and irq handler net: hns3: Fix for geneve tx checksum bug xfs: fix off-by-one in inode alloc block reservation calculation drivers/net/wan/lapbether: Set network_header before transmitting cfg80211: Adjust 6 GHz frequency to channel conversion xfs: initialize the shortform attr header padding entry irqchip/eznps: Fix build error for !ARC700 builds nvmet-tcp: Fix NULL dereference when a connect data comes in h2cdata pdu nvme-fabrics: don't check state NVME_CTRL_NEW for request acceptance nvme: have nvme_wait_freeze_timeout return if it timed out nvme-tcp: serialize controller teardown sequences nvme-tcp: fix timeout handler nvme-tcp: fix reset hang if controller died in the middle of a reset nvme-rdma: serialize controller teardown sequences nvme-rdma: fix timeout handler nvme-rdma: fix reset hang if controller died in the middle of a reset nvme-pci: cancel nvme device request before disabling HID: quirks: Set INCREMENT_USAGE_ON_DUPLICATE for all Saitek X52 devices HID: microsoft: Add rumble support for the 8bitdo SN30 Pro+ controller drivers/net/wan/hdlc_cisco: Add hard_header_len HID: elan: Fix memleak in elan_input_configured ARC: [plat-hsdk]: Switch ethernet phy-mode to rgmii-id cpufreq: intel_pstate: Refuse to turn off with HWP enabled cpufreq: intel_pstate: Fix intel_pstate_get_hwp_max() for turbo disabled arm64/module: set trampoline section flags regardless of CONFIG_DYNAMIC_FTRACE ALSA: hda: hdmi - add Rocketlake support ALSA: hda: fix a runtime pm issue in SOF when integrated GPU is disabled drm/amdgpu: Fix bug in reporting voltage for CIK iommu/amd: Do not use IOMMUv2 functionality when SME is active gcov: Disable gcov build with GCC 10 iio: adc: ti-ads1015: fix conversion when CONFIG_PM is not set iio: cros_ec: Set Gyroscope default frequency to 25Hz iio:light:ltr501 Fix timestamp alignment issue. iio:proximity:mb1232: Fix timestamp alignment and prevent data leak. iio:accel:bmc150-accel: Fix timestamp alignment and prevent data leak. iio:adc:ti-adc084s021 Fix alignment and data leak issues. iio:adc:ina2xx Fix timestamp alignment issue. iio:adc:max1118 Fix alignment of timestamp and data leak issues iio:adc:ti-adc081c Fix alignment and data leak issues iio:magnetometer:ak8975 Fix alignment and data leak issues. iio:light:max44000 Fix timestamp alignment and prevent data leak. iio:chemical:ccs811: Fix timestamp alignment and prevent data leak. iio: accel: kxsd9: Fix alignment of local buffer. iio:accel:mma7455: Fix timestamp alignment and prevent data leak. iio:accel:mma8452: Fix timestamp alignment and prevent data leak. staging: wlan-ng: fix out of bounds read in prism2sta_probe_usb() btrfs: require only sector size alignment for parent eb bytenr btrfs: fix lockdep splat in add_missing_dev btrfs: fix wrong address when faulting in pages in the search ioctl kobject: Restore old behaviour of kobject_del(NULL) regulator: push allocation in regulator_init_coupling() outside of lock regulator: push allocations in create_regulator() outside of lock regulator: push allocation in set_consumer_device_supply() out of lock regulator: plug of_node leak in regulator_register()'s error path regulator: core: Fix slab-out-of-bounds in regulator_unlock_recursive() scsi: target: iscsi: Fix data digest calculation scsi: target: iscsi: Fix hang in iscsit_access_np() when getting tpg->np_login_sem drm/i915/gvt: do not check len & max_len for lri drm/tve200: Stabilize enable/disable drm/msm: Disable preemption on all 5xx targets mmc: sdio: Use mmc_pre_req() / mmc_post_req() mmc: sdhci-of-esdhc: Don't walk device-tree on every interrupt rbd: require global CAP_SYS_ADMIN for mapping and unmapping RDMA/rxe: Fix the parent sysfs read when the interface has 15 chars RDMA/mlx4: Read pkey table length instead of hardcoded value fbcon: remove soft scrollback code fbcon: remove now unusued 'softback_lines' cursor() argument vgacon: remove software scrollback support KVM: VMX: Don't freeze guest when event delivery causes an APIC-access exit KVM: arm64: Do not try to map PUDs when they are folded into PMD KVM: fix memory leak in kvm_io_bus_unregister_dev() debugfs: Fix module state check condition ARM: dts: vfxxx: Add syscon compatible with OCOTP video: fbdev: fix OOB read in vga_8planes_imageblit() staging: greybus: audio: fix uninitialized value issue phy: qcom-qmp: Use correct values for ipq8074 PCIe Gen2 PHY init usb: core: fix slab-out-of-bounds Read in read_descriptors USB: serial: ftdi_sio: add IDs for Xsens Mti USB converter USB: serial: option: support dynamic Quectel USB compositions USB: serial: option: add support for SIM7070/SIM7080/SIM7090 modules usb: Fix out of sync data toggle if a configured device is reconfigured usb: typec: ucsi: acpi: Check the _DEP dependencies drm/msm/gpu: make ringbuffer readonly drm/msm: Disable the RPTR shadow gcov: add support for GCC 10.1 Linux 5.4.66 Signed-off-by: Greg Kroah-Hartman <gregkh@google.com> Change-Id: Ifa7bfefdcc41ca96db46022f997367d5cc2039d1
This commit is contained in:
Greg Kroah-Hartman
commit
22cb1b9ceb
2
Makefile
2
Makefile
@ -1,7 +1,7 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
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VERSION = 5
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||||
PATCHLEVEL = 4
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SUBLEVEL = 65
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SUBLEVEL = 66
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EXTRAVERSION =
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NAME = Kleptomaniac Octopus
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||||
|
||||
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@ -88,6 +88,8 @@
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arcpct: pct {
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compatible = "snps,archs-pct";
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interrupt-parent = <&cpu_intc>;
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interrupts = <20>;
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};
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/* TIMER0 with interrupt for clockevent */
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@ -208,7 +210,7 @@
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reg = <0x8000 0x2000>;
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interrupts = <10>;
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interrupt-names = "macirq";
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phy-mode = "rgmii";
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phy-mode = "rgmii-id";
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snps,pbl = <32>;
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snps,multicast-filter-bins = <256>;
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clocks = <&gmacclk>;
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@ -226,7 +228,7 @@
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "snps,dwmac-mdio";
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phy0: ethernet-phy@0 {
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phy0: ethernet-phy@0 { /* Micrel KSZ9031 */
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reg = <0>;
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};
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};
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@ -33,7 +33,6 @@
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#define CTOP_AUX_DPC (CTOP_AUX_BASE + 0x02C)
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#define CTOP_AUX_LPC (CTOP_AUX_BASE + 0x030)
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#define CTOP_AUX_EFLAGS (CTOP_AUX_BASE + 0x080)
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#define CTOP_AUX_IACK (CTOP_AUX_BASE + 0x088)
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#define CTOP_AUX_GPA1 (CTOP_AUX_BASE + 0x08C)
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#define CTOP_AUX_UDMC (CTOP_AUX_BASE + 0x300)
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@ -217,7 +217,7 @@
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};
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qspi: spi@27200 {
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compatible = "brcm,spi-bcm-qspi", "brcm,spi-nsp-qspi";
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compatible = "brcm,spi-nsp-qspi", "brcm,spi-bcm-qspi";
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reg = <0x027200 0x184>,
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<0x027000 0x124>,
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<0x11c408 0x004>,
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@ -282,7 +282,7 @@
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};
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qspi: spi@27200 {
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compatible = "brcm,spi-bcm-qspi", "brcm,spi-nsp-qspi";
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compatible = "brcm,spi-nsp-qspi", "brcm,spi-bcm-qspi";
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reg = <0x027200 0x184>,
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<0x027000 0x124>,
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<0x11c408 0x004>,
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@ -488,7 +488,7 @@
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};
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spi@18029200 {
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compatible = "brcm,spi-bcm-qspi", "brcm,spi-nsp-qspi";
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compatible = "brcm,spi-nsp-qspi", "brcm,spi-bcm-qspi";
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reg = <0x18029200 0x184>,
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<0x18029000 0x124>,
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<0x1811b408 0x004>,
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@ -397,7 +397,7 @@
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clocks = <&pcc2 IMX7ULP_CLK_RGPIO2P1>,
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<&pcc3 IMX7ULP_CLK_PCTLC>;
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clock-names = "gpio", "port";
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gpio-ranges = <&iomuxc1 0 0 32>;
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gpio-ranges = <&iomuxc1 0 0 20>;
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};
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gpio_ptd: gpio@40af0000 {
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@ -411,7 +411,7 @@
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clocks = <&pcc2 IMX7ULP_CLK_RGPIO2P1>,
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<&pcc3 IMX7ULP_CLK_PCTLD>;
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clock-names = "gpio", "port";
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gpio-ranges = <&iomuxc1 0 32 32>;
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gpio-ranges = <&iomuxc1 0 32 12>;
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};
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gpio_pte: gpio@40b00000 {
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@ -425,7 +425,7 @@
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clocks = <&pcc2 IMX7ULP_CLK_RGPIO2P1>,
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<&pcc3 IMX7ULP_CLK_PCTLE>;
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clock-names = "gpio", "port";
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gpio-ranges = <&iomuxc1 0 64 32>;
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gpio-ranges = <&iomuxc1 0 64 16>;
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};
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gpio_ptf: gpio@40b10000 {
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@ -439,7 +439,7 @@
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clocks = <&pcc2 IMX7ULP_CLK_RGPIO2P1>,
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<&pcc3 IMX7ULP_CLK_PCTLF>;
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clock-names = "gpio", "port";
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gpio-ranges = <&iomuxc1 0 96 32>;
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gpio-ranges = <&iomuxc1 0 96 20>;
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};
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};
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@ -51,6 +51,8 @@
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&mcbsp2 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&mcbsp2_pins>;
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};
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&charger {
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@ -102,35 +104,18 @@
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regulator-max-microvolt = <3300000>;
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};
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lcd0: display@0 {
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compatible = "panel-dpi";
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label = "28";
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status = "okay";
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/* default-on; */
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lcd0: display {
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/* This isn't the exact LCD, but the timings meet spec */
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compatible = "logicpd,type28";
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pinctrl-names = "default";
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pinctrl-0 = <&lcd_enable_pin>;
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enable-gpios = <&gpio5 27 GPIO_ACTIVE_HIGH>; /* gpio155, lcd INI */
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backlight = <&bl>;
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enable-gpios = <&gpio5 27 GPIO_ACTIVE_HIGH>;
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port {
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lcd_in: endpoint {
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remote-endpoint = <&dpi_out>;
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};
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};
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panel-timing {
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clock-frequency = <9000000>;
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hactive = <480>;
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vactive = <272>;
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hfront-porch = <3>;
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hback-porch = <2>;
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hsync-len = <42>;
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vback-porch = <3>;
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vfront-porch = <2>;
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vsync-len = <11>;
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hsync-active = <1>;
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vsync-active = <1>;
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de-active = <1>;
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pixelclk-active = <0>;
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};
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};
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bl: backlight {
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@ -80,6 +80,8 @@
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};
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&mcbsp2 {
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pinctrl-names = "default";
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pinctrl-0 = <&mcbsp2_pins>;
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status = "okay";
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};
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@ -181,7 +181,7 @@
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x0 0x1550000 0x0 0x10000>,
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<0x0 0x40000000 0x0 0x40000000>;
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<0x0 0x40000000 0x0 0x20000000>;
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reg-names = "QuadSPI", "QuadSPI-memory";
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interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
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clock-names = "qspi_en", "qspi";
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@ -819,7 +819,7 @@
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timer3: timer3@ffd00100 {
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compatible = "snps,dw-apb-timer";
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interrupts = <0 118 IRQ_TYPE_LEVEL_HIGH>;
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reg = <0xffd01000 0x100>;
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reg = <0xffd00100 0x100>;
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clocks = <&l4_sys_free_clk>;
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clock-names = "timer";
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resets = <&rst L4SYSTIMER1_RESET>;
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@ -495,7 +495,7 @@
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};
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ocotp: ocotp@400a5000 {
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compatible = "fsl,vf610-ocotp";
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compatible = "fsl,vf610-ocotp", "syscon";
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reg = <0x400a5000 0x1000>;
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clocks = <&clks VF610_CLK_OCOTP>;
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};
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@ -745,7 +745,7 @@
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};
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qspi: spi@66470200 {
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compatible = "brcm,spi-bcm-qspi", "brcm,spi-ns2-qspi";
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compatible = "brcm,spi-ns2-qspi", "brcm,spi-bcm-qspi";
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reg = <0x66470200 0x184>,
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<0x66470000 0x124>,
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<0x67017408 0x004>,
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@ -349,7 +349,7 @@
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tmu: tmu@30260000 {
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compatible = "fsl,imx8mq-tmu";
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reg = <0x30260000 0x10000>;
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interrupt = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk IMX8MQ_CLK_TMU_ROOT>;
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little-endian;
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fsl,tmu-range = <0xb0000 0xa0026 0x80048 0x70061>;
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@ -304,8 +304,7 @@ int module_frob_arch_sections(Elf_Ehdr *ehdr, Elf_Shdr *sechdrs,
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mod->arch.core.plt_shndx = i;
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else if (!strcmp(secstrings + sechdrs[i].sh_name, ".init.plt"))
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mod->arch.init.plt_shndx = i;
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else if (IS_ENABLED(CONFIG_DYNAMIC_FTRACE) &&
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!strcmp(secstrings + sechdrs[i].sh_name,
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else if (!strcmp(secstrings + sechdrs[i].sh_name,
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".text.ftrace_trampoline"))
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tramp = sechdrs + i;
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else if (sechdrs[i].sh_type == SHT_SYMTAB)
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@ -109,7 +109,6 @@ CONFIG_FB_NVIDIA=y
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CONFIG_FB_NVIDIA_I2C=y
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CONFIG_FB_RADEON=y
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# CONFIG_LCD_CLASS_DEVICE is not set
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CONFIG_VGACON_SOFT_SCROLLBACK=y
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CONFIG_LOGO=y
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CONFIG_SOUND=y
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CONFIG_SND=y
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@ -777,7 +777,6 @@ CONFIG_FB_TRIDENT=m
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CONFIG_FB_SM501=m
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CONFIG_FB_IBM_GXT4500=y
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CONFIG_LCD_PLATFORM=m
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CONFIG_VGACON_SOFT_SCROLLBACK=y
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CONFIG_FRAMEBUFFER_CONSOLE=y
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CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
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CONFIG_LOGO=y
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@ -204,7 +204,6 @@ CONFIG_FB_MODE_HELPERS=y
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CONFIG_FB_TILEBLITTING=y
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CONFIG_FB_EFI=y
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# CONFIG_LCD_CLASS_DEVICE is not set
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CONFIG_VGACON_SOFT_SCROLLBACK=y
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CONFIG_LOGO=y
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# CONFIG_LOGO_LINUX_MONO is not set
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# CONFIG_LOGO_LINUX_VGA16 is not set
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@ -200,7 +200,6 @@ CONFIG_FB_MODE_HELPERS=y
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CONFIG_FB_TILEBLITTING=y
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CONFIG_FB_EFI=y
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# CONFIG_LCD_CLASS_DEVICE is not set
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CONFIG_VGACON_SOFT_SCROLLBACK=y
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CONFIG_LOGO=y
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# CONFIG_LOGO_LINUX_MONO is not set
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# CONFIG_LOGO_LINUX_VGA16 is not set
|
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@ -5895,6 +5895,7 @@ static int vmx_handle_exit(struct kvm_vcpu *vcpu)
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(exit_reason != EXIT_REASON_EXCEPTION_NMI &&
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exit_reason != EXIT_REASON_EPT_VIOLATION &&
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exit_reason != EXIT_REASON_PML_FULL &&
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exit_reason != EXIT_REASON_APIC_ACCESS &&
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exit_reason != EXIT_REASON_TASK_SWITCH)) {
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vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
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vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_DELIVERY_EV;
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@ -807,8 +807,10 @@ bool __bio_try_merge_page(struct bio *bio, struct page *page,
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||||
struct bio_vec *bv = &bio->bi_io_vec[bio->bi_vcnt - 1];
|
||||
|
||||
if (page_is_mergeable(bv, page, len, off, same_page)) {
|
||||
if (bio->bi_iter.bi_size > UINT_MAX - len)
|
||||
if (bio->bi_iter.bi_size > UINT_MAX - len) {
|
||||
*same_page = false;
|
||||
return false;
|
||||
}
|
||||
bv->bv_len += len;
|
||||
bio->bi_iter.bi_size += len;
|
||||
return true;
|
||||
|
||||
@ -998,6 +998,7 @@ static int fs_open(struct atm_vcc *atm_vcc)
|
||||
error = make_rate (pcr, r, &tmc0, NULL);
|
||||
if (error) {
|
||||
kfree(tc);
|
||||
kfree(vcc);
|
||||
return error;
|
||||
}
|
||||
}
|
||||
|
||||
@ -5280,6 +5280,9 @@ static ssize_t rbd_config_info_show(struct device *dev,
|
||||
{
|
||||
struct rbd_device *rbd_dev = dev_to_rbd_dev(dev);
|
||||
|
||||
if (!capable(CAP_SYS_ADMIN))
|
||||
return -EPERM;
|
||||
|
||||
return sprintf(buf, "%s\n", rbd_dev->config_info);
|
||||
}
|
||||
|
||||
@ -5391,6 +5394,9 @@ static ssize_t rbd_image_refresh(struct device *dev,
|
||||
struct rbd_device *rbd_dev = dev_to_rbd_dev(dev);
|
||||
int ret;
|
||||
|
||||
if (!capable(CAP_SYS_ADMIN))
|
||||
return -EPERM;
|
||||
|
||||
ret = rbd_dev_refresh(rbd_dev);
|
||||
if (ret)
|
||||
return ret;
|
||||
@ -7059,6 +7065,9 @@ static ssize_t do_rbd_add(struct bus_type *bus,
|
||||
struct rbd_client *rbdc;
|
||||
int rc;
|
||||
|
||||
if (!capable(CAP_SYS_ADMIN))
|
||||
return -EPERM;
|
||||
|
||||
if (!try_module_get(THIS_MODULE))
|
||||
return -ENODEV;
|
||||
|
||||
@ -7208,6 +7217,9 @@ static ssize_t do_rbd_remove(struct bus_type *bus,
|
||||
bool force = false;
|
||||
int ret;
|
||||
|
||||
if (!capable(CAP_SYS_ADMIN))
|
||||
return -EPERM;
|
||||
|
||||
dev_id = -1;
|
||||
opt_buf[0] = '\0';
|
||||
sscanf(buf, "%d %5s", &dev_id, opt_buf);
|
||||
|
||||
@ -762,7 +762,7 @@ static void intel_pstate_get_hwp_max(unsigned int cpu, int *phy_max,
|
||||
|
||||
rdmsrl_on_cpu(cpu, MSR_HWP_CAPABILITIES, &cap);
|
||||
WRITE_ONCE(all_cpu_data[cpu]->hwp_cap_cached, cap);
|
||||
if (global.no_turbo)
|
||||
if (global.no_turbo || global.turbo_disabled)
|
||||
*current_max = HWP_GUARANTEED_PERF(cap);
|
||||
else
|
||||
*current_max = HWP_HIGHEST_PERF(cap);
|
||||
@ -2533,9 +2533,15 @@ static int intel_pstate_update_status(const char *buf, size_t size)
|
||||
{
|
||||
int ret;
|
||||
|
||||
if (size == 3 && !strncmp(buf, "off", size))
|
||||
return intel_pstate_driver ?
|
||||
intel_pstate_unregister_driver() : -EINVAL;
|
||||
if (size == 3 && !strncmp(buf, "off", size)) {
|
||||
if (!intel_pstate_driver)
|
||||
return -EINVAL;
|
||||
|
||||
if (hwp_active)
|
||||
return -EBUSY;
|
||||
|
||||
return intel_pstate_unregister_driver();
|
||||
}
|
||||
|
||||
if (size == 6 && !strncmp(buf, "active", size)) {
|
||||
if (intel_pstate_driver) {
|
||||
|
||||
@ -135,11 +135,13 @@ static void acpi_dma_parse_csrt(struct acpi_device *adev, struct acpi_dma *adma)
|
||||
if (ret < 0) {
|
||||
dev_warn(&adev->dev,
|
||||
"error in parsing resource group\n");
|
||||
return;
|
||||
break;
|
||||
}
|
||||
|
||||
grp = (struct acpi_csrt_group *)((void *)grp + grp->length);
|
||||
}
|
||||
|
||||
acpi_put_table((struct acpi_table_header *)csrt);
|
||||
}
|
||||
|
||||
/**
|
||||
|
||||
@ -885,24 +885,11 @@ static int jz4780_dma_probe(struct platform_device *pdev)
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
ret = platform_get_irq(pdev, 0);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
jzdma->irq = ret;
|
||||
|
||||
ret = request_irq(jzdma->irq, jz4780_dma_irq_handler, 0, dev_name(dev),
|
||||
jzdma);
|
||||
if (ret) {
|
||||
dev_err(dev, "failed to request IRQ %u!\n", jzdma->irq);
|
||||
return ret;
|
||||
}
|
||||
|
||||
jzdma->clk = devm_clk_get(dev, NULL);
|
||||
if (IS_ERR(jzdma->clk)) {
|
||||
dev_err(dev, "failed to get clock\n");
|
||||
ret = PTR_ERR(jzdma->clk);
|
||||
goto err_free_irq;
|
||||
return ret;
|
||||
}
|
||||
|
||||
clk_prepare_enable(jzdma->clk);
|
||||
@ -955,10 +942,23 @@ static int jz4780_dma_probe(struct platform_device *pdev)
|
||||
jzchan->vchan.desc_free = jz4780_dma_desc_free;
|
||||
}
|
||||
|
||||
ret = platform_get_irq(pdev, 0);
|
||||
if (ret < 0)
|
||||
goto err_disable_clk;
|
||||
|
||||
jzdma->irq = ret;
|
||||
|
||||
ret = request_irq(jzdma->irq, jz4780_dma_irq_handler, 0, dev_name(dev),
|
||||
jzdma);
|
||||
if (ret) {
|
||||
dev_err(dev, "failed to request IRQ %u!\n", jzdma->irq);
|
||||
goto err_disable_clk;
|
||||
}
|
||||
|
||||
ret = dmaenginem_async_device_register(dd);
|
||||
if (ret) {
|
||||
dev_err(dev, "failed to register device\n");
|
||||
goto err_disable_clk;
|
||||
goto err_free_irq;
|
||||
}
|
||||
|
||||
/* Register with OF DMA helpers. */
|
||||
@ -966,17 +966,17 @@ static int jz4780_dma_probe(struct platform_device *pdev)
|
||||
jzdma);
|
||||
if (ret) {
|
||||
dev_err(dev, "failed to register OF DMA controller\n");
|
||||
goto err_disable_clk;
|
||||
goto err_free_irq;
|
||||
}
|
||||
|
||||
dev_info(dev, "JZ4780 DMA controller initialised\n");
|
||||
return 0;
|
||||
|
||||
err_disable_clk:
|
||||
clk_disable_unprepare(jzdma->clk);
|
||||
|
||||
err_free_irq:
|
||||
free_irq(jzdma->irq, jzdma);
|
||||
|
||||
err_disable_clk:
|
||||
clk_disable_unprepare(jzdma->clk);
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
@ -3575,7 +3575,8 @@ static int smu7_read_sensor(struct pp_hwmgr *hwmgr, int idx,
|
||||
case AMDGPU_PP_SENSOR_GPU_POWER:
|
||||
return smu7_get_gpu_power(hwmgr, (uint32_t *)value);
|
||||
case AMDGPU_PP_SENSOR_VDDGFX:
|
||||
if ((data->vr_config & 0xff) == 0x2)
|
||||
if ((data->vr_config & VRCONF_VDDGFX_MASK) ==
|
||||
(VR_SVI2_PLANE_2 << VRCONF_VDDGFX_SHIFT))
|
||||
val_vid = PHM_READ_INDIRECT_FIELD(hwmgr->device,
|
||||
CGS_IND_REG__SMC, PWR_SVI2_STATUS, PLANE2_VID);
|
||||
else
|
||||
|
||||
@ -963,18 +963,6 @@ static int cmd_handler_lri(struct parser_exec_state *s)
|
||||
int i, ret = 0;
|
||||
int cmd_len = cmd_length(s);
|
||||
struct intel_gvt *gvt = s->vgpu->gvt;
|
||||
u32 valid_len = CMD_LEN(1);
|
||||
|
||||
/*
|
||||
* Official intel docs are somewhat sloppy , check the definition of
|
||||
* MI_LOAD_REGISTER_IMM.
|
||||
*/
|
||||
#define MAX_VALID_LEN 127
|
||||
if ((cmd_len < valid_len) || (cmd_len > MAX_VALID_LEN)) {
|
||||
gvt_err("len is not valid: len=%u valid_len=%u\n",
|
||||
cmd_len, valid_len);
|
||||
return -EFAULT;
|
||||
}
|
||||
|
||||
for (i = 1; i < cmd_len; i += 2) {
|
||||
if (IS_BROADWELL(gvt->dev_priv) && s->ring_id != RCS0) {
|
||||
|
||||
@ -164,6 +164,11 @@ static int a2xx_hw_init(struct msm_gpu *gpu)
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
gpu_write(gpu, REG_AXXX_CP_RB_CNTL,
|
||||
MSM_GPU_RB_CNTL_DEFAULT | AXXX_CP_RB_CNTL_NO_UPDATE);
|
||||
|
||||
gpu_write(gpu, REG_AXXX_CP_RB_BASE, lower_32_bits(gpu->rb[0]->iova));
|
||||
|
||||
/* NOTE: PM4/micro-engine firmware registers look to be the same
|
||||
* for a2xx and a3xx.. we could possibly push that part down to
|
||||
* adreno_gpu base class. Or push both PM4 and PFP but
|
||||
|
||||
@ -215,6 +215,16 @@ static int a3xx_hw_init(struct msm_gpu *gpu)
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
/*
|
||||
* Use the default ringbuffer size and block size but disable the RPTR
|
||||
* shadow
|
||||
*/
|
||||
gpu_write(gpu, REG_AXXX_CP_RB_CNTL,
|
||||
MSM_GPU_RB_CNTL_DEFAULT | AXXX_CP_RB_CNTL_NO_UPDATE);
|
||||
|
||||
/* Set the ringbuffer address */
|
||||
gpu_write(gpu, REG_AXXX_CP_RB_BASE, lower_32_bits(gpu->rb[0]->iova));
|
||||
|
||||
/* setup access protection: */
|
||||
gpu_write(gpu, REG_A3XX_CP_PROTECT_CTRL, 0x00000007);
|
||||
|
||||
|
||||
@ -265,6 +265,16 @@ static int a4xx_hw_init(struct msm_gpu *gpu)
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
/*
|
||||
* Use the default ringbuffer size and block size but disable the RPTR
|
||||
* shadow
|
||||
*/
|
||||
gpu_write(gpu, REG_A4XX_CP_RB_CNTL,
|
||||
MSM_GPU_RB_CNTL_DEFAULT | AXXX_CP_RB_CNTL_NO_UPDATE);
|
||||
|
||||
/* Set the ringbuffer address */
|
||||
gpu_write(gpu, REG_A4XX_CP_RB_BASE, lower_32_bits(gpu->rb[0]->iova));
|
||||
|
||||
/* Load PM4: */
|
||||
ptr = (uint32_t *)(adreno_gpu->fw[ADRENO_FW_PM4]->data);
|
||||
len = adreno_gpu->fw[ADRENO_FW_PM4]->size / 4;
|
||||
|
||||
@ -677,14 +677,21 @@ static int a5xx_hw_init(struct msm_gpu *gpu)
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
a5xx_preempt_hw_init(gpu);
|
||||
|
||||
a5xx_gpmu_ucode_init(gpu);
|
||||
|
||||
ret = a5xx_ucode_init(gpu);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
/* Set the ringbuffer address */
|
||||
gpu_write64(gpu, REG_A5XX_CP_RB_BASE, REG_A5XX_CP_RB_BASE_HI,
|
||||
gpu->rb[0]->iova);
|
||||
|
||||
gpu_write(gpu, REG_A5XX_CP_RB_CNTL,
|
||||
MSM_GPU_RB_CNTL_DEFAULT | AXXX_CP_RB_CNTL_NO_UPDATE);
|
||||
|
||||
a5xx_preempt_hw_init(gpu);
|
||||
|
||||
/* Disable the interrupts through the initial bringup stage */
|
||||
gpu_write(gpu, REG_A5XX_RBBM_INT_0_MASK, A5XX_INT_MASK);
|
||||
|
||||
@ -1451,7 +1458,8 @@ struct msm_gpu *a5xx_gpu_init(struct drm_device *dev)
|
||||
|
||||
check_speed_bin(&pdev->dev);
|
||||
|
||||
ret = adreno_gpu_init(dev, pdev, adreno_gpu, &funcs, 4);
|
||||
/* Restricting nr_rings to 1 to temporarily disable preemption */
|
||||
ret = adreno_gpu_init(dev, pdev, adreno_gpu, &funcs, 1);
|
||||
if (ret) {
|
||||
a5xx_destroy(&(a5xx_gpu->base.base));
|
||||
return ERR_PTR(ret);
|
||||
|
||||
@ -512,6 +512,13 @@ static int a6xx_hw_init(struct msm_gpu *gpu)
|
||||
if (ret)
|
||||
goto out;
|
||||
|
||||
/* Set the ringbuffer address */
|
||||
gpu_write64(gpu, REG_A6XX_CP_RB_BASE, REG_A6XX_CP_RB_BASE_HI,
|
||||
gpu->rb[0]->iova);
|
||||
|
||||
gpu_write(gpu, REG_A6XX_CP_RB_CNTL,
|
||||
MSM_GPU_RB_CNTL_DEFAULT | AXXX_CP_RB_CNTL_NO_UPDATE);
|
||||
|
||||
/* Always come up on rb 0 */
|
||||
a6xx_gpu->cur_ring = gpu->rb[0];
|
||||
|
||||
|
||||
@ -354,26 +354,6 @@ int adreno_hw_init(struct msm_gpu *gpu)
|
||||
ring->memptrs->rptr = 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* Setup REG_CP_RB_CNTL. The same value is used across targets (with
|
||||
* the excpetion of A430 that disables the RPTR shadow) - the cacluation
|
||||
* for the ringbuffer size and block size is moved to msm_gpu.h for the
|
||||
* pre-processor to deal with and the A430 variant is ORed in here
|
||||
*/
|
||||
adreno_gpu_write(adreno_gpu, REG_ADRENO_CP_RB_CNTL,
|
||||
MSM_GPU_RB_CNTL_DEFAULT |
|
||||
(adreno_is_a430(adreno_gpu) ? AXXX_CP_RB_CNTL_NO_UPDATE : 0));
|
||||
|
||||
/* Setup ringbuffer address - use ringbuffer[0] for GPU init */
|
||||
adreno_gpu_write64(adreno_gpu, REG_ADRENO_CP_RB_BASE,
|
||||
REG_ADRENO_CP_RB_BASE_HI, gpu->rb[0]->iova);
|
||||
|
||||
if (!adreno_is_a430(adreno_gpu)) {
|
||||
adreno_gpu_write64(adreno_gpu, REG_ADRENO_CP_RB_RPTR_ADDR,
|
||||
REG_ADRENO_CP_RB_RPTR_ADDR_HI,
|
||||
rbmemptr(gpu->rb[0], rptr));
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -381,11 +361,8 @@ int adreno_hw_init(struct msm_gpu *gpu)
|
||||
static uint32_t get_rptr(struct adreno_gpu *adreno_gpu,
|
||||
struct msm_ringbuffer *ring)
|
||||
{
|
||||
if (adreno_is_a430(adreno_gpu))
|
||||
return ring->memptrs->rptr = adreno_gpu_read(
|
||||
adreno_gpu, REG_ADRENO_CP_RB_RPTR);
|
||||
else
|
||||
return ring->memptrs->rptr;
|
||||
return ring->memptrs->rptr = adreno_gpu_read(
|
||||
adreno_gpu, REG_ADRENO_CP_RB_RPTR);
|
||||
}
|
||||
|
||||
struct msm_ringbuffer *adreno_active_ring(struct msm_gpu *gpu)
|
||||
|
||||
@ -27,7 +27,8 @@ struct msm_ringbuffer *msm_ringbuffer_new(struct msm_gpu *gpu, int id,
|
||||
ring->id = id;
|
||||
|
||||
ring->start = msm_gem_kernel_new(gpu->dev, MSM_GPU_RINGBUFFER_SZ,
|
||||
MSM_BO_WC, gpu->aspace, &ring->bo, &ring->iova);
|
||||
MSM_BO_WC | MSM_BO_GPU_READONLY, gpu->aspace, &ring->bo,
|
||||
&ring->iova);
|
||||
|
||||
if (IS_ERR(ring->start)) {
|
||||
ret = PTR_ERR(ring->start);
|
||||
|
||||
@ -589,8 +589,7 @@ static int sun4i_backend_atomic_check(struct sunxi_engine *engine,
|
||||
|
||||
/* We can't have an alpha plane at the lowest position */
|
||||
if (!backend->quirks->supports_lowest_plane_alpha &&
|
||||
(plane_states[0]->fb->format->has_alpha ||
|
||||
(plane_states[0]->alpha != DRM_BLEND_ALPHA_OPAQUE)))
|
||||
(plane_states[0]->alpha != DRM_BLEND_ALPHA_OPAQUE))
|
||||
return -EINVAL;
|
||||
|
||||
for (i = 1; i < num_planes; i++) {
|
||||
@ -986,7 +985,6 @@ static const struct sun4i_backend_quirks sun6i_backend_quirks = {
|
||||
|
||||
static const struct sun4i_backend_quirks sun7i_backend_quirks = {
|
||||
.needs_output_muxing = true,
|
||||
.supports_lowest_plane_alpha = true,
|
||||
};
|
||||
|
||||
static const struct sun4i_backend_quirks sun8i_a33_backend_quirks = {
|
||||
|
||||
@ -1409,14 +1409,18 @@ static int sun8i_r40_tcon_tv_set_mux(struct sun4i_tcon *tcon,
|
||||
if (IS_ENABLED(CONFIG_DRM_SUN8I_TCON_TOP) &&
|
||||
encoder->encoder_type == DRM_MODE_ENCODER_TMDS) {
|
||||
ret = sun8i_tcon_top_set_hdmi_src(&pdev->dev, id);
|
||||
if (ret)
|
||||
if (ret) {
|
||||
put_device(&pdev->dev);
|
||||
return ret;
|
||||
}
|
||||
}
|
||||
|
||||
if (IS_ENABLED(CONFIG_DRM_SUN8I_TCON_TOP)) {
|
||||
ret = sun8i_tcon_top_de_config(&pdev->dev, tcon->id, id);
|
||||
if (ret)
|
||||
if (ret) {
|
||||
put_device(&pdev->dev);
|
||||
return ret;
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
@ -867,7 +867,7 @@ static int sun6i_dsi_dcs_write_long(struct sun6i_dsi *dsi,
|
||||
regmap_write(dsi->regs, SUN6I_DSI_CMD_TX_REG(0),
|
||||
sun6i_dsi_dcs_build_pkt_hdr(dsi, msg));
|
||||
|
||||
bounce = kzalloc(msg->tx_len + sizeof(crc), GFP_KERNEL);
|
||||
bounce = kzalloc(ALIGN(msg->tx_len + sizeof(crc), 4), GFP_KERNEL);
|
||||
if (!bounce)
|
||||
return -ENOMEM;
|
||||
|
||||
@ -878,7 +878,7 @@ static int sun6i_dsi_dcs_write_long(struct sun6i_dsi *dsi,
|
||||
memcpy((u8 *)bounce + msg->tx_len, &crc, sizeof(crc));
|
||||
len += sizeof(crc);
|
||||
|
||||
regmap_bulk_write(dsi->regs, SUN6I_DSI_CMD_TX_REG(1), bounce, len);
|
||||
regmap_bulk_write(dsi->regs, SUN6I_DSI_CMD_TX_REG(1), bounce, DIV_ROUND_UP(len, 4));
|
||||
regmap_write(dsi->regs, SUN6I_DSI_CMD_CTL_REG, len + 4 - 1);
|
||||
kfree(bounce);
|
||||
|
||||
|
||||
@ -14,6 +14,7 @@
|
||||
#include <linux/version.h>
|
||||
#include <linux/dma-buf.h>
|
||||
#include <linux/of_graph.h>
|
||||
#include <linux/delay.h>
|
||||
|
||||
#include <drm/drm_fb_cma_helper.h>
|
||||
#include <drm/drm_fourcc.h>
|
||||
@ -130,9 +131,25 @@ static void tve200_display_enable(struct drm_simple_display_pipe *pipe,
|
||||
struct drm_connector *connector = priv->connector;
|
||||
u32 format = fb->format->format;
|
||||
u32 ctrl1 = 0;
|
||||
int retries;
|
||||
|
||||
clk_prepare_enable(priv->clk);
|
||||
|
||||
/* Reset the TVE200 and wait for it to come back online */
|
||||
writel(TVE200_CTRL_4_RESET, priv->regs + TVE200_CTRL_4);
|
||||
for (retries = 0; retries < 5; retries++) {
|
||||
usleep_range(30000, 50000);
|
||||
if (readl(priv->regs + TVE200_CTRL_4) & TVE200_CTRL_4_RESET)
|
||||
continue;
|
||||
else
|
||||
break;
|
||||
}
|
||||
if (retries == 5 &&
|
||||
readl(priv->regs + TVE200_CTRL_4) & TVE200_CTRL_4_RESET) {
|
||||
dev_err(drm->dev, "can't get hardware out of reset\n");
|
||||
return;
|
||||
}
|
||||
|
||||
/* Function 1 */
|
||||
ctrl1 |= TVE200_CTRL_CSMODE;
|
||||
/* Interlace mode for CCIR656: parameterize? */
|
||||
@ -230,8 +247,9 @@ static void tve200_display_disable(struct drm_simple_display_pipe *pipe)
|
||||
|
||||
drm_crtc_vblank_off(crtc);
|
||||
|
||||
/* Disable and Power Down */
|
||||
/* Disable put into reset and Power Down */
|
||||
writel(0, priv->regs + TVE200_CTRL);
|
||||
writel(TVE200_CTRL_4_RESET, priv->regs + TVE200_CTRL_4);
|
||||
|
||||
clk_disable_unprepare(priv->clk);
|
||||
}
|
||||
@ -279,6 +297,8 @@ static int tve200_display_enable_vblank(struct drm_simple_display_pipe *pipe)
|
||||
struct drm_device *drm = crtc->dev;
|
||||
struct tve200_drm_dev_private *priv = drm->dev_private;
|
||||
|
||||
/* Clear any IRQs and enable */
|
||||
writel(0xFF, priv->regs + TVE200_INT_CLR);
|
||||
writel(TVE200_INT_V_STATUS, priv->regs + TVE200_INT_EN);
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -188,6 +188,7 @@ static int elan_input_configured(struct hid_device *hdev, struct hid_input *hi)
|
||||
ret = input_mt_init_slots(input, ELAN_MAX_FINGERS, INPUT_MT_POINTER);
|
||||
if (ret) {
|
||||
hid_err(hdev, "Failed to init elan MT slots: %d\n", ret);
|
||||
input_free_device(input);
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -198,6 +199,7 @@ static int elan_input_configured(struct hid_device *hdev, struct hid_input *hi)
|
||||
if (ret) {
|
||||
hid_err(hdev, "Failed to register elan input device: %d\n",
|
||||
ret);
|
||||
input_mt_destroy_slots(input);
|
||||
input_free_device(input);
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -846,6 +846,7 @@
|
||||
#define USB_DEVICE_ID_MS_POWER_COVER 0x07da
|
||||
#define USB_DEVICE_ID_MS_XBOX_ONE_S_CONTROLLER 0x02fd
|
||||
#define USB_DEVICE_ID_MS_PIXART_MOUSE 0x00cb
|
||||
#define USB_DEVICE_ID_8BITDO_SN30_PRO_PLUS 0x02e0
|
||||
|
||||
#define USB_VENDOR_ID_MOJO 0x8282
|
||||
#define USB_DEVICE_ID_RETRO_ADAPTER 0x3201
|
||||
@ -1014,6 +1015,8 @@
|
||||
#define USB_DEVICE_ID_SAITEK_RAT9 0x0cfa
|
||||
#define USB_DEVICE_ID_SAITEK_MMO7 0x0cd0
|
||||
#define USB_DEVICE_ID_SAITEK_X52 0x075c
|
||||
#define USB_DEVICE_ID_SAITEK_X52_2 0x0255
|
||||
#define USB_DEVICE_ID_SAITEK_X52_PRO 0x0762
|
||||
|
||||
#define USB_VENDOR_ID_SAMSUNG 0x0419
|
||||
#define USB_DEVICE_ID_SAMSUNG_IR_REMOTE 0x0001
|
||||
|
||||
@ -451,6 +451,8 @@ static const struct hid_device_id ms_devices[] = {
|
||||
.driver_data = MS_SURFACE_DIAL },
|
||||
{ HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_XBOX_ONE_S_CONTROLLER),
|
||||
.driver_data = MS_QUIRK_FF },
|
||||
{ HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_8BITDO_SN30_PRO_PLUS),
|
||||
.driver_data = MS_QUIRK_FF },
|
||||
{ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(hid, ms_devices);
|
||||
|
||||
@ -150,6 +150,8 @@ static const struct hid_device_id hid_quirks[] = {
|
||||
{ HID_USB_DEVICE(USB_VENDOR_ID_RETROUSB, USB_DEVICE_ID_RETROUSB_SNES_RETROPORT), HID_QUIRK_INCREMENT_USAGE_ON_DUPLICATE },
|
||||
{ HID_USB_DEVICE(USB_VENDOR_ID_SAITEK, USB_DEVICE_ID_SAITEK_RUMBLEPAD), HID_QUIRK_BADPAD },
|
||||
{ HID_USB_DEVICE(USB_VENDOR_ID_SAITEK, USB_DEVICE_ID_SAITEK_X52), HID_QUIRK_INCREMENT_USAGE_ON_DUPLICATE },
|
||||
{ HID_USB_DEVICE(USB_VENDOR_ID_SAITEK, USB_DEVICE_ID_SAITEK_X52_2), HID_QUIRK_INCREMENT_USAGE_ON_DUPLICATE },
|
||||
{ HID_USB_DEVICE(USB_VENDOR_ID_SAITEK, USB_DEVICE_ID_SAITEK_X52_PRO), HID_QUIRK_INCREMENT_USAGE_ON_DUPLICATE },
|
||||
{ HID_USB_DEVICE(USB_VENDOR_ID_SEMICO, USB_DEVICE_ID_SEMICO_USB_KEYKOARD2), HID_QUIRK_NO_INIT_REPORTS },
|
||||
{ HID_USB_DEVICE(USB_VENDOR_ID_SEMICO, USB_DEVICE_ID_SEMICO_USB_KEYKOARD), HID_QUIRK_NO_INIT_REPORTS },
|
||||
{ HID_USB_DEVICE(USB_VENDOR_ID_SENNHEISER, USB_DEVICE_ID_SENNHEISER_BTD500USB), HID_QUIRK_NOGET },
|
||||
|
||||
@ -189,6 +189,14 @@ struct bmc150_accel_data {
|
||||
struct mutex mutex;
|
||||
u8 fifo_mode, watermark;
|
||||
s16 buffer[8];
|
||||
/*
|
||||
* Ensure there is sufficient space and correct alignment for
|
||||
* the timestamp if enabled
|
||||
*/
|
||||
struct {
|
||||
__le16 channels[3];
|
||||
s64 ts __aligned(8);
|
||||
} scan;
|
||||
u8 bw_bits;
|
||||
u32 slope_dur;
|
||||
u32 slope_thres;
|
||||
@ -922,15 +930,16 @@ static int __bmc150_accel_fifo_flush(struct iio_dev *indio_dev,
|
||||
* now.
|
||||
*/
|
||||
for (i = 0; i < count; i++) {
|
||||
u16 sample[8];
|
||||
int j, bit;
|
||||
|
||||
j = 0;
|
||||
for_each_set_bit(bit, indio_dev->active_scan_mask,
|
||||
indio_dev->masklength)
|
||||
memcpy(&sample[j++], &buffer[i * 3 + bit], 2);
|
||||
memcpy(&data->scan.channels[j++], &buffer[i * 3 + bit],
|
||||
sizeof(data->scan.channels[0]));
|
||||
|
||||
iio_push_to_buffers_with_timestamp(indio_dev, sample, tstamp);
|
||||
iio_push_to_buffers_with_timestamp(indio_dev, &data->scan,
|
||||
tstamp);
|
||||
|
||||
tstamp += sample_period;
|
||||
}
|
||||
|
||||
@ -209,14 +209,20 @@ static irqreturn_t kxsd9_trigger_handler(int irq, void *p)
|
||||
const struct iio_poll_func *pf = p;
|
||||
struct iio_dev *indio_dev = pf->indio_dev;
|
||||
struct kxsd9_state *st = iio_priv(indio_dev);
|
||||
/*
|
||||
* Ensure correct positioning and alignment of timestamp.
|
||||
* No need to zero initialize as all elements written.
|
||||
*/
|
||||
struct {
|
||||
__be16 chan[4];
|
||||
s64 ts __aligned(8);
|
||||
} hw_values;
|
||||
int ret;
|
||||
/* 4 * 16bit values AND timestamp */
|
||||
__be16 hw_values[8];
|
||||
|
||||
ret = regmap_bulk_read(st->map,
|
||||
KXSD9_REG_X,
|
||||
&hw_values,
|
||||
8);
|
||||
hw_values.chan,
|
||||
sizeof(hw_values.chan));
|
||||
if (ret) {
|
||||
dev_err(st->dev,
|
||||
"error reading data\n");
|
||||
@ -224,7 +230,7 @@ static irqreturn_t kxsd9_trigger_handler(int irq, void *p)
|
||||
}
|
||||
|
||||
iio_push_to_buffers_with_timestamp(indio_dev,
|
||||
hw_values,
|
||||
&hw_values,
|
||||
iio_get_time_ns(indio_dev));
|
||||
iio_trigger_notify_done(indio_dev->trig);
|
||||
|
||||
|
||||
@ -52,6 +52,14 @@
|
||||
|
||||
struct mma7455_data {
|
||||
struct regmap *regmap;
|
||||
/*
|
||||
* Used to reorganize data. Will ensure correct alignment of
|
||||
* the timestamp if present
|
||||
*/
|
||||
struct {
|
||||
__le16 channels[3];
|
||||
s64 ts __aligned(8);
|
||||
} scan;
|
||||
};
|
||||
|
||||
static int mma7455_drdy(struct mma7455_data *mma7455)
|
||||
@ -82,19 +90,19 @@ static irqreturn_t mma7455_trigger_handler(int irq, void *p)
|
||||
struct iio_poll_func *pf = p;
|
||||
struct iio_dev *indio_dev = pf->indio_dev;
|
||||
struct mma7455_data *mma7455 = iio_priv(indio_dev);
|
||||
u8 buf[16]; /* 3 x 16-bit channels + padding + ts */
|
||||
int ret;
|
||||
|
||||
ret = mma7455_drdy(mma7455);
|
||||
if (ret)
|
||||
goto done;
|
||||
|
||||
ret = regmap_bulk_read(mma7455->regmap, MMA7455_REG_XOUTL, buf,
|
||||
sizeof(__le16) * 3);
|
||||
ret = regmap_bulk_read(mma7455->regmap, MMA7455_REG_XOUTL,
|
||||
mma7455->scan.channels,
|
||||
sizeof(mma7455->scan.channels));
|
||||
if (ret)
|
||||
goto done;
|
||||
|
||||
iio_push_to_buffers_with_timestamp(indio_dev, buf,
|
||||
iio_push_to_buffers_with_timestamp(indio_dev, &mma7455->scan,
|
||||
iio_get_time_ns(indio_dev));
|
||||
|
||||
done:
|
||||
|
||||
@ -110,6 +110,12 @@ struct mma8452_data {
|
||||
int sleep_val;
|
||||
struct regulator *vdd_reg;
|
||||
struct regulator *vddio_reg;
|
||||
|
||||
/* Ensure correct alignment of time stamp when present */
|
||||
struct {
|
||||
__be16 channels[3];
|
||||
s64 ts __aligned(8);
|
||||
} buffer;
|
||||
};
|
||||
|
||||
/**
|
||||
@ -1091,14 +1097,13 @@ static irqreturn_t mma8452_trigger_handler(int irq, void *p)
|
||||
struct iio_poll_func *pf = p;
|
||||
struct iio_dev *indio_dev = pf->indio_dev;
|
||||
struct mma8452_data *data = iio_priv(indio_dev);
|
||||
u8 buffer[16]; /* 3 16-bit channels + padding + ts */
|
||||
int ret;
|
||||
|
||||
ret = mma8452_read(data, (__be16 *)buffer);
|
||||
ret = mma8452_read(data, data->buffer.channels);
|
||||
if (ret < 0)
|
||||
goto done;
|
||||
|
||||
iio_push_to_buffers_with_timestamp(indio_dev, buffer,
|
||||
iio_push_to_buffers_with_timestamp(indio_dev, &data->buffer,
|
||||
iio_get_time_ns(indio_dev));
|
||||
|
||||
done:
|
||||
|
||||
@ -146,6 +146,11 @@ struct ina2xx_chip_info {
|
||||
int range_vbus; /* Bus voltage maximum in V */
|
||||
int pga_gain_vshunt; /* Shunt voltage PGA gain */
|
||||
bool allow_async_readout;
|
||||
/* data buffer needs space for channel data and timestamp */
|
||||
struct {
|
||||
u16 chan[4];
|
||||
u64 ts __aligned(8);
|
||||
} scan;
|
||||
};
|
||||
|
||||
static const struct ina2xx_config ina2xx_config[] = {
|
||||
@ -738,8 +743,6 @@ static int ina2xx_conversion_ready(struct iio_dev *indio_dev)
|
||||
static int ina2xx_work_buffer(struct iio_dev *indio_dev)
|
||||
{
|
||||
struct ina2xx_chip_info *chip = iio_priv(indio_dev);
|
||||
/* data buffer needs space for channel data and timestap */
|
||||
unsigned short data[4 + sizeof(s64)/sizeof(short)];
|
||||
int bit, ret, i = 0;
|
||||
s64 time;
|
||||
|
||||
@ -758,10 +761,10 @@ static int ina2xx_work_buffer(struct iio_dev *indio_dev)
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
data[i++] = val;
|
||||
chip->scan.chan[i++] = val;
|
||||
}
|
||||
|
||||
iio_push_to_buffers_with_timestamp(indio_dev, data, time);
|
||||
iio_push_to_buffers_with_timestamp(indio_dev, &chip->scan, time);
|
||||
|
||||
return 0;
|
||||
};
|
||||
|
||||
@ -35,6 +35,11 @@ struct max1118 {
|
||||
struct spi_device *spi;
|
||||
struct mutex lock;
|
||||
struct regulator *reg;
|
||||
/* Ensure natural alignment of buffer elements */
|
||||
struct {
|
||||
u8 channels[2];
|
||||
s64 ts __aligned(8);
|
||||
} scan;
|
||||
|
||||
u8 data ____cacheline_aligned;
|
||||
};
|
||||
@ -159,7 +164,6 @@ static irqreturn_t max1118_trigger_handler(int irq, void *p)
|
||||
struct iio_poll_func *pf = p;
|
||||
struct iio_dev *indio_dev = pf->indio_dev;
|
||||
struct max1118 *adc = iio_priv(indio_dev);
|
||||
u8 data[16] = { }; /* 2x 8-bit ADC data + padding + 8 bytes timestamp */
|
||||
int scan_index;
|
||||
int i = 0;
|
||||
|
||||
@ -177,10 +181,10 @@ static irqreturn_t max1118_trigger_handler(int irq, void *p)
|
||||
goto out;
|
||||
}
|
||||
|
||||
data[i] = ret;
|
||||
adc->scan.channels[i] = ret;
|
||||
i++;
|
||||
}
|
||||
iio_push_to_buffers_with_timestamp(indio_dev, data,
|
||||
iio_push_to_buffers_with_timestamp(indio_dev, &adc->scan,
|
||||
iio_get_time_ns(indio_dev));
|
||||
out:
|
||||
mutex_unlock(&adc->lock);
|
||||
|
||||
@ -95,16 +95,12 @@ static int mcp3422_update_config(struct mcp3422 *adc, u8 newconfig)
|
||||
{
|
||||
int ret;
|
||||
|
||||
mutex_lock(&adc->lock);
|
||||
|
||||
ret = i2c_master_send(adc->i2c, &newconfig, 1);
|
||||
if (ret > 0) {
|
||||
adc->config = newconfig;
|
||||
ret = 0;
|
||||
}
|
||||
|
||||
mutex_unlock(&adc->lock);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -137,6 +133,8 @@ static int mcp3422_read_channel(struct mcp3422 *adc,
|
||||
u8 config;
|
||||
u8 req_channel = channel->channel;
|
||||
|
||||
mutex_lock(&adc->lock);
|
||||
|
||||
if (req_channel != MCP3422_CHANNEL(adc->config)) {
|
||||
config = adc->config;
|
||||
config &= ~MCP3422_CHANNEL_MASK;
|
||||
@ -144,12 +142,18 @@ static int mcp3422_read_channel(struct mcp3422 *adc,
|
||||
config &= ~MCP3422_PGA_MASK;
|
||||
config |= MCP3422_PGA_VALUE(adc->pga[req_channel]);
|
||||
ret = mcp3422_update_config(adc, config);
|
||||
if (ret < 0)
|
||||
if (ret < 0) {
|
||||
mutex_unlock(&adc->lock);
|
||||
return ret;
|
||||
}
|
||||
msleep(mcp3422_read_times[MCP3422_SAMPLE_RATE(adc->config)]);
|
||||
}
|
||||
|
||||
return mcp3422_read(adc, value, &config);
|
||||
ret = mcp3422_read(adc, value, &config);
|
||||
|
||||
mutex_unlock(&adc->lock);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int mcp3422_read_raw(struct iio_dev *iio,
|
||||
|
||||
@ -33,6 +33,12 @@ struct adc081c {
|
||||
|
||||
/* 8, 10 or 12 */
|
||||
int bits;
|
||||
|
||||
/* Ensure natural alignment of buffer elements */
|
||||
struct {
|
||||
u16 channel;
|
||||
s64 ts __aligned(8);
|
||||
} scan;
|
||||
};
|
||||
|
||||
#define REG_CONV_RES 0x00
|
||||
@ -128,14 +134,13 @@ static irqreturn_t adc081c_trigger_handler(int irq, void *p)
|
||||
struct iio_poll_func *pf = p;
|
||||
struct iio_dev *indio_dev = pf->indio_dev;
|
||||
struct adc081c *data = iio_priv(indio_dev);
|
||||
u16 buf[8]; /* 2 bytes data + 6 bytes padding + 8 bytes timestamp */
|
||||
int ret;
|
||||
|
||||
ret = i2c_smbus_read_word_swapped(data->i2c, REG_CONV_RES);
|
||||
if (ret < 0)
|
||||
goto out;
|
||||
buf[0] = ret;
|
||||
iio_push_to_buffers_with_timestamp(indio_dev, buf,
|
||||
data->scan.channel = ret;
|
||||
iio_push_to_buffers_with_timestamp(indio_dev, &data->scan,
|
||||
iio_get_time_ns(indio_dev));
|
||||
out:
|
||||
iio_trigger_notify_done(indio_dev->trig);
|
||||
|
||||
@ -25,6 +25,11 @@ struct adc084s021 {
|
||||
struct spi_transfer spi_trans;
|
||||
struct regulator *reg;
|
||||
struct mutex lock;
|
||||
/* Buffer used to align data */
|
||||
struct {
|
||||
__be16 channels[4];
|
||||
s64 ts __aligned(8);
|
||||
} scan;
|
||||
/*
|
||||
* DMA (thus cache coherency maintenance) requires the
|
||||
* transfer buffers to live in their own cache line.
|
||||
@ -140,14 +145,13 @@ static irqreturn_t adc084s021_buffer_trigger_handler(int irq, void *pollfunc)
|
||||
struct iio_poll_func *pf = pollfunc;
|
||||
struct iio_dev *indio_dev = pf->indio_dev;
|
||||
struct adc084s021 *adc = iio_priv(indio_dev);
|
||||
__be16 data[8] = {0}; /* 4 * 16-bit words of data + 8 bytes timestamp */
|
||||
|
||||
mutex_lock(&adc->lock);
|
||||
|
||||
if (adc084s021_adc_conversion(adc, &data) < 0)
|
||||
if (adc084s021_adc_conversion(adc, adc->scan.channels) < 0)
|
||||
dev_err(&adc->spi->dev, "Failed to read data\n");
|
||||
|
||||
iio_push_to_buffers_with_timestamp(indio_dev, data,
|
||||
iio_push_to_buffers_with_timestamp(indio_dev, &adc->scan,
|
||||
iio_get_time_ns(indio_dev));
|
||||
mutex_unlock(&adc->lock);
|
||||
iio_trigger_notify_done(indio_dev->trig);
|
||||
|
||||
@ -309,6 +309,7 @@ static const struct iio_chan_spec ads1115_channels[] = {
|
||||
IIO_CHAN_SOFT_TIMESTAMP(ADS1015_TIMESTAMP),
|
||||
};
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
static int ads1015_set_power_state(struct ads1015_data *data, bool on)
|
||||
{
|
||||
int ret;
|
||||
@ -326,6 +327,15 @@ static int ads1015_set_power_state(struct ads1015_data *data, bool on)
|
||||
return ret < 0 ? ret : 0;
|
||||
}
|
||||
|
||||
#else /* !CONFIG_PM */
|
||||
|
||||
static int ads1015_set_power_state(struct ads1015_data *data, bool on)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
#endif /* !CONFIG_PM */
|
||||
|
||||
static
|
||||
int ads1015_get_adc_result(struct ads1015_data *data, int chan, int *val)
|
||||
{
|
||||
|
||||
@ -75,6 +75,11 @@ struct ccs811_data {
|
||||
struct ccs811_reading buffer;
|
||||
struct iio_trigger *drdy_trig;
|
||||
bool drdy_trig_on;
|
||||
/* Ensures correct alignment of timestamp if present */
|
||||
struct {
|
||||
s16 channels[2];
|
||||
s64 ts __aligned(8);
|
||||
} scan;
|
||||
};
|
||||
|
||||
static const struct iio_chan_spec ccs811_channels[] = {
|
||||
@ -306,17 +311,17 @@ static irqreturn_t ccs811_trigger_handler(int irq, void *p)
|
||||
struct iio_dev *indio_dev = pf->indio_dev;
|
||||
struct ccs811_data *data = iio_priv(indio_dev);
|
||||
struct i2c_client *client = data->client;
|
||||
s16 buf[8]; /* s16 eCO2 + s16 TVOC + padding + 8 byte timestamp */
|
||||
int ret;
|
||||
|
||||
ret = i2c_smbus_read_i2c_block_data(client, CCS811_ALG_RESULT_DATA, 4,
|
||||
(u8 *)&buf);
|
||||
ret = i2c_smbus_read_i2c_block_data(client, CCS811_ALG_RESULT_DATA,
|
||||
sizeof(data->scan.channels),
|
||||
(u8 *)data->scan.channels);
|
||||
if (ret != 4) {
|
||||
dev_err(&client->dev, "cannot read sensor data\n");
|
||||
goto err;
|
||||
}
|
||||
|
||||
iio_push_to_buffers_with_timestamp(indio_dev, buf,
|
||||
iio_push_to_buffers_with_timestamp(indio_dev, &data->scan,
|
||||
iio_get_time_ns(indio_dev));
|
||||
|
||||
err:
|
||||
|
||||
@ -57,10 +57,13 @@ static void get_default_min_max_freq(enum motionsensor_type type,
|
||||
{
|
||||
switch (type) {
|
||||
case MOTIONSENSE_TYPE_ACCEL:
|
||||
case MOTIONSENSE_TYPE_GYRO:
|
||||
*min_freq = 12500;
|
||||
*max_freq = 100000;
|
||||
break;
|
||||
case MOTIONSENSE_TYPE_GYRO:
|
||||
*min_freq = 25000;
|
||||
*max_freq = 100000;
|
||||
break;
|
||||
case MOTIONSENSE_TYPE_MAG:
|
||||
*min_freq = 5000;
|
||||
*max_freq = 25000;
|
||||
|
||||
@ -1242,13 +1242,16 @@ static irqreturn_t ltr501_trigger_handler(int irq, void *p)
|
||||
struct iio_poll_func *pf = p;
|
||||
struct iio_dev *indio_dev = pf->indio_dev;
|
||||
struct ltr501_data *data = iio_priv(indio_dev);
|
||||
u16 buf[8];
|
||||
struct {
|
||||
u16 channels[3];
|
||||
s64 ts __aligned(8);
|
||||
} scan;
|
||||
__le16 als_buf[2];
|
||||
u8 mask = 0;
|
||||
int j = 0;
|
||||
int ret, psdata;
|
||||
|
||||
memset(buf, 0, sizeof(buf));
|
||||
memset(&scan, 0, sizeof(scan));
|
||||
|
||||
/* figure out which data needs to be ready */
|
||||
if (test_bit(0, indio_dev->active_scan_mask) ||
|
||||
@ -1267,9 +1270,9 @@ static irqreturn_t ltr501_trigger_handler(int irq, void *p)
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
if (test_bit(0, indio_dev->active_scan_mask))
|
||||
buf[j++] = le16_to_cpu(als_buf[1]);
|
||||
scan.channels[j++] = le16_to_cpu(als_buf[1]);
|
||||
if (test_bit(1, indio_dev->active_scan_mask))
|
||||
buf[j++] = le16_to_cpu(als_buf[0]);
|
||||
scan.channels[j++] = le16_to_cpu(als_buf[0]);
|
||||
}
|
||||
|
||||
if (mask & LTR501_STATUS_PS_RDY) {
|
||||
@ -1277,10 +1280,10 @@ static irqreturn_t ltr501_trigger_handler(int irq, void *p)
|
||||
&psdata, 2);
|
||||
if (ret < 0)
|
||||
goto done;
|
||||
buf[j++] = psdata & LTR501_PS_DATA_MASK;
|
||||
scan.channels[j++] = psdata & LTR501_PS_DATA_MASK;
|
||||
}
|
||||
|
||||
iio_push_to_buffers_with_timestamp(indio_dev, buf,
|
||||
iio_push_to_buffers_with_timestamp(indio_dev, &scan,
|
||||
iio_get_time_ns(indio_dev));
|
||||
|
||||
done:
|
||||
|
||||
@ -75,6 +75,11 @@
|
||||
struct max44000_data {
|
||||
struct mutex lock;
|
||||
struct regmap *regmap;
|
||||
/* Ensure naturally aligned timestamp */
|
||||
struct {
|
||||
u16 channels[2];
|
||||
s64 ts __aligned(8);
|
||||
} scan;
|
||||
};
|
||||
|
||||
/* Default scale is set to the minimum of 0.03125 or 1 / (1 << 5) lux */
|
||||
@ -488,7 +493,6 @@ static irqreturn_t max44000_trigger_handler(int irq, void *p)
|
||||
struct iio_poll_func *pf = p;
|
||||
struct iio_dev *indio_dev = pf->indio_dev;
|
||||
struct max44000_data *data = iio_priv(indio_dev);
|
||||
u16 buf[8]; /* 2x u16 + padding + 8 bytes timestamp */
|
||||
int index = 0;
|
||||
unsigned int regval;
|
||||
int ret;
|
||||
@ -498,17 +502,17 @@ static irqreturn_t max44000_trigger_handler(int irq, void *p)
|
||||
ret = max44000_read_alsval(data);
|
||||
if (ret < 0)
|
||||
goto out_unlock;
|
||||
buf[index++] = ret;
|
||||
data->scan.channels[index++] = ret;
|
||||
}
|
||||
if (test_bit(MAX44000_SCAN_INDEX_PRX, indio_dev->active_scan_mask)) {
|
||||
ret = regmap_read(data->regmap, MAX44000_REG_PRX_DATA, ®val);
|
||||
if (ret < 0)
|
||||
goto out_unlock;
|
||||
buf[index] = regval;
|
||||
data->scan.channels[index] = regval;
|
||||
}
|
||||
mutex_unlock(&data->lock);
|
||||
|
||||
iio_push_to_buffers_with_timestamp(indio_dev, buf,
|
||||
iio_push_to_buffers_with_timestamp(indio_dev, &data->scan,
|
||||
iio_get_time_ns(indio_dev));
|
||||
iio_trigger_notify_done(indio_dev->trig);
|
||||
return IRQ_HANDLED;
|
||||
|
||||
@ -368,6 +368,12 @@ struct ak8975_data {
|
||||
struct iio_mount_matrix orientation;
|
||||
struct regulator *vdd;
|
||||
struct regulator *vid;
|
||||
|
||||
/* Ensure natural alignment of timestamp */
|
||||
struct {
|
||||
s16 channels[3];
|
||||
s64 ts __aligned(8);
|
||||
} scan;
|
||||
};
|
||||
|
||||
/* Enable attached power regulator if any. */
|
||||
@ -805,7 +811,6 @@ static void ak8975_fill_buffer(struct iio_dev *indio_dev)
|
||||
const struct i2c_client *client = data->client;
|
||||
const struct ak_def *def = data->def;
|
||||
int ret;
|
||||
s16 buff[8]; /* 3 x 16 bits axis values + 1 aligned 64 bits timestamp */
|
||||
__le16 fval[3];
|
||||
|
||||
mutex_lock(&data->lock);
|
||||
@ -828,12 +833,13 @@ static void ak8975_fill_buffer(struct iio_dev *indio_dev)
|
||||
mutex_unlock(&data->lock);
|
||||
|
||||
/* Clamp to valid range. */
|
||||
buff[0] = clamp_t(s16, le16_to_cpu(fval[0]), -def->range, def->range);
|
||||
buff[1] = clamp_t(s16, le16_to_cpu(fval[1]), -def->range, def->range);
|
||||
buff[2] = clamp_t(s16, le16_to_cpu(fval[2]), -def->range, def->range);
|
||||
data->scan.channels[0] = clamp_t(s16, le16_to_cpu(fval[0]), -def->range, def->range);
|
||||
data->scan.channels[1] = clamp_t(s16, le16_to_cpu(fval[1]), -def->range, def->range);
|
||||
data->scan.channels[2] = clamp_t(s16, le16_to_cpu(fval[2]), -def->range, def->range);
|
||||
|
||||
iio_push_to_buffers_with_timestamp(indio_dev, buff,
|
||||
iio_push_to_buffers_with_timestamp(indio_dev, &data->scan,
|
||||
iio_get_time_ns(indio_dev));
|
||||
|
||||
return;
|
||||
|
||||
unlock:
|
||||
|
||||
@ -40,6 +40,11 @@ struct mb1232_data {
|
||||
*/
|
||||
struct completion ranging;
|
||||
int irqnr;
|
||||
/* Ensure correct alignment of data to push to IIO buffer */
|
||||
struct {
|
||||
s16 distance;
|
||||
s64 ts __aligned(8);
|
||||
} scan;
|
||||
};
|
||||
|
||||
static irqreturn_t mb1232_handle_irq(int irq, void *dev_id)
|
||||
@ -113,17 +118,13 @@ static irqreturn_t mb1232_trigger_handler(int irq, void *p)
|
||||
struct iio_poll_func *pf = p;
|
||||
struct iio_dev *indio_dev = pf->indio_dev;
|
||||
struct mb1232_data *data = iio_priv(indio_dev);
|
||||
/*
|
||||
* triggered buffer
|
||||
* 16-bit channel + 48-bit padding + 64-bit timestamp
|
||||
*/
|
||||
s16 buffer[8] = { 0 };
|
||||
|
||||
buffer[0] = mb1232_read_distance(data);
|
||||
if (buffer[0] < 0)
|
||||
data->scan.distance = mb1232_read_distance(data);
|
||||
if (data->scan.distance < 0)
|
||||
goto err;
|
||||
|
||||
iio_push_to_buffers_with_timestamp(indio_dev, buffer, pf->timestamp);
|
||||
iio_push_to_buffers_with_timestamp(indio_dev, &data->scan,
|
||||
pf->timestamp);
|
||||
|
||||
err:
|
||||
iio_trigger_notify_done(indio_dev->trig);
|
||||
|
||||
@ -1749,7 +1749,7 @@ int ib_get_eth_speed(struct ib_device *dev, u8 port_num, u8 *speed, u8 *width)
|
||||
|
||||
dev_put(netdev);
|
||||
|
||||
if (!rc) {
|
||||
if (!rc && lksettings.base.speed != (u32)SPEED_UNKNOWN) {
|
||||
netdev_speed = lksettings.base.speed;
|
||||
} else {
|
||||
netdev_speed = SPEED_1000;
|
||||
|
||||
@ -2973,6 +2973,19 @@ static void bnxt_re_process_res_rawqp1_wc(struct ib_wc *wc,
|
||||
wc->wc_flags |= IB_WC_GRH;
|
||||
}
|
||||
|
||||
static bool bnxt_re_check_if_vlan_valid(struct bnxt_re_dev *rdev,
|
||||
u16 vlan_id)
|
||||
{
|
||||
/*
|
||||
* Check if the vlan is configured in the host. If not configured, it
|
||||
* can be a transparent VLAN. So dont report the vlan id.
|
||||
*/
|
||||
if (!__vlan_find_dev_deep_rcu(rdev->netdev,
|
||||
htons(ETH_P_8021Q), vlan_id))
|
||||
return false;
|
||||
return true;
|
||||
}
|
||||
|
||||
static bool bnxt_re_is_vlan_pkt(struct bnxt_qplib_cqe *orig_cqe,
|
||||
u16 *vid, u8 *sl)
|
||||
{
|
||||
@ -3041,9 +3054,11 @@ static void bnxt_re_process_res_shadow_qp_wc(struct bnxt_re_qp *qp,
|
||||
wc->src_qp = orig_cqe->src_qp;
|
||||
memcpy(wc->smac, orig_cqe->smac, ETH_ALEN);
|
||||
if (bnxt_re_is_vlan_pkt(orig_cqe, &vlan_id, &sl)) {
|
||||
wc->vlan_id = vlan_id;
|
||||
wc->sl = sl;
|
||||
wc->wc_flags |= IB_WC_WITH_VLAN;
|
||||
if (bnxt_re_check_if_vlan_valid(rdev, vlan_id)) {
|
||||
wc->vlan_id = vlan_id;
|
||||
wc->sl = sl;
|
||||
wc->wc_flags |= IB_WC_WITH_VLAN;
|
||||
}
|
||||
}
|
||||
wc->port_num = 1;
|
||||
wc->vendor_err = orig_cqe->status;
|
||||
|
||||
@ -781,7 +781,8 @@ static int eth_link_query_port(struct ib_device *ibdev, u8 port,
|
||||
props->ip_gids = true;
|
||||
props->gid_tbl_len = mdev->dev->caps.gid_table_len[port];
|
||||
props->max_msg_sz = mdev->dev->caps.max_msg_sz;
|
||||
props->pkey_tbl_len = 1;
|
||||
if (mdev->dev->caps.pkey_table_len[port])
|
||||
props->pkey_tbl_len = 1;
|
||||
props->max_mtu = IB_MTU_4096;
|
||||
props->max_vl_num = 2;
|
||||
props->state = IB_PORT_DOWN;
|
||||
|
||||
@ -48,6 +48,8 @@ static void rxe_cleanup_ports(struct rxe_dev *rxe)
|
||||
|
||||
}
|
||||
|
||||
bool rxe_initialized;
|
||||
|
||||
/* free resources for a rxe device all objects created for this device must
|
||||
* have been destroyed
|
||||
*/
|
||||
@ -157,9 +159,6 @@ static int rxe_init_ports(struct rxe_dev *rxe)
|
||||
|
||||
rxe_init_port_param(port);
|
||||
|
||||
if (!port->attr.pkey_tbl_len || !port->attr.gid_tbl_len)
|
||||
return -EINVAL;
|
||||
|
||||
port->pkey_tbl = kcalloc(port->attr.pkey_tbl_len,
|
||||
sizeof(*port->pkey_tbl), GFP_KERNEL);
|
||||
|
||||
@ -358,6 +357,7 @@ static int __init rxe_module_init(void)
|
||||
return err;
|
||||
|
||||
rdma_link_register(&rxe_link_ops);
|
||||
rxe_initialized = true;
|
||||
pr_info("loaded\n");
|
||||
return 0;
|
||||
}
|
||||
@ -369,6 +369,7 @@ static void __exit rxe_module_exit(void)
|
||||
rxe_net_exit();
|
||||
rxe_cache_exit();
|
||||
|
||||
rxe_initialized = false;
|
||||
pr_info("unloaded\n");
|
||||
}
|
||||
|
||||
|
||||
@ -67,6 +67,8 @@
|
||||
|
||||
#define RXE_ROCE_V2_SPORT (0xc000)
|
||||
|
||||
extern bool rxe_initialized;
|
||||
|
||||
static inline u32 rxe_crc32(struct rxe_dev *rxe,
|
||||
u32 crc, void *next, size_t len)
|
||||
{
|
||||
|
||||
@ -207,6 +207,7 @@ int rxe_mem_init_user(struct rxe_pd *pd, u64 start,
|
||||
vaddr = page_address(sg_page_iter_page(&sg_iter));
|
||||
if (!vaddr) {
|
||||
pr_warn("null vaddr\n");
|
||||
ib_umem_release(umem);
|
||||
err = -ENOMEM;
|
||||
goto err1;
|
||||
}
|
||||
|
||||
@ -61,6 +61,11 @@ static int rxe_param_set_add(const char *val, const struct kernel_param *kp)
|
||||
struct net_device *ndev;
|
||||
struct rxe_dev *exists;
|
||||
|
||||
if (!rxe_initialized) {
|
||||
pr_err("Module parameters are not supported, use rdma link add or rxe_cfg\n");
|
||||
return -EAGAIN;
|
||||
}
|
||||
|
||||
len = sanitize_arg(val, intf, sizeof(intf));
|
||||
if (!len) {
|
||||
pr_err("add: invalid interface name\n");
|
||||
|
||||
@ -1078,7 +1078,7 @@ static ssize_t parent_show(struct device *device,
|
||||
struct rxe_dev *rxe =
|
||||
rdma_device_to_drv_device(device, struct rxe_dev, ib_dev);
|
||||
|
||||
return snprintf(buf, 16, "%s\n", rxe_parent_name(rxe, 1));
|
||||
return scnprintf(buf, PAGE_SIZE, "%s\n", rxe_parent_name(rxe, 1));
|
||||
}
|
||||
|
||||
static DEVICE_ATTR_RO(parent);
|
||||
|
||||
@ -182,15 +182,15 @@ isert_alloc_rx_descriptors(struct isert_conn *isert_conn)
|
||||
rx_desc = isert_conn->rx_descs;
|
||||
|
||||
for (i = 0; i < ISERT_QP_MAX_RECV_DTOS; i++, rx_desc++) {
|
||||
dma_addr = ib_dma_map_single(ib_dev, (void *)rx_desc,
|
||||
ISER_RX_PAYLOAD_SIZE, DMA_FROM_DEVICE);
|
||||
dma_addr = ib_dma_map_single(ib_dev, rx_desc->buf,
|
||||
ISER_RX_SIZE, DMA_FROM_DEVICE);
|
||||
if (ib_dma_mapping_error(ib_dev, dma_addr))
|
||||
goto dma_map_fail;
|
||||
|
||||
rx_desc->dma_addr = dma_addr;
|
||||
|
||||
rx_sg = &rx_desc->rx_sg;
|
||||
rx_sg->addr = rx_desc->dma_addr;
|
||||
rx_sg->addr = rx_desc->dma_addr + isert_get_hdr_offset(rx_desc);
|
||||
rx_sg->length = ISER_RX_PAYLOAD_SIZE;
|
||||
rx_sg->lkey = device->pd->local_dma_lkey;
|
||||
rx_desc->rx_cqe.done = isert_recv_done;
|
||||
@ -202,7 +202,7 @@ dma_map_fail:
|
||||
rx_desc = isert_conn->rx_descs;
|
||||
for (j = 0; j < i; j++, rx_desc++) {
|
||||
ib_dma_unmap_single(ib_dev, rx_desc->dma_addr,
|
||||
ISER_RX_PAYLOAD_SIZE, DMA_FROM_DEVICE);
|
||||
ISER_RX_SIZE, DMA_FROM_DEVICE);
|
||||
}
|
||||
kfree(isert_conn->rx_descs);
|
||||
isert_conn->rx_descs = NULL;
|
||||
@ -223,7 +223,7 @@ isert_free_rx_descriptors(struct isert_conn *isert_conn)
|
||||
rx_desc = isert_conn->rx_descs;
|
||||
for (i = 0; i < ISERT_QP_MAX_RECV_DTOS; i++, rx_desc++) {
|
||||
ib_dma_unmap_single(ib_dev, rx_desc->dma_addr,
|
||||
ISER_RX_PAYLOAD_SIZE, DMA_FROM_DEVICE);
|
||||
ISER_RX_SIZE, DMA_FROM_DEVICE);
|
||||
}
|
||||
|
||||
kfree(isert_conn->rx_descs);
|
||||
@ -408,10 +408,9 @@ isert_free_login_buf(struct isert_conn *isert_conn)
|
||||
ISER_RX_PAYLOAD_SIZE, DMA_TO_DEVICE);
|
||||
kfree(isert_conn->login_rsp_buf);
|
||||
|
||||
ib_dma_unmap_single(ib_dev, isert_conn->login_req_dma,
|
||||
ISER_RX_PAYLOAD_SIZE,
|
||||
DMA_FROM_DEVICE);
|
||||
kfree(isert_conn->login_req_buf);
|
||||
ib_dma_unmap_single(ib_dev, isert_conn->login_desc->dma_addr,
|
||||
ISER_RX_SIZE, DMA_FROM_DEVICE);
|
||||
kfree(isert_conn->login_desc);
|
||||
}
|
||||
|
||||
static int
|
||||
@ -420,25 +419,25 @@ isert_alloc_login_buf(struct isert_conn *isert_conn,
|
||||
{
|
||||
int ret;
|
||||
|
||||
isert_conn->login_req_buf = kzalloc(sizeof(*isert_conn->login_req_buf),
|
||||
isert_conn->login_desc = kzalloc(sizeof(*isert_conn->login_desc),
|
||||
GFP_KERNEL);
|
||||
if (!isert_conn->login_req_buf)
|
||||
if (!isert_conn->login_desc)
|
||||
return -ENOMEM;
|
||||
|
||||
isert_conn->login_req_dma = ib_dma_map_single(ib_dev,
|
||||
isert_conn->login_req_buf,
|
||||
ISER_RX_PAYLOAD_SIZE, DMA_FROM_DEVICE);
|
||||
ret = ib_dma_mapping_error(ib_dev, isert_conn->login_req_dma);
|
||||
isert_conn->login_desc->dma_addr = ib_dma_map_single(ib_dev,
|
||||
isert_conn->login_desc->buf,
|
||||
ISER_RX_SIZE, DMA_FROM_DEVICE);
|
||||
ret = ib_dma_mapping_error(ib_dev, isert_conn->login_desc->dma_addr);
|
||||
if (ret) {
|
||||
isert_err("login_req_dma mapping error: %d\n", ret);
|
||||
isert_conn->login_req_dma = 0;
|
||||
goto out_free_login_req_buf;
|
||||
isert_err("login_desc dma mapping error: %d\n", ret);
|
||||
isert_conn->login_desc->dma_addr = 0;
|
||||
goto out_free_login_desc;
|
||||
}
|
||||
|
||||
isert_conn->login_rsp_buf = kzalloc(ISER_RX_PAYLOAD_SIZE, GFP_KERNEL);
|
||||
if (!isert_conn->login_rsp_buf) {
|
||||
ret = -ENOMEM;
|
||||
goto out_unmap_login_req_buf;
|
||||
goto out_unmap_login_desc;
|
||||
}
|
||||
|
||||
isert_conn->login_rsp_dma = ib_dma_map_single(ib_dev,
|
||||
@ -455,11 +454,11 @@ isert_alloc_login_buf(struct isert_conn *isert_conn,
|
||||
|
||||
out_free_login_rsp_buf:
|
||||
kfree(isert_conn->login_rsp_buf);
|
||||
out_unmap_login_req_buf:
|
||||
ib_dma_unmap_single(ib_dev, isert_conn->login_req_dma,
|
||||
ISER_RX_PAYLOAD_SIZE, DMA_FROM_DEVICE);
|
||||
out_free_login_req_buf:
|
||||
kfree(isert_conn->login_req_buf);
|
||||
out_unmap_login_desc:
|
||||
ib_dma_unmap_single(ib_dev, isert_conn->login_desc->dma_addr,
|
||||
ISER_RX_SIZE, DMA_FROM_DEVICE);
|
||||
out_free_login_desc:
|
||||
kfree(isert_conn->login_desc);
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -578,7 +577,7 @@ isert_connect_release(struct isert_conn *isert_conn)
|
||||
ib_destroy_qp(isert_conn->qp);
|
||||
}
|
||||
|
||||
if (isert_conn->login_req_buf)
|
||||
if (isert_conn->login_desc)
|
||||
isert_free_login_buf(isert_conn);
|
||||
|
||||
isert_device_put(device);
|
||||
@ -964,17 +963,18 @@ isert_login_post_recv(struct isert_conn *isert_conn)
|
||||
int ret;
|
||||
|
||||
memset(&sge, 0, sizeof(struct ib_sge));
|
||||
sge.addr = isert_conn->login_req_dma;
|
||||
sge.addr = isert_conn->login_desc->dma_addr +
|
||||
isert_get_hdr_offset(isert_conn->login_desc);
|
||||
sge.length = ISER_RX_PAYLOAD_SIZE;
|
||||
sge.lkey = isert_conn->device->pd->local_dma_lkey;
|
||||
|
||||
isert_dbg("Setup sge: addr: %llx length: %d 0x%08x\n",
|
||||
sge.addr, sge.length, sge.lkey);
|
||||
|
||||
isert_conn->login_req_buf->rx_cqe.done = isert_login_recv_done;
|
||||
isert_conn->login_desc->rx_cqe.done = isert_login_recv_done;
|
||||
|
||||
memset(&rx_wr, 0, sizeof(struct ib_recv_wr));
|
||||
rx_wr.wr_cqe = &isert_conn->login_req_buf->rx_cqe;
|
||||
rx_wr.wr_cqe = &isert_conn->login_desc->rx_cqe;
|
||||
rx_wr.sg_list = &sge;
|
||||
rx_wr.num_sge = 1;
|
||||
|
||||
@ -1051,7 +1051,7 @@ post_send:
|
||||
static void
|
||||
isert_rx_login_req(struct isert_conn *isert_conn)
|
||||
{
|
||||
struct iser_rx_desc *rx_desc = isert_conn->login_req_buf;
|
||||
struct iser_rx_desc *rx_desc = isert_conn->login_desc;
|
||||
int rx_buflen = isert_conn->login_req_len;
|
||||
struct iscsi_conn *conn = isert_conn->conn;
|
||||
struct iscsi_login *login = conn->conn_login;
|
||||
@ -1063,7 +1063,7 @@ isert_rx_login_req(struct isert_conn *isert_conn)
|
||||
|
||||
if (login->first_request) {
|
||||
struct iscsi_login_req *login_req =
|
||||
(struct iscsi_login_req *)&rx_desc->iscsi_header;
|
||||
(struct iscsi_login_req *)isert_get_iscsi_hdr(rx_desc);
|
||||
/*
|
||||
* Setup the initial iscsi_login values from the leading
|
||||
* login request PDU.
|
||||
@ -1082,13 +1082,13 @@ isert_rx_login_req(struct isert_conn *isert_conn)
|
||||
login->tsih = be16_to_cpu(login_req->tsih);
|
||||
}
|
||||
|
||||
memcpy(&login->req[0], (void *)&rx_desc->iscsi_header, ISCSI_HDR_LEN);
|
||||
memcpy(&login->req[0], isert_get_iscsi_hdr(rx_desc), ISCSI_HDR_LEN);
|
||||
|
||||
size = min(rx_buflen, MAX_KEY_VALUE_PAIRS);
|
||||
isert_dbg("Using login payload size: %d, rx_buflen: %d "
|
||||
"MAX_KEY_VALUE_PAIRS: %d\n", size, rx_buflen,
|
||||
MAX_KEY_VALUE_PAIRS);
|
||||
memcpy(login->req_buf, &rx_desc->data[0], size);
|
||||
memcpy(login->req_buf, isert_get_data(rx_desc), size);
|
||||
|
||||
if (login->first_request) {
|
||||
complete(&isert_conn->login_comp);
|
||||
@ -1153,14 +1153,15 @@ isert_handle_scsi_cmd(struct isert_conn *isert_conn,
|
||||
if (imm_data_len != data_len) {
|
||||
sg_nents = max(1UL, DIV_ROUND_UP(imm_data_len, PAGE_SIZE));
|
||||
sg_copy_from_buffer(cmd->se_cmd.t_data_sg, sg_nents,
|
||||
&rx_desc->data[0], imm_data_len);
|
||||
isert_get_data(rx_desc), imm_data_len);
|
||||
isert_dbg("Copy Immediate sg_nents: %u imm_data_len: %d\n",
|
||||
sg_nents, imm_data_len);
|
||||
} else {
|
||||
sg_init_table(&isert_cmd->sg, 1);
|
||||
cmd->se_cmd.t_data_sg = &isert_cmd->sg;
|
||||
cmd->se_cmd.t_data_nents = 1;
|
||||
sg_set_buf(&isert_cmd->sg, &rx_desc->data[0], imm_data_len);
|
||||
sg_set_buf(&isert_cmd->sg, isert_get_data(rx_desc),
|
||||
imm_data_len);
|
||||
isert_dbg("Transfer Immediate imm_data_len: %d\n",
|
||||
imm_data_len);
|
||||
}
|
||||
@ -1229,9 +1230,9 @@ isert_handle_iscsi_dataout(struct isert_conn *isert_conn,
|
||||
}
|
||||
isert_dbg("Copying DataOut: sg_start: %p, sg_off: %u "
|
||||
"sg_nents: %u from %p %u\n", sg_start, sg_off,
|
||||
sg_nents, &rx_desc->data[0], unsol_data_len);
|
||||
sg_nents, isert_get_data(rx_desc), unsol_data_len);
|
||||
|
||||
sg_copy_from_buffer(sg_start, sg_nents, &rx_desc->data[0],
|
||||
sg_copy_from_buffer(sg_start, sg_nents, isert_get_data(rx_desc),
|
||||
unsol_data_len);
|
||||
|
||||
rc = iscsit_check_dataout_payload(cmd, hdr, false);
|
||||
@ -1290,7 +1291,7 @@ isert_handle_text_cmd(struct isert_conn *isert_conn, struct isert_cmd *isert_cmd
|
||||
}
|
||||
cmd->text_in_ptr = text_in;
|
||||
|
||||
memcpy(cmd->text_in_ptr, &rx_desc->data[0], payload_length);
|
||||
memcpy(cmd->text_in_ptr, isert_get_data(rx_desc), payload_length);
|
||||
|
||||
return iscsit_process_text_cmd(conn, cmd, hdr);
|
||||
}
|
||||
@ -1300,7 +1301,7 @@ isert_rx_opcode(struct isert_conn *isert_conn, struct iser_rx_desc *rx_desc,
|
||||
uint32_t read_stag, uint64_t read_va,
|
||||
uint32_t write_stag, uint64_t write_va)
|
||||
{
|
||||
struct iscsi_hdr *hdr = &rx_desc->iscsi_header;
|
||||
struct iscsi_hdr *hdr = isert_get_iscsi_hdr(rx_desc);
|
||||
struct iscsi_conn *conn = isert_conn->conn;
|
||||
struct iscsi_cmd *cmd;
|
||||
struct isert_cmd *isert_cmd;
|
||||
@ -1398,8 +1399,8 @@ isert_recv_done(struct ib_cq *cq, struct ib_wc *wc)
|
||||
struct isert_conn *isert_conn = wc->qp->qp_context;
|
||||
struct ib_device *ib_dev = isert_conn->cm_id->device;
|
||||
struct iser_rx_desc *rx_desc = cqe_to_rx_desc(wc->wr_cqe);
|
||||
struct iscsi_hdr *hdr = &rx_desc->iscsi_header;
|
||||
struct iser_ctrl *iser_ctrl = &rx_desc->iser_header;
|
||||
struct iscsi_hdr *hdr = isert_get_iscsi_hdr(rx_desc);
|
||||
struct iser_ctrl *iser_ctrl = isert_get_iser_hdr(rx_desc);
|
||||
uint64_t read_va = 0, write_va = 0;
|
||||
uint32_t read_stag = 0, write_stag = 0;
|
||||
|
||||
@ -1413,7 +1414,7 @@ isert_recv_done(struct ib_cq *cq, struct ib_wc *wc)
|
||||
rx_desc->in_use = true;
|
||||
|
||||
ib_dma_sync_single_for_cpu(ib_dev, rx_desc->dma_addr,
|
||||
ISER_RX_PAYLOAD_SIZE, DMA_FROM_DEVICE);
|
||||
ISER_RX_SIZE, DMA_FROM_DEVICE);
|
||||
|
||||
isert_dbg("DMA: 0x%llx, iSCSI opcode: 0x%02x, ITT: 0x%08x, flags: 0x%02x dlen: %d\n",
|
||||
rx_desc->dma_addr, hdr->opcode, hdr->itt, hdr->flags,
|
||||
@ -1448,7 +1449,7 @@ isert_recv_done(struct ib_cq *cq, struct ib_wc *wc)
|
||||
read_stag, read_va, write_stag, write_va);
|
||||
|
||||
ib_dma_sync_single_for_device(ib_dev, rx_desc->dma_addr,
|
||||
ISER_RX_PAYLOAD_SIZE, DMA_FROM_DEVICE);
|
||||
ISER_RX_SIZE, DMA_FROM_DEVICE);
|
||||
}
|
||||
|
||||
static void
|
||||
@ -1462,8 +1463,8 @@ isert_login_recv_done(struct ib_cq *cq, struct ib_wc *wc)
|
||||
return;
|
||||
}
|
||||
|
||||
ib_dma_sync_single_for_cpu(ib_dev, isert_conn->login_req_dma,
|
||||
ISER_RX_PAYLOAD_SIZE, DMA_FROM_DEVICE);
|
||||
ib_dma_sync_single_for_cpu(ib_dev, isert_conn->login_desc->dma_addr,
|
||||
ISER_RX_SIZE, DMA_FROM_DEVICE);
|
||||
|
||||
isert_conn->login_req_len = wc->byte_len - ISER_HEADERS_LEN;
|
||||
|
||||
@ -1478,8 +1479,8 @@ isert_login_recv_done(struct ib_cq *cq, struct ib_wc *wc)
|
||||
complete(&isert_conn->login_req_comp);
|
||||
mutex_unlock(&isert_conn->mutex);
|
||||
|
||||
ib_dma_sync_single_for_device(ib_dev, isert_conn->login_req_dma,
|
||||
ISER_RX_PAYLOAD_SIZE, DMA_FROM_DEVICE);
|
||||
ib_dma_sync_single_for_device(ib_dev, isert_conn->login_desc->dma_addr,
|
||||
ISER_RX_SIZE, DMA_FROM_DEVICE);
|
||||
}
|
||||
|
||||
static void
|
||||
|
||||
@ -59,9 +59,11 @@
|
||||
ISERT_MAX_TX_MISC_PDUS + \
|
||||
ISERT_MAX_RX_MISC_PDUS)
|
||||
|
||||
#define ISER_RX_PAD_SIZE (ISCSI_DEF_MAX_RECV_SEG_LEN + 4096 - \
|
||||
(ISER_RX_PAYLOAD_SIZE + sizeof(u64) + sizeof(struct ib_sge) + \
|
||||
sizeof(struct ib_cqe) + sizeof(bool)))
|
||||
/*
|
||||
* RX size is default of 8k plus headers, but data needs to align to
|
||||
* 512 boundary, so use 1024 to have the extra space for alignment.
|
||||
*/
|
||||
#define ISER_RX_SIZE (ISCSI_DEF_MAX_RECV_SEG_LEN + 1024)
|
||||
|
||||
#define ISCSI_ISER_SG_TABLESIZE 256
|
||||
|
||||
@ -80,21 +82,41 @@ enum iser_conn_state {
|
||||
};
|
||||
|
||||
struct iser_rx_desc {
|
||||
struct iser_ctrl iser_header;
|
||||
struct iscsi_hdr iscsi_header;
|
||||
char data[ISCSI_DEF_MAX_RECV_SEG_LEN];
|
||||
char buf[ISER_RX_SIZE];
|
||||
u64 dma_addr;
|
||||
struct ib_sge rx_sg;
|
||||
struct ib_cqe rx_cqe;
|
||||
bool in_use;
|
||||
char pad[ISER_RX_PAD_SIZE];
|
||||
} __packed;
|
||||
};
|
||||
|
||||
static inline struct iser_rx_desc *cqe_to_rx_desc(struct ib_cqe *cqe)
|
||||
{
|
||||
return container_of(cqe, struct iser_rx_desc, rx_cqe);
|
||||
}
|
||||
|
||||
static void *isert_get_iser_hdr(struct iser_rx_desc *desc)
|
||||
{
|
||||
return PTR_ALIGN(desc->buf + ISER_HEADERS_LEN, 512) - ISER_HEADERS_LEN;
|
||||
}
|
||||
|
||||
static size_t isert_get_hdr_offset(struct iser_rx_desc *desc)
|
||||
{
|
||||
return isert_get_iser_hdr(desc) - (void *)desc->buf;
|
||||
}
|
||||
|
||||
static void *isert_get_iscsi_hdr(struct iser_rx_desc *desc)
|
||||
{
|
||||
return isert_get_iser_hdr(desc) + sizeof(struct iser_ctrl);
|
||||
}
|
||||
|
||||
static void *isert_get_data(struct iser_rx_desc *desc)
|
||||
{
|
||||
void *data = isert_get_iser_hdr(desc) + ISER_HEADERS_LEN;
|
||||
|
||||
WARN_ON((uintptr_t)data & 511);
|
||||
return data;
|
||||
}
|
||||
|
||||
struct iser_tx_desc {
|
||||
struct iser_ctrl iser_header;
|
||||
struct iscsi_hdr iscsi_header;
|
||||
@ -141,9 +163,8 @@ struct isert_conn {
|
||||
u32 responder_resources;
|
||||
u32 initiator_depth;
|
||||
bool pi_support;
|
||||
struct iser_rx_desc *login_req_buf;
|
||||
struct iser_rx_desc *login_desc;
|
||||
char *login_rsp_buf;
|
||||
u64 login_req_dma;
|
||||
int login_req_len;
|
||||
u64 login_rsp_dma;
|
||||
struct iser_rx_desc *rx_descs;
|
||||
|
||||
@ -741,6 +741,13 @@ int amd_iommu_init_device(struct pci_dev *pdev, int pasids)
|
||||
|
||||
might_sleep();
|
||||
|
||||
/*
|
||||
* When memory encryption is active the device is likely not in a
|
||||
* direct-mapped domain. Forbid using IOMMUv2 functionality for now.
|
||||
*/
|
||||
if (mem_encrypt_active())
|
||||
return -ENODEV;
|
||||
|
||||
if (!amd_iommu_v2_supported())
|
||||
return -ENODEV;
|
||||
|
||||
|
||||
@ -121,6 +121,7 @@ int mmc_io_rw_extended(struct mmc_card *card, int write, unsigned fn,
|
||||
struct sg_table sgtable;
|
||||
unsigned int nents, left_size, i;
|
||||
unsigned int seg_size = card->host->max_seg_size;
|
||||
int err;
|
||||
|
||||
WARN_ON(blksz == 0);
|
||||
|
||||
@ -170,28 +171,32 @@ int mmc_io_rw_extended(struct mmc_card *card, int write, unsigned fn,
|
||||
|
||||
mmc_set_data_timeout(&data, card);
|
||||
|
||||
mmc_pre_req(card->host, &mrq);
|
||||
|
||||
mmc_wait_for_req(card->host, &mrq);
|
||||
|
||||
if (cmd.error)
|
||||
err = cmd.error;
|
||||
else if (data.error)
|
||||
err = data.error;
|
||||
else if (mmc_host_is_spi(card->host))
|
||||
/* host driver already reported errors */
|
||||
err = 0;
|
||||
else if (cmd.resp[0] & R5_ERROR)
|
||||
err = -EIO;
|
||||
else if (cmd.resp[0] & R5_FUNCTION_NUMBER)
|
||||
err = -EINVAL;
|
||||
else if (cmd.resp[0] & R5_OUT_OF_RANGE)
|
||||
err = -ERANGE;
|
||||
else
|
||||
err = 0;
|
||||
|
||||
mmc_post_req(card->host, &mrq, err);
|
||||
|
||||
if (nents > 1)
|
||||
sg_free_table(&sgtable);
|
||||
|
||||
if (cmd.error)
|
||||
return cmd.error;
|
||||
if (data.error)
|
||||
return data.error;
|
||||
|
||||
if (mmc_host_is_spi(card->host)) {
|
||||
/* host driver already reported errors */
|
||||
} else {
|
||||
if (cmd.resp[0] & R5_ERROR)
|
||||
return -EIO;
|
||||
if (cmd.resp[0] & R5_FUNCTION_NUMBER)
|
||||
return -EINVAL;
|
||||
if (cmd.resp[0] & R5_OUT_OF_RANGE)
|
||||
return -ERANGE;
|
||||
}
|
||||
|
||||
return 0;
|
||||
return err;
|
||||
}
|
||||
|
||||
int sdio_reset(struct mmc_host *host)
|
||||
|
||||
@ -547,12 +547,18 @@ static int amd_select_drive_strength(struct mmc_card *card,
|
||||
return MMC_SET_DRIVER_TYPE_A;
|
||||
}
|
||||
|
||||
static void sdhci_acpi_amd_hs400_dll(struct sdhci_host *host)
|
||||
static void sdhci_acpi_amd_hs400_dll(struct sdhci_host *host, bool enable)
|
||||
{
|
||||
struct sdhci_acpi_host *acpi_host = sdhci_priv(host);
|
||||
struct amd_sdhci_host *amd_host = sdhci_acpi_priv(acpi_host);
|
||||
|
||||
/* AMD Platform requires dll setting */
|
||||
sdhci_writel(host, 0x40003210, SDHCI_AMD_RESET_DLL_REGISTER);
|
||||
usleep_range(10, 20);
|
||||
sdhci_writel(host, 0x40033210, SDHCI_AMD_RESET_DLL_REGISTER);
|
||||
if (enable)
|
||||
sdhci_writel(host, 0x40033210, SDHCI_AMD_RESET_DLL_REGISTER);
|
||||
|
||||
amd_host->dll_enabled = enable;
|
||||
}
|
||||
|
||||
/*
|
||||
@ -592,10 +598,8 @@ static void amd_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
|
||||
|
||||
/* DLL is only required for HS400 */
|
||||
if (host->timing == MMC_TIMING_MMC_HS400 &&
|
||||
!amd_host->dll_enabled) {
|
||||
sdhci_acpi_amd_hs400_dll(host);
|
||||
amd_host->dll_enabled = true;
|
||||
}
|
||||
!amd_host->dll_enabled)
|
||||
sdhci_acpi_amd_hs400_dll(host, true);
|
||||
}
|
||||
}
|
||||
|
||||
@ -616,10 +620,23 @@ static int amd_sdhci_execute_tuning(struct mmc_host *mmc, u32 opcode)
|
||||
return err;
|
||||
}
|
||||
|
||||
static void amd_sdhci_reset(struct sdhci_host *host, u8 mask)
|
||||
{
|
||||
struct sdhci_acpi_host *acpi_host = sdhci_priv(host);
|
||||
struct amd_sdhci_host *amd_host = sdhci_acpi_priv(acpi_host);
|
||||
|
||||
if (mask & SDHCI_RESET_ALL) {
|
||||
amd_host->tuned_clock = false;
|
||||
sdhci_acpi_amd_hs400_dll(host, false);
|
||||
}
|
||||
|
||||
sdhci_reset(host, mask);
|
||||
}
|
||||
|
||||
static const struct sdhci_ops sdhci_acpi_ops_amd = {
|
||||
.set_clock = sdhci_set_clock,
|
||||
.set_bus_width = sdhci_set_bus_width,
|
||||
.reset = sdhci_reset,
|
||||
.reset = amd_sdhci_reset,
|
||||
.set_uhs_signaling = sdhci_set_uhs_signaling,
|
||||
};
|
||||
|
||||
|
||||
@ -1096,7 +1096,7 @@ static void sdhci_msm_set_cdr(struct sdhci_host *host, bool enable)
|
||||
static int sdhci_msm_execute_tuning(struct mmc_host *mmc, u32 opcode)
|
||||
{
|
||||
struct sdhci_host *host = mmc_priv(mmc);
|
||||
int tuning_seq_cnt = 3;
|
||||
int tuning_seq_cnt = 10;
|
||||
u8 phase, tuned_phases[16], tuned_phase_cnt = 0;
|
||||
int rc;
|
||||
struct mmc_ios ios = host->mmc->ios;
|
||||
@ -1152,6 +1152,22 @@ retry:
|
||||
} while (++phase < ARRAY_SIZE(tuned_phases));
|
||||
|
||||
if (tuned_phase_cnt) {
|
||||
if (tuned_phase_cnt == ARRAY_SIZE(tuned_phases)) {
|
||||
/*
|
||||
* All phases valid is _almost_ as bad as no phases
|
||||
* valid. Probably all phases are not really reliable
|
||||
* but we didn't detect where the unreliable place is.
|
||||
* That means we'll essentially be guessing and hoping
|
||||
* we get a good phase. Better to try a few times.
|
||||
*/
|
||||
dev_dbg(mmc_dev(mmc), "%s: All phases valid; try again\n",
|
||||
mmc_hostname(mmc));
|
||||
if (--tuning_seq_cnt) {
|
||||
tuned_phase_cnt = 0;
|
||||
goto retry;
|
||||
}
|
||||
}
|
||||
|
||||
rc = msm_find_most_appropriate_phase(host, tuned_phases,
|
||||
tuned_phase_cnt);
|
||||
if (rc < 0)
|
||||
|
||||
@ -81,6 +81,7 @@ struct sdhci_esdhc {
|
||||
bool quirk_tuning_erratum_type2;
|
||||
bool quirk_ignore_data_inhibit;
|
||||
bool quirk_delay_before_data_reset;
|
||||
bool quirk_trans_complete_erratum;
|
||||
bool in_sw_tuning;
|
||||
unsigned int peripheral_clock;
|
||||
const struct esdhc_clk_fixup *clk_fixup;
|
||||
@ -1082,10 +1083,11 @@ static void esdhc_set_uhs_signaling(struct sdhci_host *host,
|
||||
|
||||
static u32 esdhc_irq(struct sdhci_host *host, u32 intmask)
|
||||
{
|
||||
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
|
||||
struct sdhci_esdhc *esdhc = sdhci_pltfm_priv(pltfm_host);
|
||||
u32 command;
|
||||
|
||||
if (of_find_compatible_node(NULL, NULL,
|
||||
"fsl,p2020-esdhc")) {
|
||||
if (esdhc->quirk_trans_complete_erratum) {
|
||||
command = SDHCI_GET_CMD(sdhci_readw(host,
|
||||
SDHCI_COMMAND));
|
||||
if (command == MMC_WRITE_MULTIPLE_BLOCK &&
|
||||
@ -1239,8 +1241,10 @@ static void esdhc_init(struct platform_device *pdev, struct sdhci_host *host)
|
||||
esdhc->clk_fixup = match->data;
|
||||
np = pdev->dev.of_node;
|
||||
|
||||
if (of_device_is_compatible(np, "fsl,p2020-esdhc"))
|
||||
if (of_device_is_compatible(np, "fsl,p2020-esdhc")) {
|
||||
esdhc->quirk_delay_before_data_reset = true;
|
||||
esdhc->quirk_trans_complete_erratum = true;
|
||||
}
|
||||
|
||||
clk = of_clk_get(np, 0);
|
||||
if (!IS_ERR(clk)) {
|
||||
|
||||
@ -21,6 +21,7 @@
|
||||
#include <net/pkt_cls.h>
|
||||
#include <net/tcp.h>
|
||||
#include <net/vxlan.h>
|
||||
#include <net/geneve.h>
|
||||
|
||||
#include "hnae3.h"
|
||||
#include "hns3_enet.h"
|
||||
@ -795,7 +796,7 @@ static int hns3_get_l4_protocol(struct sk_buff *skb, u8 *ol4_proto,
|
||||
* and it is udp packet, which has a dest port as the IANA assigned.
|
||||
* the hardware is expected to do the checksum offload, but the
|
||||
* hardware will not do the checksum offload when udp dest port is
|
||||
* 4789.
|
||||
* 4789 or 6081.
|
||||
*/
|
||||
static bool hns3_tunnel_csum_bug(struct sk_buff *skb)
|
||||
{
|
||||
@ -804,7 +805,8 @@ static bool hns3_tunnel_csum_bug(struct sk_buff *skb)
|
||||
l4.hdr = skb_transport_header(skb);
|
||||
|
||||
if (!(!skb->encapsulation &&
|
||||
l4.udp->dest == htons(IANA_VXLAN_UDP_PORT)))
|
||||
(l4.udp->dest == htons(IANA_VXLAN_UDP_PORT) ||
|
||||
l4.udp->dest == htons(GENEVE_UDP_PORT))))
|
||||
return false;
|
||||
|
||||
skb_checksum_help(skb);
|
||||
|
||||
@ -370,6 +370,7 @@ static int cisco_ioctl(struct net_device *dev, struct ifreq *ifr)
|
||||
memcpy(&state(hdlc)->settings, &new_settings, size);
|
||||
spin_lock_init(&state(hdlc)->lock);
|
||||
dev->header_ops = &cisco_header_ops;
|
||||
dev->hard_header_len = sizeof(struct hdlc_header);
|
||||
dev->type = ARPHRD_CISCO;
|
||||
call_netdevice_notifiers(NETDEV_POST_TYPE_CHANGE, dev);
|
||||
netif_dormant_on(dev);
|
||||
|
||||
@ -210,6 +210,8 @@ static void lapbeth_data_transmit(struct net_device *ndev, struct sk_buff *skb)
|
||||
|
||||
skb->dev = dev = lapbeth->ethdev;
|
||||
|
||||
skb_reset_network_header(skb);
|
||||
|
||||
dev_hard_header(skb, dev, ETH_P_DEC, bcast_addr, NULL, 0);
|
||||
|
||||
dev_queue_xmit(skb);
|
||||
@ -340,6 +342,7 @@ static int lapbeth_new_device(struct net_device *dev)
|
||||
*/
|
||||
ndev->needed_headroom = -1 + 3 + 2 + dev->hard_header_len
|
||||
+ dev->needed_headroom;
|
||||
ndev->needed_tailroom = dev->needed_tailroom;
|
||||
|
||||
lapbeth = netdev_priv(ndev);
|
||||
lapbeth->axdev = ndev;
|
||||
|
||||
@ -966,7 +966,7 @@ static int st95hf_in_send_cmd(struct nfc_digital_dev *ddev,
|
||||
rc = down_killable(&stcontext->exchange_lock);
|
||||
if (rc) {
|
||||
WARN(1, "Semaphore is not found up in st95hf_in_send_cmd\n");
|
||||
return rc;
|
||||
goto free_skb_resp;
|
||||
}
|
||||
|
||||
rc = st95hf_spi_send(&stcontext->spicontext, skb->data,
|
||||
|
||||
@ -4148,7 +4148,7 @@ void nvme_unfreeze(struct nvme_ctrl *ctrl)
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(nvme_unfreeze);
|
||||
|
||||
void nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout)
|
||||
int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout)
|
||||
{
|
||||
struct nvme_ns *ns;
|
||||
|
||||
@ -4159,6 +4159,7 @@ void nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout)
|
||||
break;
|
||||
}
|
||||
up_read(&ctrl->namespaces_rwsem);
|
||||
return timeout;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(nvme_wait_freeze_timeout);
|
||||
|
||||
|
||||
@ -565,10 +565,14 @@ bool __nvmf_check_ready(struct nvme_ctrl *ctrl, struct request *rq,
|
||||
struct nvme_request *req = nvme_req(rq);
|
||||
|
||||
/*
|
||||
* If we are in some state of setup or teardown only allow
|
||||
* internally generated commands.
|
||||
* currently we have a problem sending passthru commands
|
||||
* on the admin_q if the controller is not LIVE because we can't
|
||||
* make sure that they are going out after the admin connect,
|
||||
* controller enable and/or other commands in the initialization
|
||||
* sequence. until the controller will be LIVE, fail with
|
||||
* BLK_STS_RESOURCE so that they will be rescheduled.
|
||||
*/
|
||||
if (!blk_rq_is_passthrough(rq) || (req->flags & NVME_REQ_USERCMD))
|
||||
if (rq->q == ctrl->admin_q && (req->flags & NVME_REQ_USERCMD))
|
||||
return false;
|
||||
|
||||
/*
|
||||
@ -576,9 +580,8 @@ bool __nvmf_check_ready(struct nvme_ctrl *ctrl, struct request *rq,
|
||||
* which is require to set the queue live in the appropinquate states.
|
||||
*/
|
||||
switch (ctrl->state) {
|
||||
case NVME_CTRL_NEW:
|
||||
case NVME_CTRL_CONNECTING:
|
||||
if (nvme_is_fabrics(req->cmd) &&
|
||||
if (blk_rq_is_passthrough(rq) && nvme_is_fabrics(req->cmd) &&
|
||||
req->cmd->fabrics.fctype == nvme_fabrics_type_connect)
|
||||
return true;
|
||||
break;
|
||||
|
||||
@ -485,7 +485,7 @@ void nvme_kill_queues(struct nvme_ctrl *ctrl);
|
||||
void nvme_sync_queues(struct nvme_ctrl *ctrl);
|
||||
void nvme_unfreeze(struct nvme_ctrl *ctrl);
|
||||
void nvme_wait_freeze(struct nvme_ctrl *ctrl);
|
||||
void nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout);
|
||||
int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout);
|
||||
void nvme_start_freeze(struct nvme_ctrl *ctrl);
|
||||
|
||||
#define NVME_QID_ANY -1
|
||||
|
||||
@ -1274,8 +1274,8 @@ static enum blk_eh_timer_return nvme_timeout(struct request *req, bool reserved)
|
||||
dev_warn_ratelimited(dev->ctrl.device,
|
||||
"I/O %d QID %d timeout, disable controller\n",
|
||||
req->tag, nvmeq->qid);
|
||||
nvme_dev_disable(dev, true);
|
||||
nvme_req(req)->flags |= NVME_REQ_CANCELLED;
|
||||
nvme_dev_disable(dev, true);
|
||||
return BLK_EH_DONE;
|
||||
case NVME_CTRL_RESETTING:
|
||||
return BLK_EH_RESET_TIMER;
|
||||
@ -1292,10 +1292,10 @@ static enum blk_eh_timer_return nvme_timeout(struct request *req, bool reserved)
|
||||
dev_warn(dev->ctrl.device,
|
||||
"I/O %d QID %d timeout, reset controller\n",
|
||||
req->tag, nvmeq->qid);
|
||||
nvme_req(req)->flags |= NVME_REQ_CANCELLED;
|
||||
nvme_dev_disable(dev, false);
|
||||
nvme_reset_ctrl(&dev->ctrl);
|
||||
|
||||
nvme_req(req)->flags |= NVME_REQ_CANCELLED;
|
||||
return BLK_EH_DONE;
|
||||
}
|
||||
|
||||
|
||||
@ -110,6 +110,7 @@ struct nvme_rdma_ctrl {
|
||||
struct sockaddr_storage src_addr;
|
||||
|
||||
struct nvme_ctrl ctrl;
|
||||
struct mutex teardown_lock;
|
||||
bool use_inline_data;
|
||||
u32 io_queues[HCTX_MAX_TYPES];
|
||||
};
|
||||
@ -898,7 +899,15 @@ static int nvme_rdma_configure_io_queues(struct nvme_rdma_ctrl *ctrl, bool new)
|
||||
|
||||
if (!new) {
|
||||
nvme_start_queues(&ctrl->ctrl);
|
||||
nvme_wait_freeze(&ctrl->ctrl);
|
||||
if (!nvme_wait_freeze_timeout(&ctrl->ctrl, NVME_IO_TIMEOUT)) {
|
||||
/*
|
||||
* If we timed out waiting for freeze we are likely to
|
||||
* be stuck. Fail the controller initialization just
|
||||
* to be safe.
|
||||
*/
|
||||
ret = -ENODEV;
|
||||
goto out_wait_freeze_timed_out;
|
||||
}
|
||||
blk_mq_update_nr_hw_queues(ctrl->ctrl.tagset,
|
||||
ctrl->ctrl.queue_count - 1);
|
||||
nvme_unfreeze(&ctrl->ctrl);
|
||||
@ -906,6 +915,9 @@ static int nvme_rdma_configure_io_queues(struct nvme_rdma_ctrl *ctrl, bool new)
|
||||
|
||||
return 0;
|
||||
|
||||
out_wait_freeze_timed_out:
|
||||
nvme_stop_queues(&ctrl->ctrl);
|
||||
nvme_rdma_stop_io_queues(ctrl);
|
||||
out_cleanup_connect_q:
|
||||
if (new)
|
||||
blk_cleanup_queue(ctrl->ctrl.connect_q);
|
||||
@ -920,6 +932,7 @@ out_free_io_queues:
|
||||
static void nvme_rdma_teardown_admin_queue(struct nvme_rdma_ctrl *ctrl,
|
||||
bool remove)
|
||||
{
|
||||
mutex_lock(&ctrl->teardown_lock);
|
||||
blk_mq_quiesce_queue(ctrl->ctrl.admin_q);
|
||||
nvme_rdma_stop_queue(&ctrl->queues[0]);
|
||||
if (ctrl->ctrl.admin_tagset) {
|
||||
@ -930,11 +943,13 @@ static void nvme_rdma_teardown_admin_queue(struct nvme_rdma_ctrl *ctrl,
|
||||
if (remove)
|
||||
blk_mq_unquiesce_queue(ctrl->ctrl.admin_q);
|
||||
nvme_rdma_destroy_admin_queue(ctrl, remove);
|
||||
mutex_unlock(&ctrl->teardown_lock);
|
||||
}
|
||||
|
||||
static void nvme_rdma_teardown_io_queues(struct nvme_rdma_ctrl *ctrl,
|
||||
bool remove)
|
||||
{
|
||||
mutex_lock(&ctrl->teardown_lock);
|
||||
if (ctrl->ctrl.queue_count > 1) {
|
||||
nvme_start_freeze(&ctrl->ctrl);
|
||||
nvme_stop_queues(&ctrl->ctrl);
|
||||
@ -948,6 +963,7 @@ static void nvme_rdma_teardown_io_queues(struct nvme_rdma_ctrl *ctrl,
|
||||
nvme_start_queues(&ctrl->ctrl);
|
||||
nvme_rdma_destroy_io_queues(ctrl, remove);
|
||||
}
|
||||
mutex_unlock(&ctrl->teardown_lock);
|
||||
}
|
||||
|
||||
static void nvme_rdma_free_ctrl(struct nvme_ctrl *nctrl)
|
||||
@ -1096,6 +1112,7 @@ static void nvme_rdma_error_recovery(struct nvme_rdma_ctrl *ctrl)
|
||||
if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_RESETTING))
|
||||
return;
|
||||
|
||||
dev_warn(ctrl->ctrl.device, "starting error recovery\n");
|
||||
queue_work(nvme_reset_wq, &ctrl->err_work);
|
||||
}
|
||||
|
||||
@ -1699,6 +1716,22 @@ static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id,
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void nvme_rdma_complete_timed_out(struct request *rq)
|
||||
{
|
||||
struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
|
||||
struct nvme_rdma_queue *queue = req->queue;
|
||||
struct nvme_rdma_ctrl *ctrl = queue->ctrl;
|
||||
|
||||
/* fence other contexts that may complete the command */
|
||||
mutex_lock(&ctrl->teardown_lock);
|
||||
nvme_rdma_stop_queue(queue);
|
||||
if (!blk_mq_request_completed(rq)) {
|
||||
nvme_req(rq)->status = NVME_SC_HOST_ABORTED_CMD;
|
||||
blk_mq_complete_request(rq);
|
||||
}
|
||||
mutex_unlock(&ctrl->teardown_lock);
|
||||
}
|
||||
|
||||
static enum blk_eh_timer_return
|
||||
nvme_rdma_timeout(struct request *rq, bool reserved)
|
||||
{
|
||||
@ -1709,29 +1742,29 @@ nvme_rdma_timeout(struct request *rq, bool reserved)
|
||||
dev_warn(ctrl->ctrl.device, "I/O %d QID %d timeout\n",
|
||||
rq->tag, nvme_rdma_queue_idx(queue));
|
||||
|
||||
/*
|
||||
* Restart the timer if a controller reset is already scheduled. Any
|
||||
* timed out commands would be handled before entering the connecting
|
||||
* state.
|
||||
*/
|
||||
if (ctrl->ctrl.state == NVME_CTRL_RESETTING)
|
||||
return BLK_EH_RESET_TIMER;
|
||||
|
||||
if (ctrl->ctrl.state != NVME_CTRL_LIVE) {
|
||||
/*
|
||||
* Teardown immediately if controller times out while starting
|
||||
* or we are already started error recovery. all outstanding
|
||||
* requests are completed on shutdown, so we return BLK_EH_DONE.
|
||||
* If we are resetting, connecting or deleting we should
|
||||
* complete immediately because we may block controller
|
||||
* teardown or setup sequence
|
||||
* - ctrl disable/shutdown fabrics requests
|
||||
* - connect requests
|
||||
* - initialization admin requests
|
||||
* - I/O requests that entered after unquiescing and
|
||||
* the controller stopped responding
|
||||
*
|
||||
* All other requests should be cancelled by the error
|
||||
* recovery work, so it's fine that we fail it here.
|
||||
*/
|
||||
flush_work(&ctrl->err_work);
|
||||
nvme_rdma_teardown_io_queues(ctrl, false);
|
||||
nvme_rdma_teardown_admin_queue(ctrl, false);
|
||||
nvme_rdma_complete_timed_out(rq);
|
||||
return BLK_EH_DONE;
|
||||
}
|
||||
|
||||
dev_warn(ctrl->ctrl.device, "starting error recovery\n");
|
||||
/*
|
||||
* LIVE state should trigger the normal error recovery which will
|
||||
* handle completing this request.
|
||||
*/
|
||||
nvme_rdma_error_recovery(ctrl);
|
||||
|
||||
return BLK_EH_RESET_TIMER;
|
||||
}
|
||||
|
||||
@ -1988,6 +2021,7 @@ static struct nvme_ctrl *nvme_rdma_create_ctrl(struct device *dev,
|
||||
return ERR_PTR(-ENOMEM);
|
||||
ctrl->ctrl.opts = opts;
|
||||
INIT_LIST_HEAD(&ctrl->list);
|
||||
mutex_init(&ctrl->teardown_lock);
|
||||
|
||||
if (!(opts->mask & NVMF_OPT_TRSVCID)) {
|
||||
opts->trsvcid =
|
||||
|
||||
@ -110,6 +110,7 @@ struct nvme_tcp_ctrl {
|
||||
struct sockaddr_storage src_addr;
|
||||
struct nvme_ctrl ctrl;
|
||||
|
||||
struct mutex teardown_lock;
|
||||
struct work_struct err_work;
|
||||
struct delayed_work connect_work;
|
||||
struct nvme_tcp_request async_req;
|
||||
@ -420,6 +421,7 @@ static void nvme_tcp_error_recovery(struct nvme_ctrl *ctrl)
|
||||
if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING))
|
||||
return;
|
||||
|
||||
dev_warn(ctrl->device, "starting error recovery\n");
|
||||
queue_work(nvme_reset_wq, &to_tcp_ctrl(ctrl)->err_work);
|
||||
}
|
||||
|
||||
@ -1438,7 +1440,6 @@ static void nvme_tcp_stop_queue(struct nvme_ctrl *nctrl, int qid)
|
||||
|
||||
if (!test_and_clear_bit(NVME_TCP_Q_LIVE, &queue->flags))
|
||||
return;
|
||||
|
||||
__nvme_tcp_stop_queue(queue);
|
||||
}
|
||||
|
||||
@ -1692,7 +1693,15 @@ static int nvme_tcp_configure_io_queues(struct nvme_ctrl *ctrl, bool new)
|
||||
|
||||
if (!new) {
|
||||
nvme_start_queues(ctrl);
|
||||
nvme_wait_freeze(ctrl);
|
||||
if (!nvme_wait_freeze_timeout(ctrl, NVME_IO_TIMEOUT)) {
|
||||
/*
|
||||
* If we timed out waiting for freeze we are likely to
|
||||
* be stuck. Fail the controller initialization just
|
||||
* to be safe.
|
||||
*/
|
||||
ret = -ENODEV;
|
||||
goto out_wait_freeze_timed_out;
|
||||
}
|
||||
blk_mq_update_nr_hw_queues(ctrl->tagset,
|
||||
ctrl->queue_count - 1);
|
||||
nvme_unfreeze(ctrl);
|
||||
@ -1700,6 +1709,9 @@ static int nvme_tcp_configure_io_queues(struct nvme_ctrl *ctrl, bool new)
|
||||
|
||||
return 0;
|
||||
|
||||
out_wait_freeze_timed_out:
|
||||
nvme_stop_queues(ctrl);
|
||||
nvme_tcp_stop_io_queues(ctrl);
|
||||
out_cleanup_connect_q:
|
||||
if (new)
|
||||
blk_cleanup_queue(ctrl->connect_q);
|
||||
@ -1785,6 +1797,7 @@ out_free_queue:
|
||||
static void nvme_tcp_teardown_admin_queue(struct nvme_ctrl *ctrl,
|
||||
bool remove)
|
||||
{
|
||||
mutex_lock(&to_tcp_ctrl(ctrl)->teardown_lock);
|
||||
blk_mq_quiesce_queue(ctrl->admin_q);
|
||||
nvme_tcp_stop_queue(ctrl, 0);
|
||||
if (ctrl->admin_tagset) {
|
||||
@ -1795,13 +1808,16 @@ static void nvme_tcp_teardown_admin_queue(struct nvme_ctrl *ctrl,
|
||||
if (remove)
|
||||
blk_mq_unquiesce_queue(ctrl->admin_q);
|
||||
nvme_tcp_destroy_admin_queue(ctrl, remove);
|
||||
mutex_unlock(&to_tcp_ctrl(ctrl)->teardown_lock);
|
||||
}
|
||||
|
||||
static void nvme_tcp_teardown_io_queues(struct nvme_ctrl *ctrl,
|
||||
bool remove)
|
||||
{
|
||||
mutex_lock(&to_tcp_ctrl(ctrl)->teardown_lock);
|
||||
if (ctrl->queue_count <= 1)
|
||||
return;
|
||||
goto out;
|
||||
blk_mq_quiesce_queue(ctrl->admin_q);
|
||||
nvme_start_freeze(ctrl);
|
||||
nvme_stop_queues(ctrl);
|
||||
nvme_tcp_stop_io_queues(ctrl);
|
||||
@ -1813,6 +1829,8 @@ static void nvme_tcp_teardown_io_queues(struct nvme_ctrl *ctrl,
|
||||
if (remove)
|
||||
nvme_start_queues(ctrl);
|
||||
nvme_tcp_destroy_io_queues(ctrl, remove);
|
||||
out:
|
||||
mutex_unlock(&to_tcp_ctrl(ctrl)->teardown_lock);
|
||||
}
|
||||
|
||||
static void nvme_tcp_reconnect_or_remove(struct nvme_ctrl *ctrl)
|
||||
@ -2051,40 +2069,55 @@ static void nvme_tcp_submit_async_event(struct nvme_ctrl *arg)
|
||||
nvme_tcp_queue_request(&ctrl->async_req);
|
||||
}
|
||||
|
||||
static void nvme_tcp_complete_timed_out(struct request *rq)
|
||||
{
|
||||
struct nvme_tcp_request *req = blk_mq_rq_to_pdu(rq);
|
||||
struct nvme_ctrl *ctrl = &req->queue->ctrl->ctrl;
|
||||
|
||||
/* fence other contexts that may complete the command */
|
||||
mutex_lock(&to_tcp_ctrl(ctrl)->teardown_lock);
|
||||
nvme_tcp_stop_queue(ctrl, nvme_tcp_queue_id(req->queue));
|
||||
if (!blk_mq_request_completed(rq)) {
|
||||
nvme_req(rq)->status = NVME_SC_HOST_ABORTED_CMD;
|
||||
blk_mq_complete_request(rq);
|
||||
}
|
||||
mutex_unlock(&to_tcp_ctrl(ctrl)->teardown_lock);
|
||||
}
|
||||
|
||||
static enum blk_eh_timer_return
|
||||
nvme_tcp_timeout(struct request *rq, bool reserved)
|
||||
{
|
||||
struct nvme_tcp_request *req = blk_mq_rq_to_pdu(rq);
|
||||
struct nvme_tcp_ctrl *ctrl = req->queue->ctrl;
|
||||
struct nvme_ctrl *ctrl = &req->queue->ctrl->ctrl;
|
||||
struct nvme_tcp_cmd_pdu *pdu = req->pdu;
|
||||
|
||||
/*
|
||||
* Restart the timer if a controller reset is already scheduled. Any
|
||||
* timed out commands would be handled before entering the connecting
|
||||
* state.
|
||||
*/
|
||||
if (ctrl->ctrl.state == NVME_CTRL_RESETTING)
|
||||
return BLK_EH_RESET_TIMER;
|
||||
|
||||
dev_warn(ctrl->ctrl.device,
|
||||
dev_warn(ctrl->device,
|
||||
"queue %d: timeout request %#x type %d\n",
|
||||
nvme_tcp_queue_id(req->queue), rq->tag, pdu->hdr.type);
|
||||
|
||||
if (ctrl->ctrl.state != NVME_CTRL_LIVE) {
|
||||
if (ctrl->state != NVME_CTRL_LIVE) {
|
||||
/*
|
||||
* Teardown immediately if controller times out while starting
|
||||
* or we are already started error recovery. all outstanding
|
||||
* requests are completed on shutdown, so we return BLK_EH_DONE.
|
||||
* If we are resetting, connecting or deleting we should
|
||||
* complete immediately because we may block controller
|
||||
* teardown or setup sequence
|
||||
* - ctrl disable/shutdown fabrics requests
|
||||
* - connect requests
|
||||
* - initialization admin requests
|
||||
* - I/O requests that entered after unquiescing and
|
||||
* the controller stopped responding
|
||||
*
|
||||
* All other requests should be cancelled by the error
|
||||
* recovery work, so it's fine that we fail it here.
|
||||
*/
|
||||
flush_work(&ctrl->err_work);
|
||||
nvme_tcp_teardown_io_queues(&ctrl->ctrl, false);
|
||||
nvme_tcp_teardown_admin_queue(&ctrl->ctrl, false);
|
||||
nvme_tcp_complete_timed_out(rq);
|
||||
return BLK_EH_DONE;
|
||||
}
|
||||
|
||||
dev_warn(ctrl->ctrl.device, "starting error recovery\n");
|
||||
nvme_tcp_error_recovery(&ctrl->ctrl);
|
||||
|
||||
/*
|
||||
* LIVE state should trigger the normal error recovery which will
|
||||
* handle completing this request.
|
||||
*/
|
||||
nvme_tcp_error_recovery(ctrl);
|
||||
return BLK_EH_RESET_TIMER;
|
||||
}
|
||||
|
||||
@ -2311,6 +2344,7 @@ static struct nvme_ctrl *nvme_tcp_create_ctrl(struct device *dev,
|
||||
nvme_tcp_reconnect_ctrl_work);
|
||||
INIT_WORK(&ctrl->err_work, nvme_tcp_error_recovery_work);
|
||||
INIT_WORK(&ctrl->ctrl.reset_work, nvme_reset_ctrl_work);
|
||||
mutex_init(&ctrl->teardown_lock);
|
||||
|
||||
if (!(opts->mask & NVMF_OPT_TRSVCID)) {
|
||||
opts->trsvcid =
|
||||
|
||||
@ -150,6 +150,11 @@ static void nvmet_tcp_finish_cmd(struct nvmet_tcp_cmd *cmd);
|
||||
static inline u16 nvmet_tcp_cmd_tag(struct nvmet_tcp_queue *queue,
|
||||
struct nvmet_tcp_cmd *cmd)
|
||||
{
|
||||
if (unlikely(!queue->nr_cmds)) {
|
||||
/* We didn't allocate cmds yet, send 0xffff */
|
||||
return USHRT_MAX;
|
||||
}
|
||||
|
||||
return cmd - queue->cmds;
|
||||
}
|
||||
|
||||
@ -847,7 +852,10 @@ static int nvmet_tcp_handle_h2c_data_pdu(struct nvmet_tcp_queue *queue)
|
||||
struct nvme_tcp_data_pdu *data = &queue->pdu.data;
|
||||
struct nvmet_tcp_cmd *cmd;
|
||||
|
||||
cmd = &queue->cmds[data->ttag];
|
||||
if (likely(queue->nr_cmds))
|
||||
cmd = &queue->cmds[data->ttag];
|
||||
else
|
||||
cmd = &queue->connect;
|
||||
|
||||
if (le32_to_cpu(data->data_offset) != cmd->rbytes_done) {
|
||||
pr_err("ttag %u unexpected data offset %u (expected %u)\n",
|
||||
|
||||
@ -414,8 +414,8 @@ static const struct qmp_phy_init_tbl ipq8074_pcie_serdes_tbl[] = {
|
||||
QMP_PHY_INIT_CFG(QSERDES_COM_BG_TRIM, 0xf),
|
||||
QMP_PHY_INIT_CFG(QSERDES_COM_LOCK_CMP_EN, 0x1),
|
||||
QMP_PHY_INIT_CFG(QSERDES_COM_VCO_TUNE_MAP, 0x0),
|
||||
QMP_PHY_INIT_CFG(QSERDES_COM_VCO_TUNE_TIMER1, 0x1f),
|
||||
QMP_PHY_INIT_CFG(QSERDES_COM_VCO_TUNE_TIMER2, 0x3f),
|
||||
QMP_PHY_INIT_CFG(QSERDES_COM_VCO_TUNE_TIMER1, 0xff),
|
||||
QMP_PHY_INIT_CFG(QSERDES_COM_VCO_TUNE_TIMER2, 0x1f),
|
||||
QMP_PHY_INIT_CFG(QSERDES_COM_CMN_CONFIG, 0x6),
|
||||
QMP_PHY_INIT_CFG(QSERDES_COM_PLL_IVCO, 0xf),
|
||||
QMP_PHY_INIT_CFG(QSERDES_COM_HSCLK_SEL, 0x0),
|
||||
@ -441,7 +441,6 @@ static const struct qmp_phy_init_tbl ipq8074_pcie_serdes_tbl[] = {
|
||||
QMP_PHY_INIT_CFG(QSERDES_COM_INTEGLOOP_GAIN1_MODE0, 0x0),
|
||||
QMP_PHY_INIT_CFG(QSERDES_COM_INTEGLOOP_GAIN0_MODE0, 0x80),
|
||||
QMP_PHY_INIT_CFG(QSERDES_COM_BIAS_EN_CTRL_BY_PSM, 0x1),
|
||||
QMP_PHY_INIT_CFG(QSERDES_COM_VCO_TUNE_CTRL, 0xa),
|
||||
QMP_PHY_INIT_CFG(QSERDES_COM_SSC_EN_CENTER, 0x1),
|
||||
QMP_PHY_INIT_CFG(QSERDES_COM_SSC_PER1, 0x31),
|
||||
QMP_PHY_INIT_CFG(QSERDES_COM_SSC_PER2, 0x1),
|
||||
@ -450,7 +449,6 @@ static const struct qmp_phy_init_tbl ipq8074_pcie_serdes_tbl[] = {
|
||||
QMP_PHY_INIT_CFG(QSERDES_COM_SSC_STEP_SIZE1, 0x2f),
|
||||
QMP_PHY_INIT_CFG(QSERDES_COM_SSC_STEP_SIZE2, 0x19),
|
||||
QMP_PHY_INIT_CFG(QSERDES_COM_CLK_EP_DIV, 0x19),
|
||||
QMP_PHY_INIT_CFG(QSERDES_RX_SIGDET_CNTRL, 0x7),
|
||||
};
|
||||
|
||||
static const struct qmp_phy_init_tbl ipq8074_pcie_tx_tbl[] = {
|
||||
@ -458,6 +456,8 @@ static const struct qmp_phy_init_tbl ipq8074_pcie_tx_tbl[] = {
|
||||
QMP_PHY_INIT_CFG(QSERDES_TX_LANE_MODE, 0x6),
|
||||
QMP_PHY_INIT_CFG(QSERDES_TX_RES_CODE_LANE_OFFSET, 0x2),
|
||||
QMP_PHY_INIT_CFG(QSERDES_TX_RCV_DETECT_LVL_2, 0x12),
|
||||
QMP_PHY_INIT_CFG(QSERDES_TX_EMP_POST1_LVL, 0x36),
|
||||
QMP_PHY_INIT_CFG(QSERDES_TX_SLEW_CNTL, 0x0a),
|
||||
};
|
||||
|
||||
static const struct qmp_phy_init_tbl ipq8074_pcie_rx_tbl[] = {
|
||||
@ -468,7 +468,6 @@ static const struct qmp_phy_init_tbl ipq8074_pcie_rx_tbl[] = {
|
||||
QMP_PHY_INIT_CFG(QSERDES_RX_RX_EQU_ADAPTOR_CNTRL4, 0xdb),
|
||||
QMP_PHY_INIT_CFG(QSERDES_RX_UCDR_SO_SATURATION_AND_ENABLE, 0x4b),
|
||||
QMP_PHY_INIT_CFG(QSERDES_RX_UCDR_SO_GAIN, 0x4),
|
||||
QMP_PHY_INIT_CFG(QSERDES_RX_UCDR_SO_GAIN_HALF, 0x4),
|
||||
};
|
||||
|
||||
static const struct qmp_phy_init_tbl ipq8074_pcie_pcs_tbl[] = {
|
||||
@ -1352,6 +1351,9 @@ static const struct qmp_phy_cfg msm8996_usb3phy_cfg = {
|
||||
.pwrdn_ctrl = SW_PWRDN,
|
||||
};
|
||||
|
||||
static const char * const ipq8074_pciephy_clk_l[] = {
|
||||
"aux", "cfg_ahb",
|
||||
};
|
||||
/* list of resets */
|
||||
static const char * const ipq8074_pciephy_reset_l[] = {
|
||||
"phy", "common",
|
||||
@ -1369,8 +1371,8 @@ static const struct qmp_phy_cfg ipq8074_pciephy_cfg = {
|
||||
.rx_tbl_num = ARRAY_SIZE(ipq8074_pcie_rx_tbl),
|
||||
.pcs_tbl = ipq8074_pcie_pcs_tbl,
|
||||
.pcs_tbl_num = ARRAY_SIZE(ipq8074_pcie_pcs_tbl),
|
||||
.clk_list = NULL,
|
||||
.num_clks = 0,
|
||||
.clk_list = ipq8074_pciephy_clk_l,
|
||||
.num_clks = ARRAY_SIZE(ipq8074_pciephy_clk_l),
|
||||
.reset_list = ipq8074_pciephy_reset_l,
|
||||
.num_resets = ARRAY_SIZE(ipq8074_pciephy_reset_l),
|
||||
.vreg_list = NULL,
|
||||
|
||||
@ -77,6 +77,8 @@
|
||||
#define QSERDES_COM_CORECLK_DIV_MODE1 0x1bc
|
||||
|
||||
/* Only for QMP V2 PHY - TX registers */
|
||||
#define QSERDES_TX_EMP_POST1_LVL 0x018
|
||||
#define QSERDES_TX_SLEW_CNTL 0x040
|
||||
#define QSERDES_TX_RES_CODE_LANE_OFFSET 0x054
|
||||
#define QSERDES_TX_DEBUG_BUS_SEL 0x064
|
||||
#define QSERDES_TX_HIGHZ_TRANSCEIVEREN_BIAS_DRVR_EN 0x068
|
||||
|
||||
@ -235,8 +235,8 @@ static bool regulator_supply_is_couple(struct regulator_dev *rdev)
|
||||
static void regulator_unlock_recursive(struct regulator_dev *rdev,
|
||||
unsigned int n_coupled)
|
||||
{
|
||||
struct regulator_dev *c_rdev;
|
||||
int i;
|
||||
struct regulator_dev *c_rdev, *supply_rdev;
|
||||
int i, supply_n_coupled;
|
||||
|
||||
for (i = n_coupled; i > 0; i--) {
|
||||
c_rdev = rdev->coupling_desc.coupled_rdevs[i - 1];
|
||||
@ -244,10 +244,13 @@ static void regulator_unlock_recursive(struct regulator_dev *rdev,
|
||||
if (!c_rdev)
|
||||
continue;
|
||||
|
||||
if (c_rdev->supply && !regulator_supply_is_couple(c_rdev))
|
||||
regulator_unlock_recursive(
|
||||
c_rdev->supply->rdev,
|
||||
c_rdev->coupling_desc.n_coupled);
|
||||
if (c_rdev->supply && !regulator_supply_is_couple(c_rdev)) {
|
||||
supply_rdev = c_rdev->supply->rdev;
|
||||
supply_n_coupled = supply_rdev->coupling_desc.n_coupled;
|
||||
|
||||
regulator_unlock_recursive(supply_rdev,
|
||||
supply_n_coupled);
|
||||
}
|
||||
|
||||
regulator_unlock(c_rdev);
|
||||
}
|
||||
@ -1456,7 +1459,7 @@ static int set_consumer_device_supply(struct regulator_dev *rdev,
|
||||
const char *consumer_dev_name,
|
||||
const char *supply)
|
||||
{
|
||||
struct regulator_map *node;
|
||||
struct regulator_map *node, *new_node;
|
||||
int has_dev;
|
||||
|
||||
if (supply == NULL)
|
||||
@ -1467,6 +1470,22 @@ static int set_consumer_device_supply(struct regulator_dev *rdev,
|
||||
else
|
||||
has_dev = 0;
|
||||
|
||||
new_node = kzalloc(sizeof(struct regulator_map), GFP_KERNEL);
|
||||
if (new_node == NULL)
|
||||
return -ENOMEM;
|
||||
|
||||
new_node->regulator = rdev;
|
||||
new_node->supply = supply;
|
||||
|
||||
if (has_dev) {
|
||||
new_node->dev_name = kstrdup(consumer_dev_name, GFP_KERNEL);
|
||||
if (new_node->dev_name == NULL) {
|
||||
kfree(new_node);
|
||||
return -ENOMEM;
|
||||
}
|
||||
}
|
||||
|
||||
mutex_lock(®ulator_list_mutex);
|
||||
list_for_each_entry(node, ®ulator_map_list, list) {
|
||||
if (node->dev_name && consumer_dev_name) {
|
||||
if (strcmp(node->dev_name, consumer_dev_name) != 0)
|
||||
@ -1484,26 +1503,19 @@ static int set_consumer_device_supply(struct regulator_dev *rdev,
|
||||
node->regulator->desc->name,
|
||||
supply,
|
||||
dev_name(&rdev->dev), rdev_get_name(rdev));
|
||||
return -EBUSY;
|
||||
goto fail;
|
||||
}
|
||||
|
||||
node = kzalloc(sizeof(struct regulator_map), GFP_KERNEL);
|
||||
if (node == NULL)
|
||||
return -ENOMEM;
|
||||
list_add(&new_node->list, ®ulator_map_list);
|
||||
mutex_unlock(®ulator_list_mutex);
|
||||
|
||||
node->regulator = rdev;
|
||||
node->supply = supply;
|
||||
|
||||
if (has_dev) {
|
||||
node->dev_name = kstrdup(consumer_dev_name, GFP_KERNEL);
|
||||
if (node->dev_name == NULL) {
|
||||
kfree(node);
|
||||
return -ENOMEM;
|
||||
}
|
||||
}
|
||||
|
||||
list_add(&node->list, ®ulator_map_list);
|
||||
return 0;
|
||||
|
||||
fail:
|
||||
mutex_unlock(®ulator_list_mutex);
|
||||
kfree(new_node->dev_name);
|
||||
kfree(new_node);
|
||||
return -EBUSY;
|
||||
}
|
||||
|
||||
static void unset_regulator_supplies(struct regulator_dev *rdev)
|
||||
@ -1575,44 +1587,53 @@ static struct regulator *create_regulator(struct regulator_dev *rdev,
|
||||
const char *supply_name)
|
||||
{
|
||||
struct regulator *regulator;
|
||||
char buf[REG_STR_SIZE];
|
||||
int err, size;
|
||||
int err;
|
||||
|
||||
if (dev) {
|
||||
char buf[REG_STR_SIZE];
|
||||
int size;
|
||||
|
||||
size = snprintf(buf, REG_STR_SIZE, "%s-%s",
|
||||
dev->kobj.name, supply_name);
|
||||
if (size >= REG_STR_SIZE)
|
||||
return NULL;
|
||||
|
||||
supply_name = kstrdup(buf, GFP_KERNEL);
|
||||
if (supply_name == NULL)
|
||||
return NULL;
|
||||
} else {
|
||||
supply_name = kstrdup_const(supply_name, GFP_KERNEL);
|
||||
if (supply_name == NULL)
|
||||
return NULL;
|
||||
}
|
||||
|
||||
regulator = kzalloc(sizeof(*regulator), GFP_KERNEL);
|
||||
if (regulator == NULL)
|
||||
if (regulator == NULL) {
|
||||
kfree(supply_name);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
regulator->rdev = rdev;
|
||||
regulator->supply_name = supply_name;
|
||||
|
||||
regulator_lock(rdev);
|
||||
regulator->rdev = rdev;
|
||||
list_add(®ulator->list, &rdev->consumer_list);
|
||||
regulator_unlock(rdev);
|
||||
|
||||
if (dev) {
|
||||
regulator->dev = dev;
|
||||
|
||||
/* Add a link to the device sysfs entry */
|
||||
size = snprintf(buf, REG_STR_SIZE, "%s-%s",
|
||||
dev->kobj.name, supply_name);
|
||||
if (size >= REG_STR_SIZE)
|
||||
goto overflow_err;
|
||||
|
||||
regulator->supply_name = kstrdup(buf, GFP_KERNEL);
|
||||
if (regulator->supply_name == NULL)
|
||||
goto overflow_err;
|
||||
|
||||
err = sysfs_create_link_nowarn(&rdev->dev.kobj, &dev->kobj,
|
||||
buf);
|
||||
supply_name);
|
||||
if (err) {
|
||||
rdev_dbg(rdev, "could not add device link %s err %d\n",
|
||||
dev->kobj.name, err);
|
||||
/* non-fatal */
|
||||
}
|
||||
} else {
|
||||
regulator->supply_name = kstrdup_const(supply_name, GFP_KERNEL);
|
||||
if (regulator->supply_name == NULL)
|
||||
goto overflow_err;
|
||||
}
|
||||
|
||||
regulator->debugfs = debugfs_create_dir(regulator->supply_name,
|
||||
regulator->debugfs = debugfs_create_dir(supply_name,
|
||||
rdev->debugfs);
|
||||
if (!regulator->debugfs) {
|
||||
rdev_dbg(rdev, "Failed to create debugfs directory\n");
|
||||
@ -1637,13 +1658,7 @@ static struct regulator *create_regulator(struct regulator_dev *rdev,
|
||||
_regulator_is_enabled(rdev))
|
||||
regulator->always_on = true;
|
||||
|
||||
regulator_unlock(rdev);
|
||||
return regulator;
|
||||
overflow_err:
|
||||
list_del(®ulator->list);
|
||||
kfree(regulator);
|
||||
regulator_unlock(rdev);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
static int _regulator_get_enable_time(struct regulator_dev *rdev)
|
||||
@ -2221,10 +2236,13 @@ EXPORT_SYMBOL_GPL(regulator_bulk_unregister_supply_alias);
|
||||
static int regulator_ena_gpio_request(struct regulator_dev *rdev,
|
||||
const struct regulator_config *config)
|
||||
{
|
||||
struct regulator_enable_gpio *pin;
|
||||
struct regulator_enable_gpio *pin, *new_pin;
|
||||
struct gpio_desc *gpiod;
|
||||
|
||||
gpiod = config->ena_gpiod;
|
||||
new_pin = kzalloc(sizeof(*new_pin), GFP_KERNEL);
|
||||
|
||||
mutex_lock(®ulator_list_mutex);
|
||||
|
||||
list_for_each_entry(pin, ®ulator_ena_gpio_list, list) {
|
||||
if (pin->gpiod == gpiod) {
|
||||
@ -2233,9 +2251,13 @@ static int regulator_ena_gpio_request(struct regulator_dev *rdev,
|
||||
}
|
||||
}
|
||||
|
||||
pin = kzalloc(sizeof(struct regulator_enable_gpio), GFP_KERNEL);
|
||||
if (pin == NULL)
|
||||
if (new_pin == NULL) {
|
||||
mutex_unlock(®ulator_list_mutex);
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
pin = new_pin;
|
||||
new_pin = NULL;
|
||||
|
||||
pin->gpiod = gpiod;
|
||||
list_add(&pin->list, ®ulator_ena_gpio_list);
|
||||
@ -2243,6 +2265,10 @@ static int regulator_ena_gpio_request(struct regulator_dev *rdev,
|
||||
update_ena_gpio_to_rdev:
|
||||
pin->request_count++;
|
||||
rdev->ena_pin = pin;
|
||||
|
||||
mutex_unlock(®ulator_list_mutex);
|
||||
kfree(new_pin);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -4861,13 +4887,9 @@ static void regulator_resolve_coupling(struct regulator_dev *rdev)
|
||||
return;
|
||||
}
|
||||
|
||||
regulator_lock(c_rdev);
|
||||
|
||||
c_desc->coupled_rdevs[i] = c_rdev;
|
||||
c_desc->n_resolved++;
|
||||
|
||||
regulator_unlock(c_rdev);
|
||||
|
||||
regulator_resolve_coupling(c_rdev);
|
||||
}
|
||||
}
|
||||
@ -4952,7 +4974,10 @@ static int regulator_init_coupling(struct regulator_dev *rdev)
|
||||
if (!of_check_coupling_data(rdev))
|
||||
return -EPERM;
|
||||
|
||||
mutex_lock(®ulator_list_mutex);
|
||||
rdev->coupling_desc.coupler = regulator_find_coupler(rdev);
|
||||
mutex_unlock(®ulator_list_mutex);
|
||||
|
||||
if (IS_ERR(rdev->coupling_desc.coupler)) {
|
||||
err = PTR_ERR(rdev->coupling_desc.coupler);
|
||||
rdev_err(rdev, "failed to get coupler: %d\n", err);
|
||||
@ -5047,6 +5072,7 @@ regulator_register(const struct regulator_desc *regulator_desc,
|
||||
ret = -ENOMEM;
|
||||
goto rinse;
|
||||
}
|
||||
device_initialize(&rdev->dev);
|
||||
|
||||
/*
|
||||
* Duplicate the config so the driver could override it after
|
||||
@ -5054,9 +5080,8 @@ regulator_register(const struct regulator_desc *regulator_desc,
|
||||
*/
|
||||
config = kmemdup(cfg, sizeof(*cfg), GFP_KERNEL);
|
||||
if (config == NULL) {
|
||||
kfree(rdev);
|
||||
ret = -ENOMEM;
|
||||
goto rinse;
|
||||
goto clean;
|
||||
}
|
||||
|
||||
init_data = regulator_of_get_init_data(dev, regulator_desc, config,
|
||||
@ -5068,10 +5093,8 @@ regulator_register(const struct regulator_desc *regulator_desc,
|
||||
* from a gpio extender or something else.
|
||||
*/
|
||||
if (PTR_ERR(init_data) == -EPROBE_DEFER) {
|
||||
kfree(config);
|
||||
kfree(rdev);
|
||||
ret = -EPROBE_DEFER;
|
||||
goto rinse;
|
||||
goto clean;
|
||||
}
|
||||
|
||||
/*
|
||||
@ -5112,9 +5135,7 @@ regulator_register(const struct regulator_desc *regulator_desc,
|
||||
}
|
||||
|
||||
if (config->ena_gpiod) {
|
||||
mutex_lock(®ulator_list_mutex);
|
||||
ret = regulator_ena_gpio_request(rdev, config);
|
||||
mutex_unlock(®ulator_list_mutex);
|
||||
if (ret != 0) {
|
||||
rdev_err(rdev, "Failed to request enable GPIO: %d\n",
|
||||
ret);
|
||||
@ -5126,7 +5147,6 @@ regulator_register(const struct regulator_desc *regulator_desc,
|
||||
}
|
||||
|
||||
/* register with sysfs */
|
||||
device_initialize(&rdev->dev);
|
||||
rdev->dev.class = ®ulator_class;
|
||||
rdev->dev.parent = dev;
|
||||
dev_set_name(&rdev->dev, "regulator.%lu",
|
||||
@ -5154,27 +5174,22 @@ regulator_register(const struct regulator_desc *regulator_desc,
|
||||
if (ret < 0)
|
||||
goto wash;
|
||||
|
||||
mutex_lock(®ulator_list_mutex);
|
||||
ret = regulator_init_coupling(rdev);
|
||||
mutex_unlock(®ulator_list_mutex);
|
||||
if (ret < 0)
|
||||
goto wash;
|
||||
|
||||
/* add consumers devices */
|
||||
if (init_data) {
|
||||
mutex_lock(®ulator_list_mutex);
|
||||
for (i = 0; i < init_data->num_consumer_supplies; i++) {
|
||||
ret = set_consumer_device_supply(rdev,
|
||||
init_data->consumer_supplies[i].dev_name,
|
||||
init_data->consumer_supplies[i].supply);
|
||||
if (ret < 0) {
|
||||
mutex_unlock(®ulator_list_mutex);
|
||||
dev_err(dev, "Failed to set supply %s\n",
|
||||
init_data->consumer_supplies[i].supply);
|
||||
goto unset_supplies;
|
||||
}
|
||||
}
|
||||
mutex_unlock(®ulator_list_mutex);
|
||||
}
|
||||
|
||||
if (!rdev->desc->ops->get_voltage &&
|
||||
@ -5209,13 +5224,11 @@ wash:
|
||||
mutex_lock(®ulator_list_mutex);
|
||||
regulator_ena_gpio_free(rdev);
|
||||
mutex_unlock(®ulator_list_mutex);
|
||||
put_device(&rdev->dev);
|
||||
rdev = NULL;
|
||||
clean:
|
||||
if (dangling_of_gpiod)
|
||||
gpiod_put(config->ena_gpiod);
|
||||
kfree(rdev);
|
||||
kfree(config);
|
||||
put_device(&rdev->dev);
|
||||
rinse:
|
||||
if (dangling_cfg_gpiod)
|
||||
gpiod_put(cfg->ena_gpiod);
|
||||
|
||||
@ -208,7 +208,10 @@ static unsigned int sas_ata_qc_issue(struct ata_queued_cmd *qc)
|
||||
task->num_scatter = si;
|
||||
}
|
||||
|
||||
task->data_dir = qc->dma_dir;
|
||||
if (qc->tf.protocol == ATA_PROT_NODATA)
|
||||
task->data_dir = DMA_NONE;
|
||||
else
|
||||
task->data_dir = qc->dma_dir;
|
||||
task->scatter = qc->sg;
|
||||
task->ata_task.retry_count = 1;
|
||||
task->task_state_flags = SAS_TASK_STATE_PENDING;
|
||||
|
||||
@ -3738,7 +3738,7 @@ int megasas_irqpoll(struct irq_poll *irqpoll, int budget)
|
||||
instance = irq_ctx->instance;
|
||||
|
||||
if (irq_ctx->irq_line_enable) {
|
||||
disable_irq(irq_ctx->os_irq);
|
||||
disable_irq_nosync(irq_ctx->os_irq);
|
||||
irq_ctx->irq_line_enable = false;
|
||||
}
|
||||
|
||||
|
||||
@ -1632,7 +1632,7 @@ _base_irqpoll(struct irq_poll *irqpoll, int budget)
|
||||
reply_q = container_of(irqpoll, struct adapter_reply_queue,
|
||||
irqpoll);
|
||||
if (reply_q->irq_line_enable) {
|
||||
disable_irq(reply_q->os_irq);
|
||||
disable_irq_nosync(reply_q->os_irq);
|
||||
reply_q->irq_line_enable = false;
|
||||
}
|
||||
num_entries = _base_process_reply_queue(reply_q);
|
||||
|
||||
@ -702,6 +702,7 @@ error:
|
||||
kfree(wbuf);
|
||||
error_1:
|
||||
kfree(wr_msg);
|
||||
bus->defer_msg.msg = NULL;
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -825,9 +826,10 @@ static int do_bank_switch(struct sdw_stream_runtime *stream)
|
||||
error:
|
||||
list_for_each_entry(m_rt, &stream->master_list, stream_node) {
|
||||
bus = m_rt->bus;
|
||||
|
||||
kfree(bus->defer_msg.msg->buf);
|
||||
kfree(bus->defer_msg.msg);
|
||||
if (bus->defer_msg.msg) {
|
||||
kfree(bus->defer_msg.msg->buf);
|
||||
kfree(bus->defer_msg.msg);
|
||||
}
|
||||
}
|
||||
|
||||
msg_unlock:
|
||||
|
||||
@ -931,7 +931,11 @@ static irqreturn_t stm32h7_spi_irq_thread(int irq, void *dev_id)
|
||||
}
|
||||
|
||||
if (sr & STM32H7_SPI_SR_SUSP) {
|
||||
dev_warn(spi->dev, "Communication suspended\n");
|
||||
static DEFINE_RATELIMIT_STATE(rs,
|
||||
DEFAULT_RATELIMIT_INTERVAL * 10,
|
||||
1);
|
||||
if (__ratelimit(&rs))
|
||||
dev_dbg_ratelimited(spi->dev, "Communication suspended\n");
|
||||
if (!spi->cur_usedma && (spi->rx_buf && (spi->rx_len > 0)))
|
||||
stm32h7_spi_read_rxfifo(spi, false);
|
||||
/*
|
||||
@ -2050,7 +2054,7 @@ static int stm32_spi_resume(struct device *dev)
|
||||
}
|
||||
|
||||
ret = pm_runtime_get_sync(dev);
|
||||
if (ret) {
|
||||
if (ret < 0) {
|
||||
dev_err(dev, "Unable to power device:%d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -460,6 +460,15 @@ static int gbcodec_mixer_dapm_ctl_put(struct snd_kcontrol *kcontrol,
|
||||
val = ucontrol->value.integer.value[0] & mask;
|
||||
connect = !!val;
|
||||
|
||||
ret = gb_pm_runtime_get_sync(bundle);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = gb_audio_gb_get_control(module->mgmt_connection, data->ctl_id,
|
||||
GB_AUDIO_INVALID_INDEX, &gbvalue);
|
||||
if (ret)
|
||||
goto exit;
|
||||
|
||||
/* update ucontrol */
|
||||
if (gbvalue.value.integer_value[0] != val) {
|
||||
for (wi = 0; wi < wlist->num_widgets; wi++) {
|
||||
@ -473,25 +482,17 @@ static int gbcodec_mixer_dapm_ctl_put(struct snd_kcontrol *kcontrol,
|
||||
gbvalue.value.integer_value[0] =
|
||||
cpu_to_le32(ucontrol->value.integer.value[0]);
|
||||
|
||||
ret = gb_pm_runtime_get_sync(bundle);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = gb_audio_gb_set_control(module->mgmt_connection,
|
||||
data->ctl_id,
|
||||
GB_AUDIO_INVALID_INDEX, &gbvalue);
|
||||
|
||||
gb_pm_runtime_put_autosuspend(bundle);
|
||||
|
||||
if (ret) {
|
||||
dev_err_ratelimited(codec->dev,
|
||||
"%d:Error in %s for %s\n", ret,
|
||||
__func__, kcontrol->id.name);
|
||||
return ret;
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
exit:
|
||||
gb_pm_runtime_put_autosuspend(bundle);
|
||||
if (ret)
|
||||
dev_err_ratelimited(codec_dev, "%d:Error in %s for %s\n", ret,
|
||||
__func__, kcontrol->id.name);
|
||||
return ret;
|
||||
}
|
||||
|
||||
#define SOC_DAPM_MIXER_GB(xname, kcount, data) \
|
||||
|
||||
@ -526,13 +526,8 @@ static void hfa384x_usb_defer(struct work_struct *data)
|
||||
*/
|
||||
void hfa384x_create(struct hfa384x *hw, struct usb_device *usb)
|
||||
{
|
||||
memset(hw, 0, sizeof(*hw));
|
||||
hw->usb = usb;
|
||||
|
||||
/* set up the endpoints */
|
||||
hw->endp_in = usb_rcvbulkpipe(usb, 1);
|
||||
hw->endp_out = usb_sndbulkpipe(usb, 2);
|
||||
|
||||
/* Set up the waitq */
|
||||
init_waitqueue_head(&hw->cmdq);
|
||||
|
||||
|
||||
@ -61,23 +61,14 @@ static int prism2sta_probe_usb(struct usb_interface *interface,
|
||||
const struct usb_device_id *id)
|
||||
{
|
||||
struct usb_device *dev;
|
||||
const struct usb_endpoint_descriptor *epd;
|
||||
const struct usb_host_interface *iface_desc = interface->cur_altsetting;
|
||||
struct usb_endpoint_descriptor *bulk_in, *bulk_out;
|
||||
struct usb_host_interface *iface_desc = interface->cur_altsetting;
|
||||
struct wlandevice *wlandev = NULL;
|
||||
struct hfa384x *hw = NULL;
|
||||
int result = 0;
|
||||
|
||||
if (iface_desc->desc.bNumEndpoints != 2) {
|
||||
result = -ENODEV;
|
||||
goto failed;
|
||||
}
|
||||
|
||||
result = -EINVAL;
|
||||
epd = &iface_desc->endpoint[1].desc;
|
||||
if (!usb_endpoint_is_bulk_in(epd))
|
||||
goto failed;
|
||||
epd = &iface_desc->endpoint[2].desc;
|
||||
if (!usb_endpoint_is_bulk_out(epd))
|
||||
result = usb_find_common_endpoints(iface_desc, &bulk_in, &bulk_out, NULL, NULL);
|
||||
if (result)
|
||||
goto failed;
|
||||
|
||||
dev = interface_to_usbdev(interface);
|
||||
@ -96,6 +87,8 @@ static int prism2sta_probe_usb(struct usb_interface *interface,
|
||||
}
|
||||
|
||||
/* Initialize the hw data */
|
||||
hw->endp_in = usb_rcvbulkpipe(dev, bulk_in->bEndpointAddress);
|
||||
hw->endp_out = usb_sndbulkpipe(dev, bulk_out->bEndpointAddress);
|
||||
hfa384x_create(hw, dev);
|
||||
hw->wlandev = wlandev;
|
||||
|
||||
|
||||
@ -1386,14 +1386,27 @@ static u32 iscsit_do_crypto_hash_sg(
|
||||
sg = cmd->first_data_sg;
|
||||
page_off = cmd->first_data_sg_off;
|
||||
|
||||
if (data_length && page_off) {
|
||||
struct scatterlist first_sg;
|
||||
u32 len = min_t(u32, data_length, sg->length - page_off);
|
||||
|
||||
sg_init_table(&first_sg, 1);
|
||||
sg_set_page(&first_sg, sg_page(sg), len, sg->offset + page_off);
|
||||
|
||||
ahash_request_set_crypt(hash, &first_sg, NULL, len);
|
||||
crypto_ahash_update(hash);
|
||||
|
||||
data_length -= len;
|
||||
sg = sg_next(sg);
|
||||
}
|
||||
|
||||
while (data_length) {
|
||||
u32 cur_len = min_t(u32, data_length, (sg->length - page_off));
|
||||
u32 cur_len = min_t(u32, data_length, sg->length);
|
||||
|
||||
ahash_request_set_crypt(hash, sg, NULL, cur_len);
|
||||
crypto_ahash_update(hash);
|
||||
|
||||
data_length -= cur_len;
|
||||
page_off = 0;
|
||||
/* iscsit_map_iovec has already checked for invalid sg pointers */
|
||||
sg = sg_next(sg);
|
||||
}
|
||||
|
||||
@ -1172,7 +1172,7 @@ void iscsit_free_conn(struct iscsi_conn *conn)
|
||||
}
|
||||
|
||||
void iscsi_target_login_sess_out(struct iscsi_conn *conn,
|
||||
struct iscsi_np *np, bool zero_tsih, bool new_sess)
|
||||
bool zero_tsih, bool new_sess)
|
||||
{
|
||||
if (!new_sess)
|
||||
goto old_sess_out;
|
||||
@ -1190,7 +1190,6 @@ void iscsi_target_login_sess_out(struct iscsi_conn *conn,
|
||||
conn->sess = NULL;
|
||||
|
||||
old_sess_out:
|
||||
iscsi_stop_login_thread_timer(np);
|
||||
/*
|
||||
* If login negotiation fails check if the Time2Retain timer
|
||||
* needs to be restarted.
|
||||
@ -1430,8 +1429,9 @@ static int __iscsi_target_login_thread(struct iscsi_np *np)
|
||||
new_sess_out:
|
||||
new_sess = true;
|
||||
old_sess_out:
|
||||
iscsi_stop_login_thread_timer(np);
|
||||
tpg_np = conn->tpg_np;
|
||||
iscsi_target_login_sess_out(conn, np, zero_tsih, new_sess);
|
||||
iscsi_target_login_sess_out(conn, zero_tsih, new_sess);
|
||||
new_sess = false;
|
||||
|
||||
if (tpg) {
|
||||
|
||||
@ -22,8 +22,7 @@ extern int iscsit_put_login_tx(struct iscsi_conn *, struct iscsi_login *, u32);
|
||||
extern void iscsit_free_conn(struct iscsi_conn *);
|
||||
extern int iscsit_start_kthreads(struct iscsi_conn *);
|
||||
extern void iscsi_post_login_handler(struct iscsi_np *, struct iscsi_conn *, u8);
|
||||
extern void iscsi_target_login_sess_out(struct iscsi_conn *, struct iscsi_np *,
|
||||
bool, bool);
|
||||
extern void iscsi_target_login_sess_out(struct iscsi_conn *, bool, bool);
|
||||
extern int iscsi_target_login_thread(void *);
|
||||
extern void iscsi_handle_login_thread_timeout(struct timer_list *t);
|
||||
|
||||
|
||||
@ -535,12 +535,11 @@ static bool iscsi_target_sk_check_and_clear(struct iscsi_conn *conn, unsigned in
|
||||
|
||||
static void iscsi_target_login_drop(struct iscsi_conn *conn, struct iscsi_login *login)
|
||||
{
|
||||
struct iscsi_np *np = login->np;
|
||||
bool zero_tsih = login->zero_tsih;
|
||||
|
||||
iscsi_remove_failed_auth_entry(conn);
|
||||
iscsi_target_nego_release(conn);
|
||||
iscsi_target_login_sess_out(conn, np, zero_tsih, true);
|
||||
iscsi_target_login_sess_out(conn, zero_tsih, true);
|
||||
}
|
||||
|
||||
struct conn_timeout {
|
||||
|
||||
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Reference in New Issue
Block a user