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spi: imx: add a check for speed_hz before calculating the clock

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[ Upstream commit 4df2f5e1372e9eec8f9e1b4a3025b9be23487d36 ]

When some drivers use spi to send data, spi_transfer->speed_hz is
not assigned. If spidev->max_speed_hz is not assigned as well, it
will cause an error in configuring the clock.
Add a check for these two values before configuring the clock. An
error will be returned when they are not assigned.

Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
Link: https://lore.kernel.org/r/20210408103347.244313-2-xiaoning.wang@nxp.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Clark Wang 2021-04-08 18:33:47 +08:00 committed by Greg Kroah-Hartman
parent 52cff6123a
commit 24b78097a8
1 changed files with 21 additions and 16 deletions
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37
drivers/spi/spi-imx.c
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@ -64,8 +64,7 @@ struct spi_imx_data;
struct spi_imx_devtype_data { struct spi_imx_devtype_data {
void (*intctrl)(struct spi_imx_data *, int); void (*intctrl)(struct spi_imx_data *, int);
int (*prepare_message)(struct spi_imx_data *, struct spi_message *); int (*prepare_message)(struct spi_imx_data *, struct spi_message *);
int (*prepare_transfer)(struct spi_imx_data *, struct spi_device *, int (*prepare_transfer)(struct spi_imx_data *, struct spi_device *);
struct spi_transfer *);
void (*trigger)(struct spi_imx_data *); void (*trigger)(struct spi_imx_data *);
int (*rx_available)(struct spi_imx_data *); int (*rx_available)(struct spi_imx_data *);
void (*reset)(struct spi_imx_data *); void (*reset)(struct spi_imx_data *);
@ -564,11 +563,10 @@ static int mx51_ecspi_prepare_message(struct spi_imx_data *spi_imx,
} }
static int mx51_ecspi_prepare_transfer(struct spi_imx_data *spi_imx, static int mx51_ecspi_prepare_transfer(struct spi_imx_data *spi_imx,
struct spi_device *spi, struct spi_device *spi)
struct spi_transfer *t)
{ {
u32 ctrl = readl(spi_imx->base + MX51_ECSPI_CTRL); u32 ctrl = readl(spi_imx->base + MX51_ECSPI_CTRL);
u32 clk = t->speed_hz, delay; u32 clk, delay;
/* Clear BL field and set the right value */ /* Clear BL field and set the right value */
ctrl &= ~MX51_ECSPI_CTRL_BL_MASK; ctrl &= ~MX51_ECSPI_CTRL_BL_MASK;
@ -582,7 +580,7 @@ static int mx51_ecspi_prepare_transfer(struct spi_imx_data *spi_imx,
/* set clock speed */ /* set clock speed */
ctrl &= ~(0xf << MX51_ECSPI_CTRL_POSTDIV_OFFSET | ctrl &= ~(0xf << MX51_ECSPI_CTRL_POSTDIV_OFFSET |
0xf << MX51_ECSPI_CTRL_PREDIV_OFFSET); 0xf << MX51_ECSPI_CTRL_PREDIV_OFFSET);
ctrl |= mx51_ecspi_clkdiv(spi_imx, t->speed_hz, &clk); ctrl |= mx51_ecspi_clkdiv(spi_imx, spi_imx->spi_bus_clk, &clk);
spi_imx->spi_bus_clk = clk; spi_imx->spi_bus_clk = clk;
if (spi_imx->usedma) if (spi_imx->usedma)
@ -694,13 +692,12 @@ static int mx31_prepare_message(struct spi_imx_data *spi_imx,
} }
static int mx31_prepare_transfer(struct spi_imx_data *spi_imx, static int mx31_prepare_transfer(struct spi_imx_data *spi_imx,
struct spi_device *spi, struct spi_device *spi)
struct spi_transfer *t)
{ {
unsigned int reg = MX31_CSPICTRL_ENABLE | MX31_CSPICTRL_MASTER; unsigned int reg = MX31_CSPICTRL_ENABLE | MX31_CSPICTRL_MASTER;
unsigned int clk; unsigned int clk;
reg |= spi_imx_clkdiv_2(spi_imx->spi_clk, t->speed_hz, &clk) << reg |= spi_imx_clkdiv_2(spi_imx->spi_clk, spi_imx->spi_bus_clk, &clk) <<
MX31_CSPICTRL_DR_SHIFT; MX31_CSPICTRL_DR_SHIFT;
spi_imx->spi_bus_clk = clk; spi_imx->spi_bus_clk = clk;
@ -799,14 +796,13 @@ static int mx21_prepare_message(struct spi_imx_data *spi_imx,
} }
static int mx21_prepare_transfer(struct spi_imx_data *spi_imx, static int mx21_prepare_transfer(struct spi_imx_data *spi_imx,
struct spi_device *spi, struct spi_device *spi)
struct spi_transfer *t)
{ {
unsigned int reg = MX21_CSPICTRL_ENABLE | MX21_CSPICTRL_MASTER; unsigned int reg = MX21_CSPICTRL_ENABLE | MX21_CSPICTRL_MASTER;
unsigned int max = is_imx27_cspi(spi_imx) ? 16 : 18; unsigned int max = is_imx27_cspi(spi_imx) ? 16 : 18;
unsigned int clk; unsigned int clk;
reg |= spi_imx_clkdiv_1(spi_imx->spi_clk, t->speed_hz, max, &clk) reg |= spi_imx_clkdiv_1(spi_imx->spi_clk, spi_imx->spi_bus_clk, max, &clk)
<< MX21_CSPICTRL_DR_SHIFT; << MX21_CSPICTRL_DR_SHIFT;
spi_imx->spi_bus_clk = clk; spi_imx->spi_bus_clk = clk;
@ -875,13 +871,12 @@ static int mx1_prepare_message(struct spi_imx_data *spi_imx,
} }
static int mx1_prepare_transfer(struct spi_imx_data *spi_imx, static int mx1_prepare_transfer(struct spi_imx_data *spi_imx,
struct spi_device *spi, struct spi_device *spi)
struct spi_transfer *t)
{ {
unsigned int reg = MX1_CSPICTRL_ENABLE | MX1_CSPICTRL_MASTER; unsigned int reg = MX1_CSPICTRL_ENABLE | MX1_CSPICTRL_MASTER;
unsigned int clk; unsigned int clk;
reg |= spi_imx_clkdiv_2(spi_imx->spi_clk, t->speed_hz, &clk) << reg |= spi_imx_clkdiv_2(spi_imx->spi_clk, spi_imx->spi_bus_clk, &clk) <<
MX1_CSPICTRL_DR_SHIFT; MX1_CSPICTRL_DR_SHIFT;
spi_imx->spi_bus_clk = clk; spi_imx->spi_bus_clk = clk;
@ -1199,6 +1194,16 @@ static int spi_imx_setupxfer(struct spi_device *spi,
if (!t) if (!t)
return 0; return 0;
if (!t->speed_hz) {
if (!spi->max_speed_hz) {
dev_err(&spi->dev, "no speed_hz provided!\n");
return -EINVAL;
}
dev_dbg(&spi->dev, "using spi->max_speed_hz!\n");
spi_imx->spi_bus_clk = spi->max_speed_hz;
} else
spi_imx->spi_bus_clk = t->speed_hz;
spi_imx->bits_per_word = t->bits_per_word; spi_imx->bits_per_word = t->bits_per_word;
/* /*
@ -1240,7 +1245,7 @@ static int spi_imx_setupxfer(struct spi_device *spi,
spi_imx->slave_burst = t->len; spi_imx->slave_burst = t->len;
} }
spi_imx->devtype_data->prepare_transfer(spi_imx, spi, t); spi_imx->devtype_data->prepare_transfer(spi_imx, spi);
return 0; return 0;
} }