spi: imx: add a check for speed_hz before calculating the clock
[ Upstream commit 4df2f5e1372e9eec8f9e1b4a3025b9be23487d36 ] When some drivers use spi to send data, spi_transfer->speed_hz is not assigned. If spidev->max_speed_hz is not assigned as well, it will cause an error in configuring the clock. Add a check for these two values before configuring the clock. An error will be returned when they are not assigned. Signed-off-by: Clark Wang <xiaoning.wang@nxp.com> Link: https://lore.kernel.org/r/20210408103347.244313-2-xiaoning.wang@nxp.com Signed-off-by: Mark Brown <broonie@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
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@ -64,8 +64,7 @@ struct spi_imx_data;
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struct spi_imx_devtype_data {
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void (*intctrl)(struct spi_imx_data *, int);
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int (*prepare_message)(struct spi_imx_data *, struct spi_message *);
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int (*prepare_transfer)(struct spi_imx_data *, struct spi_device *,
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struct spi_transfer *);
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int (*prepare_transfer)(struct spi_imx_data *, struct spi_device *);
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void (*trigger)(struct spi_imx_data *);
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int (*rx_available)(struct spi_imx_data *);
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void (*reset)(struct spi_imx_data *);
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@ -564,11 +563,10 @@ static int mx51_ecspi_prepare_message(struct spi_imx_data *spi_imx,
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}
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static int mx51_ecspi_prepare_transfer(struct spi_imx_data *spi_imx,
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struct spi_device *spi,
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struct spi_transfer *t)
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struct spi_device *spi)
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{
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u32 ctrl = readl(spi_imx->base + MX51_ECSPI_CTRL);
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u32 clk = t->speed_hz, delay;
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u32 clk, delay;
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/* Clear BL field and set the right value */
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ctrl &= ~MX51_ECSPI_CTRL_BL_MASK;
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@ -582,7 +580,7 @@ static int mx51_ecspi_prepare_transfer(struct spi_imx_data *spi_imx,
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/* set clock speed */
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ctrl &= ~(0xf << MX51_ECSPI_CTRL_POSTDIV_OFFSET |
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0xf << MX51_ECSPI_CTRL_PREDIV_OFFSET);
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ctrl |= mx51_ecspi_clkdiv(spi_imx, t->speed_hz, &clk);
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ctrl |= mx51_ecspi_clkdiv(spi_imx, spi_imx->spi_bus_clk, &clk);
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spi_imx->spi_bus_clk = clk;
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if (spi_imx->usedma)
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@ -694,13 +692,12 @@ static int mx31_prepare_message(struct spi_imx_data *spi_imx,
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}
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static int mx31_prepare_transfer(struct spi_imx_data *spi_imx,
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struct spi_device *spi,
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struct spi_transfer *t)
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struct spi_device *spi)
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{
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unsigned int reg = MX31_CSPICTRL_ENABLE | MX31_CSPICTRL_MASTER;
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unsigned int clk;
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reg |= spi_imx_clkdiv_2(spi_imx->spi_clk, t->speed_hz, &clk) <<
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reg |= spi_imx_clkdiv_2(spi_imx->spi_clk, spi_imx->spi_bus_clk, &clk) <<
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MX31_CSPICTRL_DR_SHIFT;
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spi_imx->spi_bus_clk = clk;
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@ -799,14 +796,13 @@ static int mx21_prepare_message(struct spi_imx_data *spi_imx,
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}
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static int mx21_prepare_transfer(struct spi_imx_data *spi_imx,
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struct spi_device *spi,
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struct spi_transfer *t)
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struct spi_device *spi)
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{
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unsigned int reg = MX21_CSPICTRL_ENABLE | MX21_CSPICTRL_MASTER;
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unsigned int max = is_imx27_cspi(spi_imx) ? 16 : 18;
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unsigned int clk;
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reg |= spi_imx_clkdiv_1(spi_imx->spi_clk, t->speed_hz, max, &clk)
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reg |= spi_imx_clkdiv_1(spi_imx->spi_clk, spi_imx->spi_bus_clk, max, &clk)
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<< MX21_CSPICTRL_DR_SHIFT;
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spi_imx->spi_bus_clk = clk;
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@ -875,13 +871,12 @@ static int mx1_prepare_message(struct spi_imx_data *spi_imx,
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}
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static int mx1_prepare_transfer(struct spi_imx_data *spi_imx,
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struct spi_device *spi,
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struct spi_transfer *t)
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struct spi_device *spi)
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{
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unsigned int reg = MX1_CSPICTRL_ENABLE | MX1_CSPICTRL_MASTER;
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unsigned int clk;
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reg |= spi_imx_clkdiv_2(spi_imx->spi_clk, t->speed_hz, &clk) <<
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reg |= spi_imx_clkdiv_2(spi_imx->spi_clk, spi_imx->spi_bus_clk, &clk) <<
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MX1_CSPICTRL_DR_SHIFT;
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spi_imx->spi_bus_clk = clk;
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@ -1199,6 +1194,16 @@ static int spi_imx_setupxfer(struct spi_device *spi,
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if (!t)
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return 0;
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if (!t->speed_hz) {
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if (!spi->max_speed_hz) {
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dev_err(&spi->dev, "no speed_hz provided!\n");
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return -EINVAL;
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}
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dev_dbg(&spi->dev, "using spi->max_speed_hz!\n");
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spi_imx->spi_bus_clk = spi->max_speed_hz;
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} else
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spi_imx->spi_bus_clk = t->speed_hz;
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spi_imx->bits_per_word = t->bits_per_word;
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/*
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@ -1240,7 +1245,7 @@ static int spi_imx_setupxfer(struct spi_device *spi,
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spi_imx->slave_burst = t->len;
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}
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spi_imx->devtype_data->prepare_transfer(spi_imx, spi, t);
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spi_imx->devtype_data->prepare_transfer(spi_imx, spi);
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return 0;
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}
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