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BACKPORT: ARM: 9035/1: uncompress: Add be32tocpu macro

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DTB stores all values as 32-bit big-endian integers.
Add a macro to convert such values to native CPU endianness, to reduce
duplication.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Nicolas Pitre <nico@fluxnic.net>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>

(cherry picked from commit 0557ac83fd1a0a7cd6909665bad50006507115a0)
(resolved conflict due to different patch context, caused by missing
 "ARM: 9010/1: uncompress: Print the location of appended DTB")
Bug: 178411248
Change-Id: I0807f36352dbfd5f5808959e358a7469dc9753bb
Signed-off-by: Eric Biggers <ebiggers@google.com>
This commit is contained in:
Geert Uytterhoeven 2020-12-04 10:37:47 +01:00 committed by Eric Biggers
parent cc190ff2f8
commit 28066cfbc9
1 changed files with 12 additions and 14 deletions
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26
arch/arm/boot/compressed/head.S
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@ -140,6 +140,16 @@
#endif #endif
.endm .endm
.macro be32tocpu, val, tmp
#ifndef __ARMEB__
/* convert to little endian */
eor \tmp, \val, \val, ror #16
bic \tmp, \tmp, #0x00ff0000
mov \val, \val, ror #8
eor \val, \val, \tmp, lsr #8
#endif
.endm
.section ".start", "ax" .section ".start", "ax"
/* /*
* sort out different calling conventions * sort out different calling conventions
@ -344,13 +354,7 @@ restart: adr r0, LC0
/* Get the initial DTB size */ /* Get the initial DTB size */
ldr r5, [r6, #4] ldr r5, [r6, #4]
#ifndef __ARMEB__ be32tocpu r5, r1
/* convert to little endian */
eor r1, r5, r5, ror #16
bic r1, r1, #0x00ff0000
mov r5, r5, ror #8
eor r5, r5, r1, lsr #8
#endif
/* 50% DTB growth should be good enough */ /* 50% DTB growth should be good enough */
add r5, r5, r5, lsr #1 add r5, r5, r5, lsr #1
/* preserve 64-bit alignment */ /* preserve 64-bit alignment */
@ -403,13 +407,7 @@ restart: adr r0, LC0
/* Get the current DTB size */ /* Get the current DTB size */
ldr r5, [r6, #4] ldr r5, [r6, #4]
#ifndef __ARMEB__ be32tocpu r5, r1
/* convert r5 (dtb size) to little endian */
eor r1, r5, r5, ror #16
bic r1, r1, #0x00ff0000
mov r5, r5, ror #8
eor r5, r5, r1, lsr #8
#endif
/* preserve 64-bit alignment */ /* preserve 64-bit alignment */
add r5, r5, #7 add r5, r5, #7