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soc: qcom: pil: Proxy vote for QPIC clock during modem boot

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On MDM targets, QPIC clock need to be enabled during modem boot.
On cold boot, RPM sets the proxy vote for modem. But during a SSR,
HLOS needs to proxy vote. Put in a proxy vote from HLOS PIL which
is removed once the modem boots up.

Change-Id: I02d5ad5c68e922683d53f38070df672200c0d933
Signed-off-by: Arun KS <arunks@codeaurora.org>
Signed-off-by: Lijuan Gao <lijuang@codeaurora.org>
This commit is contained in:
Lijuan Gao 2021-05-21 18:07:17 +08:00
parent 5e66460353
commit 40e8fe993c
2 changed files with 14 additions and 0 deletions
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13
drivers/soc/qcom/pil-q6v5.c
View File

@ -102,6 +102,12 @@ int pil_q6v5_make_proxy_votes(struct pil_desc *pil)
goto out;
}
ret = clk_prepare_enable(drv->qpic_clk);
if (ret) {
dev_err(pil->dev, "Failed to vote for qpic clk\n");
goto err_qpic_vote;
}
ret = clk_prepare_enable(drv->pnoc_clk);
if (ret) {
dev_err(pil->dev, "Failed to vote for pnoc(rc:%d)\n", ret);
@ -171,6 +177,8 @@ err_prng_vote:
err_qdss_vote:
clk_disable_unprepare(drv->pnoc_clk);
err_pnoc_vote:
clk_disable_unprepare(drv->qpic_clk);
err_qpic_vote:
clk_disable_unprepare(drv->xo);
out:
return ret;
@ -197,6 +205,7 @@ void pil_q6v5_remove_proxy_votes(struct pil_desc *pil)
regulator_set_load(drv->vreg_cx, 0);
regulator_set_voltage(drv->vreg_cx, 0, INT_MAX);
clk_disable_unprepare(drv->xo);
clk_disable_unprepare(drv->qpic_clk);
clk_disable_unprepare(drv->pnoc_clk);
clk_disable_unprepare(drv->qdss_clk);
clk_disable_unprepare(drv->prng_clk);
@ -767,6 +776,10 @@ struct q6v5_data *pil_q6v5_init(struct platform_device *pdev)
if (IS_ERR(drv->xo))
return ERR_CAST(drv->xo);
drv->qpic_clk = devm_clk_get(&pdev->dev, "qpic");
if (IS_ERR(drv->qpic_clk))
drv->qpic_clk = NULL;
if (of_property_read_bool(pdev->dev.of_node, "qcom,pnoc-clk-vote")) {
drv->pnoc_clk = devm_clk_get(&pdev->dev, "pnoc_clk");
if (IS_ERR(drv->pnoc_clk))

1
drivers/soc/qcom/pil-q6v5.h
View File

@ -29,6 +29,7 @@ struct q6v5_data {
struct clk *qdss_clk;
struct clk *prng_clk;
struct clk *axis2_clk;
struct clk *qpic_clk;
void __iomem *axi_halt_base; /* Halt base of q6, mss,
* nc are in same 4K page
*/